2 * Copyright © 2014-2015 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 #include "nir_control_flow.h"
28 #include "util/half_float.h"
32 typedef struct nir_builder
{
35 /* Whether new ALU instructions will be marked "exact" */
39 nir_function_impl
*impl
;
43 nir_builder_init(nir_builder
*build
, nir_function_impl
*impl
)
45 memset(build
, 0, sizeof(*build
));
48 build
->shader
= impl
->function
->shader
;
52 nir_builder_init_simple_shader(nir_builder
*build
, void *mem_ctx
,
53 gl_shader_stage stage
,
54 const nir_shader_compiler_options
*options
)
56 build
->shader
= nir_shader_create(mem_ctx
, stage
, options
, NULL
);
57 nir_function
*func
= nir_function_create(build
->shader
, "main");
59 build
->impl
= nir_function_impl_create(func
);
60 build
->cursor
= nir_after_cf_list(&build
->impl
->body
);
64 nir_builder_instr_insert(nir_builder
*build
, nir_instr
*instr
)
66 nir_instr_insert(build
->cursor
, instr
);
68 /* Move the cursor forward. */
69 build
->cursor
= nir_after_instr(instr
);
72 static inline nir_instr
*
73 nir_builder_last_instr(nir_builder
*build
)
75 assert(build
->cursor
.option
== nir_cursor_after_instr
);
76 return build
->cursor
.instr
;
80 nir_builder_cf_insert(nir_builder
*build
, nir_cf_node
*cf
)
82 nir_cf_node_insert(build
->cursor
, cf
);
86 nir_builder_is_inside_cf(nir_builder
*build
, nir_cf_node
*cf_node
)
88 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
89 for (nir_cf_node
*n
= &block
->cf_node
; n
; n
= n
->parent
) {
96 static inline nir_if
*
97 nir_push_if(nir_builder
*build
, nir_ssa_def
*condition
)
99 nir_if
*nif
= nir_if_create(build
->shader
);
100 nif
->condition
= nir_src_for_ssa(condition
);
101 nir_builder_cf_insert(build
, &nif
->cf_node
);
102 build
->cursor
= nir_before_cf_list(&nif
->then_list
);
106 static inline nir_if
*
107 nir_push_else(nir_builder
*build
, nir_if
*nif
)
110 assert(nir_builder_is_inside_cf(build
, &nif
->cf_node
));
112 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
113 nif
= nir_cf_node_as_if(block
->cf_node
.parent
);
115 build
->cursor
= nir_before_cf_list(&nif
->else_list
);
120 nir_pop_if(nir_builder
*build
, nir_if
*nif
)
123 assert(nir_builder_is_inside_cf(build
, &nif
->cf_node
));
125 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
126 nif
= nir_cf_node_as_if(block
->cf_node
.parent
);
128 build
->cursor
= nir_after_cf_node(&nif
->cf_node
);
131 static inline nir_ssa_def
*
132 nir_if_phi(nir_builder
*build
, nir_ssa_def
*then_def
, nir_ssa_def
*else_def
)
134 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
135 nir_if
*nif
= nir_cf_node_as_if(nir_cf_node_prev(&block
->cf_node
));
137 nir_phi_instr
*phi
= nir_phi_instr_create(build
->shader
);
139 nir_phi_src
*src
= ralloc(phi
, nir_phi_src
);
140 src
->pred
= nir_if_last_then_block(nif
);
141 src
->src
= nir_src_for_ssa(then_def
);
142 exec_list_push_tail(&phi
->srcs
, &src
->node
);
144 src
= ralloc(phi
, nir_phi_src
);
145 src
->pred
= nir_if_last_else_block(nif
);
146 src
->src
= nir_src_for_ssa(else_def
);
147 exec_list_push_tail(&phi
->srcs
, &src
->node
);
149 assert(then_def
->num_components
== else_def
->num_components
);
150 assert(then_def
->bit_size
== else_def
->bit_size
);
151 nir_ssa_dest_init(&phi
->instr
, &phi
->dest
,
152 then_def
->num_components
, then_def
->bit_size
, NULL
);
154 nir_builder_instr_insert(build
, &phi
->instr
);
156 return &phi
->dest
.ssa
;
159 static inline nir_loop
*
160 nir_push_loop(nir_builder
*build
)
162 nir_loop
*loop
= nir_loop_create(build
->shader
);
163 nir_builder_cf_insert(build
, &loop
->cf_node
);
164 build
->cursor
= nir_before_cf_list(&loop
->body
);
169 nir_pop_loop(nir_builder
*build
, nir_loop
*loop
)
172 assert(nir_builder_is_inside_cf(build
, &loop
->cf_node
));
174 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
175 loop
= nir_cf_node_as_loop(block
->cf_node
.parent
);
177 build
->cursor
= nir_after_cf_node(&loop
->cf_node
);
180 static inline nir_ssa_def
*
181 nir_ssa_undef(nir_builder
*build
, unsigned num_components
, unsigned bit_size
)
183 nir_ssa_undef_instr
*undef
=
184 nir_ssa_undef_instr_create(build
->shader
, num_components
, bit_size
);
188 nir_instr_insert(nir_before_cf_list(&build
->impl
->body
), &undef
->instr
);
193 static inline nir_ssa_def
*
194 nir_build_imm(nir_builder
*build
, unsigned num_components
,
195 unsigned bit_size
, nir_const_value value
)
197 nir_load_const_instr
*load_const
=
198 nir_load_const_instr_create(build
->shader
, num_components
, bit_size
);
202 load_const
->value
= value
;
204 nir_builder_instr_insert(build
, &load_const
->instr
);
206 return &load_const
->def
;
209 static inline nir_ssa_def
*
210 nir_imm_bool(nir_builder
*build
, bool x
)
214 memset(&v
, 0, sizeof(v
));
217 return nir_build_imm(build
, 1, 1, v
);
220 static inline nir_ssa_def
*
221 nir_imm_true(nir_builder
*build
)
223 return nir_imm_bool(build
, true);
226 static inline nir_ssa_def
*
227 nir_imm_false(nir_builder
*build
)
229 return nir_imm_bool(build
, false);
232 static inline nir_ssa_def
*
233 nir_imm_float16(nir_builder
*build
, float x
)
237 memset(&v
, 0, sizeof(v
));
238 v
.u16
[0] = _mesa_float_to_half(x
);
240 return nir_build_imm(build
, 1, 16, v
);
243 static inline nir_ssa_def
*
244 nir_imm_float(nir_builder
*build
, float x
)
248 memset(&v
, 0, sizeof(v
));
251 return nir_build_imm(build
, 1, 32, v
);
254 static inline nir_ssa_def
*
255 nir_imm_double(nir_builder
*build
, double x
)
259 memset(&v
, 0, sizeof(v
));
262 return nir_build_imm(build
, 1, 64, v
);
265 static inline nir_ssa_def
*
266 nir_imm_floatN_t(nir_builder
*build
, double x
, unsigned bit_size
)
270 return nir_imm_float16(build
, x
);
272 return nir_imm_float(build
, x
);
274 return nir_imm_double(build
, x
);
277 unreachable("unknown float immediate bit size");
280 static inline nir_ssa_def
*
281 nir_imm_vec4(nir_builder
*build
, float x
, float y
, float z
, float w
)
285 memset(&v
, 0, sizeof(v
));
291 return nir_build_imm(build
, 4, 32, v
);
294 static inline nir_ssa_def
*
295 nir_imm_ivec2(nir_builder
*build
, int x
, int y
)
299 memset(&v
, 0, sizeof(v
));
303 return nir_build_imm(build
, 2, 32, v
);
306 static inline nir_ssa_def
*
307 nir_imm_int(nir_builder
*build
, int x
)
311 memset(&v
, 0, sizeof(v
));
314 return nir_build_imm(build
, 1, 32, v
);
317 static inline nir_ssa_def
*
318 nir_imm_int64(nir_builder
*build
, int64_t x
)
322 memset(&v
, 0, sizeof(v
));
325 return nir_build_imm(build
, 1, 64, v
);
328 static inline nir_ssa_def
*
329 nir_imm_intN_t(nir_builder
*build
, uint64_t x
, unsigned bit_size
)
333 memset(&v
, 0, sizeof(v
));
334 assert(bit_size
<= 64);
338 v
.i64
[0] = x
& (~0ull >> (64 - bit_size
));
340 return nir_build_imm(build
, 1, bit_size
, v
);
343 static inline nir_ssa_def
*
344 nir_imm_ivec4(nir_builder
*build
, int x
, int y
, int z
, int w
)
348 memset(&v
, 0, sizeof(v
));
354 return nir_build_imm(build
, 4, 32, v
);
357 static inline nir_ssa_def
*
358 nir_imm_boolN_t(nir_builder
*build
, bool x
, unsigned bit_size
)
360 /* We use a 0/-1 convention for all booleans regardless of size */
361 return nir_imm_intN_t(build
, -(int)x
, bit_size
);
364 static inline nir_ssa_def
*
365 nir_build_alu(nir_builder
*build
, nir_op op
, nir_ssa_def
*src0
,
366 nir_ssa_def
*src1
, nir_ssa_def
*src2
, nir_ssa_def
*src3
)
368 const nir_op_info
*op_info
= &nir_op_infos
[op
];
369 nir_alu_instr
*instr
= nir_alu_instr_create(build
->shader
, op
);
373 instr
->exact
= build
->exact
;
375 instr
->src
[0].src
= nir_src_for_ssa(src0
);
377 instr
->src
[1].src
= nir_src_for_ssa(src1
);
379 instr
->src
[2].src
= nir_src_for_ssa(src2
);
381 instr
->src
[3].src
= nir_src_for_ssa(src3
);
383 /* Guess the number of components the destination temporary should have
384 * based on our input sizes, if it's not fixed for the op.
386 unsigned num_components
= op_info
->output_size
;
387 if (num_components
== 0) {
388 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
389 if (op_info
->input_sizes
[i
] == 0)
390 num_components
= MAX2(num_components
,
391 instr
->src
[i
].src
.ssa
->num_components
);
394 assert(num_components
!= 0);
396 /* Figure out the bitwidth based on the source bitwidth if the instruction
399 unsigned bit_size
= nir_alu_type_get_type_size(op_info
->output_type
);
401 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
402 unsigned src_bit_size
= instr
->src
[i
].src
.ssa
->bit_size
;
403 if (nir_alu_type_get_type_size(op_info
->input_types
[i
]) == 0) {
405 assert(src_bit_size
== bit_size
);
407 bit_size
= src_bit_size
;
409 assert(src_bit_size
==
410 nir_alu_type_get_type_size(op_info
->input_types
[i
]));
415 /* When in doubt, assume 32. */
419 /* Make sure we don't swizzle from outside of our source vector (like if a
420 * scalar value was passed into a multiply with a vector).
422 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
423 for (unsigned j
= instr
->src
[i
].src
.ssa
->num_components
;
424 j
< NIR_MAX_VEC_COMPONENTS
; j
++) {
425 instr
->src
[i
].swizzle
[j
] = instr
->src
[i
].src
.ssa
->num_components
- 1;
429 nir_ssa_dest_init(&instr
->instr
, &instr
->dest
.dest
, num_components
,
431 instr
->dest
.write_mask
= (1 << num_components
) - 1;
433 nir_builder_instr_insert(build
, &instr
->instr
);
435 return &instr
->dest
.dest
.ssa
;
438 #include "nir_builder_opcodes.h"
440 static inline nir_ssa_def
*
441 nir_vec(nir_builder
*build
, nir_ssa_def
**comp
, unsigned num_components
)
443 switch (num_components
) {
445 return nir_vec4(build
, comp
[0], comp
[1], comp
[2], comp
[3]);
447 return nir_vec3(build
, comp
[0], comp
[1], comp
[2]);
449 return nir_vec2(build
, comp
[0], comp
[1]);
453 unreachable("bad component count");
459 * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
461 static inline nir_ssa_def
*
462 nir_fmov_alu(nir_builder
*build
, nir_alu_src src
, unsigned num_components
)
464 nir_alu_instr
*mov
= nir_alu_instr_create(build
->shader
, nir_op_fmov
);
465 nir_ssa_dest_init(&mov
->instr
, &mov
->dest
.dest
, num_components
,
466 nir_src_bit_size(src
.src
), NULL
);
467 mov
->exact
= build
->exact
;
468 mov
->dest
.write_mask
= (1 << num_components
) - 1;
470 nir_builder_instr_insert(build
, &mov
->instr
);
472 return &mov
->dest
.dest
.ssa
;
475 static inline nir_ssa_def
*
476 nir_imov_alu(nir_builder
*build
, nir_alu_src src
, unsigned num_components
)
478 nir_alu_instr
*mov
= nir_alu_instr_create(build
->shader
, nir_op_imov
);
479 nir_ssa_dest_init(&mov
->instr
, &mov
->dest
.dest
, num_components
,
480 nir_src_bit_size(src
.src
), NULL
);
481 mov
->exact
= build
->exact
;
482 mov
->dest
.write_mask
= (1 << num_components
) - 1;
484 nir_builder_instr_insert(build
, &mov
->instr
);
486 return &mov
->dest
.dest
.ssa
;
490 * Construct an fmov or imov that reswizzles the source's components.
492 static inline nir_ssa_def
*
493 nir_swizzle(nir_builder
*build
, nir_ssa_def
*src
, const unsigned *swiz
,
494 unsigned num_components
, bool use_fmov
)
496 assert(num_components
<= NIR_MAX_VEC_COMPONENTS
);
497 nir_alu_src alu_src
= { NIR_SRC_INIT
};
498 alu_src
.src
= nir_src_for_ssa(src
);
499 for (unsigned i
= 0; i
< num_components
&& i
< NIR_MAX_VEC_COMPONENTS
; i
++)
500 alu_src
.swizzle
[i
] = swiz
[i
];
502 return use_fmov
? nir_fmov_alu(build
, alu_src
, num_components
) :
503 nir_imov_alu(build
, alu_src
, num_components
);
506 /* Selects the right fdot given the number of components in each source. */
507 static inline nir_ssa_def
*
508 nir_fdot(nir_builder
*build
, nir_ssa_def
*src0
, nir_ssa_def
*src1
)
510 assert(src0
->num_components
== src1
->num_components
);
511 switch (src0
->num_components
) {
512 case 1: return nir_fmul(build
, src0
, src1
);
513 case 2: return nir_fdot2(build
, src0
, src1
);
514 case 3: return nir_fdot3(build
, src0
, src1
);
515 case 4: return nir_fdot4(build
, src0
, src1
);
517 unreachable("bad component size");
523 static inline nir_ssa_def
*
524 nir_bany_inequal(nir_builder
*b
, nir_ssa_def
*src0
, nir_ssa_def
*src1
)
526 switch (src0
->num_components
) {
527 case 1: return nir_ine(b
, src0
, src1
);
528 case 2: return nir_bany_inequal2(b
, src0
, src1
);
529 case 3: return nir_bany_inequal3(b
, src0
, src1
);
530 case 4: return nir_bany_inequal4(b
, src0
, src1
);
532 unreachable("bad component size");
536 static inline nir_ssa_def
*
537 nir_bany(nir_builder
*b
, nir_ssa_def
*src
)
539 return nir_bany_inequal(b
, src
, nir_imm_false(b
));
542 static inline nir_ssa_def
*
543 nir_channel(nir_builder
*b
, nir_ssa_def
*def
, unsigned c
)
545 return nir_swizzle(b
, def
, &c
, 1, false);
548 static inline nir_ssa_def
*
549 nir_channels(nir_builder
*b
, nir_ssa_def
*def
, nir_component_mask_t mask
)
551 unsigned num_channels
= 0, swizzle
[NIR_MAX_VEC_COMPONENTS
] = { 0 };
553 for (unsigned i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; i
++) {
554 if ((mask
& (1 << i
)) == 0)
556 swizzle
[num_channels
++] = i
;
559 return nir_swizzle(b
, def
, swizzle
, num_channels
, false);
562 static inline nir_ssa_def
*
563 nir_i2i(nir_builder
*build
, nir_ssa_def
*x
, unsigned dest_bit_size
)
565 if (x
->bit_size
== dest_bit_size
)
568 switch (dest_bit_size
) {
569 case 64: return nir_i2i64(build
, x
);
570 case 32: return nir_i2i32(build
, x
);
571 case 16: return nir_i2i16(build
, x
);
572 case 8: return nir_i2i8(build
, x
);
573 default: unreachable("Invalid bit size");
577 static inline nir_ssa_def
*
578 nir_u2u(nir_builder
*build
, nir_ssa_def
*x
, unsigned dest_bit_size
)
580 if (x
->bit_size
== dest_bit_size
)
583 switch (dest_bit_size
) {
584 case 64: return nir_u2u64(build
, x
);
585 case 32: return nir_u2u32(build
, x
);
586 case 16: return nir_u2u16(build
, x
);
587 case 8: return nir_u2u8(build
, x
);
588 default: unreachable("Invalid bit size");
592 static inline nir_ssa_def
*
593 nir_iadd_imm(nir_builder
*build
, nir_ssa_def
*x
, uint64_t y
)
595 return nir_iadd(build
, x
, nir_imm_intN_t(build
, y
, x
->bit_size
));
598 static inline nir_ssa_def
*
599 nir_imul_imm(nir_builder
*build
, nir_ssa_def
*x
, uint64_t y
)
601 return nir_imul(build
, x
, nir_imm_intN_t(build
, y
, x
->bit_size
));
604 static inline nir_ssa_def
*
605 nir_fadd_imm(nir_builder
*build
, nir_ssa_def
*x
, double y
)
607 return nir_fadd(build
, x
, nir_imm_floatN_t(build
, y
, x
->bit_size
));
610 static inline nir_ssa_def
*
611 nir_fmul_imm(nir_builder
*build
, nir_ssa_def
*x
, double y
)
613 return nir_fmul(build
, x
, nir_imm_floatN_t(build
, y
, x
->bit_size
));
616 static inline nir_ssa_def
*
617 nir_pack_bits(nir_builder
*b
, nir_ssa_def
*src
, unsigned dest_bit_size
)
619 assert(src
->num_components
* src
->bit_size
== dest_bit_size
);
621 switch (dest_bit_size
) {
623 switch (src
->bit_size
) {
624 case 32: return nir_pack_64_2x32(b
, src
);
625 case 16: return nir_pack_64_4x16(b
, src
);
631 if (src
->bit_size
== 16)
632 return nir_pack_32_2x16(b
, src
);
639 /* If we got here, we have no dedicated unpack opcode. */
640 nir_ssa_def
*dest
= nir_imm_intN_t(b
, 0, dest_bit_size
);
641 for (unsigned i
= 0; i
< src
->num_components
; i
++) {
642 nir_ssa_def
*val
= nir_u2u(b
, nir_channel(b
, src
, i
), dest_bit_size
);
643 val
= nir_ishl(b
, val
, nir_imm_int(b
, i
* src
->bit_size
));
644 dest
= nir_ior(b
, dest
, val
);
649 static inline nir_ssa_def
*
650 nir_unpack_bits(nir_builder
*b
, nir_ssa_def
*src
, unsigned dest_bit_size
)
652 assert(src
->num_components
== 1);
653 assert(src
->bit_size
> dest_bit_size
);
654 const unsigned dest_num_components
= src
->bit_size
/ dest_bit_size
;
655 assert(dest_num_components
<= NIR_MAX_VEC_COMPONENTS
);
657 switch (src
->bit_size
) {
659 switch (dest_bit_size
) {
660 case 32: return nir_unpack_64_2x32(b
, src
);
661 case 16: return nir_unpack_64_4x16(b
, src
);
667 if (dest_bit_size
== 16)
668 return nir_unpack_32_2x16(b
, src
);
675 /* If we got here, we have no dedicated unpack opcode. */
676 nir_ssa_def
*dest_comps
[NIR_MAX_VEC_COMPONENTS
];
677 for (unsigned i
= 0; i
< dest_num_components
; i
++) {
678 nir_ssa_def
*val
= nir_ushr(b
, src
, nir_imm_int(b
, i
* dest_bit_size
));
679 dest_comps
[i
] = nir_u2u(b
, val
, dest_bit_size
);
681 return nir_vec(b
, dest_comps
, dest_num_components
);
684 static inline nir_ssa_def
*
685 nir_bitcast_vector(nir_builder
*b
, nir_ssa_def
*src
, unsigned dest_bit_size
)
687 assert((src
->bit_size
* src
->num_components
) % dest_bit_size
== 0);
688 const unsigned dest_num_components
=
689 (src
->bit_size
* src
->num_components
) / dest_bit_size
;
690 assert(dest_num_components
<= NIR_MAX_VEC_COMPONENTS
);
692 if (src
->bit_size
> dest_bit_size
) {
693 assert(src
->bit_size
% dest_bit_size
== 0);
694 if (src
->num_components
== 1) {
695 return nir_unpack_bits(b
, src
, dest_bit_size
);
697 const unsigned divisor
= src
->bit_size
/ dest_bit_size
;
698 assert(src
->num_components
* divisor
== dest_num_components
);
699 nir_ssa_def
*dest
[NIR_MAX_VEC_COMPONENTS
];
700 for (unsigned i
= 0; i
< src
->num_components
; i
++) {
701 nir_ssa_def
*unpacked
=
702 nir_unpack_bits(b
, nir_channel(b
, src
, i
), dest_bit_size
);
703 assert(unpacked
->num_components
== divisor
);
704 for (unsigned j
= 0; j
< divisor
; j
++)
705 dest
[i
* divisor
+ j
] = nir_channel(b
, unpacked
, j
);
707 return nir_vec(b
, dest
, dest_num_components
);
709 } else if (src
->bit_size
< dest_bit_size
) {
710 assert(dest_bit_size
% src
->bit_size
== 0);
711 if (dest_num_components
== 1) {
712 return nir_pack_bits(b
, src
, dest_bit_size
);
714 const unsigned divisor
= dest_bit_size
/ src
->bit_size
;
715 assert(src
->num_components
== dest_num_components
* divisor
);
716 nir_ssa_def
*dest
[NIR_MAX_VEC_COMPONENTS
];
717 for (unsigned i
= 0; i
< dest_num_components
; i
++) {
718 nir_component_mask_t src_mask
=
719 ((1 << divisor
) - 1) << (i
* divisor
);
720 dest
[i
] = nir_pack_bits(b
, nir_channels(b
, src
, src_mask
),
723 return nir_vec(b
, dest
, dest_num_components
);
726 assert(src
->bit_size
== dest_bit_size
);
732 * Turns a nir_src into a nir_ssa_def * so it can be passed to
733 * nir_build_alu()-based builder calls.
735 * See nir_ssa_for_alu_src() for alu instructions.
737 static inline nir_ssa_def
*
738 nir_ssa_for_src(nir_builder
*build
, nir_src src
, int num_components
)
740 if (src
.is_ssa
&& src
.ssa
->num_components
== num_components
)
743 nir_alu_src alu
= { NIR_SRC_INIT
};
745 for (int j
= 0; j
< 4; j
++)
748 return nir_imov_alu(build
, alu
, num_components
);
752 * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
753 * nir_alu_src's swizzle.
755 static inline nir_ssa_def
*
756 nir_ssa_for_alu_src(nir_builder
*build
, nir_alu_instr
*instr
, unsigned srcn
)
758 static uint8_t trivial_swizzle
[NIR_MAX_VEC_COMPONENTS
];
759 for (int i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; ++i
)
760 trivial_swizzle
[i
] = i
;
761 nir_alu_src
*src
= &instr
->src
[srcn
];
762 unsigned num_components
= nir_ssa_alu_instr_src_components(instr
, srcn
);
764 if (src
->src
.is_ssa
&& (src
->src
.ssa
->num_components
== num_components
) &&
765 !src
->abs
&& !src
->negate
&&
766 (memcmp(src
->swizzle
, trivial_swizzle
, num_components
) == 0))
769 return nir_imov_alu(build
, *src
, num_components
);
772 static inline nir_deref_instr
*
773 nir_build_deref_var(nir_builder
*build
, nir_variable
*var
)
775 nir_deref_instr
*deref
=
776 nir_deref_instr_create(build
->shader
, nir_deref_type_var
);
778 deref
->mode
= var
->data
.mode
;
779 deref
->type
= var
->type
;
782 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
, 1, 32, NULL
);
784 nir_builder_instr_insert(build
, &deref
->instr
);
789 static inline nir_deref_instr
*
790 nir_build_deref_array(nir_builder
*build
, nir_deref_instr
*parent
,
793 assert(glsl_type_is_array(parent
->type
) ||
794 glsl_type_is_matrix(parent
->type
) ||
795 glsl_type_is_vector(parent
->type
));
797 nir_deref_instr
*deref
=
798 nir_deref_instr_create(build
->shader
, nir_deref_type_array
);
800 deref
->mode
= parent
->mode
;
801 deref
->type
= glsl_get_array_element(parent
->type
);
802 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
803 deref
->arr
.index
= nir_src_for_ssa(index
);
805 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
806 parent
->dest
.ssa
.num_components
,
807 parent
->dest
.ssa
.bit_size
, NULL
);
809 nir_builder_instr_insert(build
, &deref
->instr
);
814 static inline nir_deref_instr
*
815 nir_build_deref_ptr_as_array(nir_builder
*build
, nir_deref_instr
*parent
,
818 assert(parent
->deref_type
== nir_deref_type_array
||
819 parent
->deref_type
== nir_deref_type_ptr_as_array
||
820 parent
->deref_type
== nir_deref_type_cast
);
822 nir_deref_instr
*deref
=
823 nir_deref_instr_create(build
->shader
, nir_deref_type_ptr_as_array
);
825 deref
->mode
= parent
->mode
;
826 deref
->type
= parent
->type
;
827 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
828 deref
->arr
.index
= nir_src_for_ssa(index
);
830 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
831 parent
->dest
.ssa
.num_components
,
832 parent
->dest
.ssa
.bit_size
, NULL
);
834 nir_builder_instr_insert(build
, &deref
->instr
);
839 static inline nir_deref_instr
*
840 nir_build_deref_array_wildcard(nir_builder
*build
, nir_deref_instr
*parent
)
842 assert(glsl_type_is_array(parent
->type
) ||
843 glsl_type_is_matrix(parent
->type
));
845 nir_deref_instr
*deref
=
846 nir_deref_instr_create(build
->shader
, nir_deref_type_array_wildcard
);
848 deref
->mode
= parent
->mode
;
849 deref
->type
= glsl_get_array_element(parent
->type
);
850 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
852 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
853 parent
->dest
.ssa
.num_components
,
854 parent
->dest
.ssa
.bit_size
, NULL
);
856 nir_builder_instr_insert(build
, &deref
->instr
);
861 static inline nir_deref_instr
*
862 nir_build_deref_struct(nir_builder
*build
, nir_deref_instr
*parent
,
865 assert(glsl_type_is_struct(parent
->type
));
867 nir_deref_instr
*deref
=
868 nir_deref_instr_create(build
->shader
, nir_deref_type_struct
);
870 deref
->mode
= parent
->mode
;
871 deref
->type
= glsl_get_struct_field(parent
->type
, index
);
872 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
873 deref
->strct
.index
= index
;
875 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
876 parent
->dest
.ssa
.num_components
,
877 parent
->dest
.ssa
.bit_size
, NULL
);
879 nir_builder_instr_insert(build
, &deref
->instr
);
884 static inline nir_deref_instr
*
885 nir_build_deref_cast(nir_builder
*build
, nir_ssa_def
*parent
,
886 nir_variable_mode mode
, const struct glsl_type
*type
,
889 nir_deref_instr
*deref
=
890 nir_deref_instr_create(build
->shader
, nir_deref_type_cast
);
894 deref
->parent
= nir_src_for_ssa(parent
);
895 deref
->cast
.ptr_stride
= ptr_stride
;
897 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
898 parent
->num_components
, parent
->bit_size
, NULL
);
900 nir_builder_instr_insert(build
, &deref
->instr
);
905 /** Returns a deref that follows another but starting from the given parent
907 * The new deref will be the same type and take the same array or struct index
908 * as the leader deref but it may have a different parent. This is very
909 * useful for walking deref paths.
911 static inline nir_deref_instr
*
912 nir_build_deref_follower(nir_builder
*b
, nir_deref_instr
*parent
,
913 nir_deref_instr
*leader
)
915 /* If the derefs would have the same parent, don't make a new one */
916 assert(leader
->parent
.is_ssa
);
917 if (leader
->parent
.ssa
== &parent
->dest
.ssa
)
920 UNUSED nir_deref_instr
*leader_parent
= nir_src_as_deref(leader
->parent
);
922 switch (leader
->deref_type
) {
923 case nir_deref_type_var
:
924 unreachable("A var dereference cannot have a parent");
927 case nir_deref_type_array
:
928 case nir_deref_type_array_wildcard
:
929 assert(glsl_type_is_matrix(parent
->type
) ||
930 glsl_type_is_array(parent
->type
));
931 assert(glsl_get_length(parent
->type
) ==
932 glsl_get_length(leader_parent
->type
));
934 if (leader
->deref_type
== nir_deref_type_array
) {
935 assert(leader
->arr
.index
.is_ssa
);
936 return nir_build_deref_array(b
, parent
, leader
->arr
.index
.ssa
);
938 return nir_build_deref_array_wildcard(b
, parent
);
941 case nir_deref_type_struct
:
942 assert(glsl_type_is_struct(parent
->type
));
943 assert(glsl_get_length(parent
->type
) ==
944 glsl_get_length(leader_parent
->type
));
946 return nir_build_deref_struct(b
, parent
, leader
->strct
.index
);
949 unreachable("Invalid deref instruction type");
953 static inline nir_ssa_def
*
954 nir_load_reg(nir_builder
*build
, nir_register
*reg
)
956 return nir_ssa_for_src(build
, nir_src_for_reg(reg
), reg
->num_components
);
959 static inline nir_ssa_def
*
960 nir_load_deref(nir_builder
*build
, nir_deref_instr
*deref
)
962 nir_intrinsic_instr
*load
=
963 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_load_deref
);
964 load
->num_components
= glsl_get_vector_elements(deref
->type
);
965 load
->src
[0] = nir_src_for_ssa(&deref
->dest
.ssa
);
966 nir_ssa_dest_init(&load
->instr
, &load
->dest
, load
->num_components
,
967 glsl_get_bit_size(deref
->type
), NULL
);
968 nir_builder_instr_insert(build
, &load
->instr
);
969 return &load
->dest
.ssa
;
973 nir_store_deref(nir_builder
*build
, nir_deref_instr
*deref
,
974 nir_ssa_def
*value
, unsigned writemask
)
976 nir_intrinsic_instr
*store
=
977 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_store_deref
);
978 store
->num_components
= glsl_get_vector_elements(deref
->type
);
979 store
->src
[0] = nir_src_for_ssa(&deref
->dest
.ssa
);
980 store
->src
[1] = nir_src_for_ssa(value
);
981 nir_intrinsic_set_write_mask(store
,
982 writemask
& ((1 << store
->num_components
) - 1));
983 nir_builder_instr_insert(build
, &store
->instr
);
987 nir_copy_deref(nir_builder
*build
, nir_deref_instr
*dest
, nir_deref_instr
*src
)
989 nir_intrinsic_instr
*copy
=
990 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_copy_deref
);
991 copy
->src
[0] = nir_src_for_ssa(&dest
->dest
.ssa
);
992 copy
->src
[1] = nir_src_for_ssa(&src
->dest
.ssa
);
993 nir_builder_instr_insert(build
, ©
->instr
);
996 static inline nir_ssa_def
*
997 nir_load_var(nir_builder
*build
, nir_variable
*var
)
999 return nir_load_deref(build
, nir_build_deref_var(build
, var
));
1003 nir_store_var(nir_builder
*build
, nir_variable
*var
, nir_ssa_def
*value
,
1006 nir_store_deref(build
, nir_build_deref_var(build
, var
), value
, writemask
);
1010 nir_copy_var(nir_builder
*build
, nir_variable
*dest
, nir_variable
*src
)
1012 nir_copy_deref(build
, nir_build_deref_var(build
, dest
),
1013 nir_build_deref_var(build
, src
));
1016 static inline nir_ssa_def
*
1017 nir_load_param(nir_builder
*build
, uint32_t param_idx
)
1019 assert(param_idx
< build
->impl
->function
->num_params
);
1020 nir_parameter
*param
= &build
->impl
->function
->params
[param_idx
];
1022 nir_intrinsic_instr
*load
=
1023 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_load_param
);
1024 nir_intrinsic_set_param_idx(load
, param_idx
);
1025 load
->num_components
= param
->num_components
;
1026 nir_ssa_dest_init(&load
->instr
, &load
->dest
,
1027 param
->num_components
, param
->bit_size
, NULL
);
1028 nir_builder_instr_insert(build
, &load
->instr
);
1029 return &load
->dest
.ssa
;
1032 #include "nir_builder_opcodes.h"
1034 static inline nir_ssa_def
*
1035 nir_f2b(nir_builder
*build
, nir_ssa_def
*f
)
1037 return nir_f2b1(build
, f
);
1040 static inline nir_ssa_def
*
1041 nir_i2b(nir_builder
*build
, nir_ssa_def
*i
)
1043 return nir_i2b1(build
, i
);
1046 static inline nir_ssa_def
*
1047 nir_b2f(nir_builder
*build
, nir_ssa_def
*b
, uint32_t bit_size
)
1050 case 64: return nir_b2f64(build
, b
);
1051 case 32: return nir_b2f32(build
, b
);
1052 case 16: return nir_b2f16(build
, b
);
1054 unreachable("Invalid bit-size");
1058 static inline nir_ssa_def
*
1059 nir_load_barycentric(nir_builder
*build
, nir_intrinsic_op op
,
1060 unsigned interp_mode
)
1062 nir_intrinsic_instr
*bary
= nir_intrinsic_instr_create(build
->shader
, op
);
1063 nir_ssa_dest_init(&bary
->instr
, &bary
->dest
, 2, 32, NULL
);
1064 nir_intrinsic_set_interp_mode(bary
, interp_mode
);
1065 nir_builder_instr_insert(build
, &bary
->instr
);
1066 return &bary
->dest
.ssa
;
1070 nir_jump(nir_builder
*build
, nir_jump_type jump_type
)
1072 nir_jump_instr
*jump
= nir_jump_instr_create(build
->shader
, jump_type
);
1073 nir_builder_instr_insert(build
, &jump
->instr
);
1076 static inline nir_ssa_def
*
1077 nir_compare_func(nir_builder
*b
, enum compare_func func
,
1078 nir_ssa_def
*src0
, nir_ssa_def
*src1
)
1081 case COMPARE_FUNC_NEVER
:
1082 return nir_imm_int(b
, 0);
1083 case COMPARE_FUNC_ALWAYS
:
1084 return nir_imm_int(b
, ~0);
1085 case COMPARE_FUNC_EQUAL
:
1086 return nir_feq(b
, src0
, src1
);
1087 case COMPARE_FUNC_NOTEQUAL
:
1088 return nir_fne(b
, src0
, src1
);
1089 case COMPARE_FUNC_GREATER
:
1090 return nir_flt(b
, src1
, src0
);
1091 case COMPARE_FUNC_GEQUAL
:
1092 return nir_fge(b
, src0
, src1
);
1093 case COMPARE_FUNC_LESS
:
1094 return nir_flt(b
, src0
, src1
);
1095 case COMPARE_FUNC_LEQUAL
:
1096 return nir_fge(b
, src1
, src0
);
1098 unreachable("bad compare func");
1101 #endif /* NIR_BUILDER_H */