src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28
  29 struct exec_list;
  30
  31 typedef struct nir_builder {
  32    nir_cursor cursor;
  33
  34    /* Whether new ALU instructions will be marked "exact" */
  35    bool exact;
  36
  37    nir_shader *shader;
  38    nir_function_impl *impl;
  39 } nir_builder;
  40
  41 static inline void
  42 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  43 {
  44    memset(build, 0, sizeof(*build));
  45    build->exact = false;
  46    build->impl = impl;
  47    build->shader = impl->function->shader;
  48 }
  49
  50 static inline void
  51 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  52                                gl_shader_stage stage,
  53                                const nir_shader_compiler_options *options)
  54 {
  55    build->shader = nir_shader_create(mem_ctx, stage, options);
  56    nir_function *func = nir_function_create(build->shader, "main");
  57    build->exact = false;
  58    build->impl = nir_function_impl_create(func);
  59    build->cursor = nir_after_cf_list(&build->impl->body);
  60 }
  61
  62 static inline void
  63 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  64 {
  65    nir_instr_insert(build->cursor, instr);
  66
  67    /* Move the cursor forward. */
  68    build->cursor = nir_after_instr(instr);
  69 }
  70
  71 static inline void
  72 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  73 {
  74    nir_cf_node_insert(build->cursor, cf);
  75 }
  76
  77 static inline nir_ssa_def *
  78 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
  79 {
  80    nir_ssa_undef_instr *undef =
  81       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
  82    if (!undef)
  83       return NULL;
  84
  85    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
  86
  87    return &undef->def;
  88 }
  89
  90 static inline nir_ssa_def *
  91 nir_build_imm(nir_builder *build, unsigned num_components,
  92               unsigned bit_size, nir_const_value value)
  93 {
  94    nir_load_const_instr *load_const =
  95       nir_load_const_instr_create(build->shader, num_components, bit_size);
  96    if (!load_const)
  97       return NULL;
  98
  99    load_const->value = value;
 100
 101    nir_builder_instr_insert(build, &load_const->instr);
 102
 103    return &load_const->def;
 104 }
 105
 106 static inline nir_ssa_def *
 107 nir_imm_float(nir_builder *build, float x)
 108 {
 109    nir_const_value v;
 110
 111    memset(&v, 0, sizeof(v));
 112    v.f32[0] = x;
 113
 114    return nir_build_imm(build, 1, 32, v);
 115 }
 116
 117 static inline nir_ssa_def *
 118 nir_imm_double(nir_builder *build, double x)
 119 {
 120    nir_const_value v;
 121
 122    memset(&v, 0, sizeof(v));
 123    v.f64[0] = x;
 124
 125    return nir_build_imm(build, 1, 64, v);
 126 }
 127
 128 static inline nir_ssa_def *
 129 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 130 {
 131    nir_const_value v;
 132
 133    memset(&v, 0, sizeof(v));
 134    v.f32[0] = x;
 135    v.f32[1] = y;
 136    v.f32[2] = z;
 137    v.f32[3] = w;
 138
 139    return nir_build_imm(build, 4, 32, v);
 140 }
 141
 142 static inline nir_ssa_def *
 143 nir_imm_int(nir_builder *build, int x)
 144 {
 145    nir_const_value v;
 146
 147    memset(&v, 0, sizeof(v));
 148    v.i32[0] = x;
 149
 150    return nir_build_imm(build, 1, 32, v);
 151 }
 152
 153 static inline nir_ssa_def *
 154 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 155 {
 156    nir_const_value v;
 157
 158    memset(&v, 0, sizeof(v));
 159    v.i32[0] = x;
 160    v.i32[1] = y;
 161    v.i32[2] = z;
 162    v.i32[3] = w;
 163
 164    return nir_build_imm(build, 4, 32, v);
 165 }
 166
 167 static inline nir_ssa_def *
 168 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 169               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 170 {
 171    const nir_op_info *op_info = &nir_op_infos[op];
 172    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 173    if (!instr)
 174       return NULL;
 175
 176    instr->exact = build->exact;
 177
 178    instr->src[0].src = nir_src_for_ssa(src0);
 179    if (src1)
 180       instr->src[1].src = nir_src_for_ssa(src1);
 181    if (src2)
 182       instr->src[2].src = nir_src_for_ssa(src2);
 183    if (src3)
 184       instr->src[3].src = nir_src_for_ssa(src3);
 185
 186    /* Guess the number of components the destination temporary should have
 187     * based on our input sizes, if it's not fixed for the op.
 188     */
 189    unsigned num_components = op_info->output_size;
 190    if (num_components == 0) {
 191       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 192          if (op_info->input_sizes[i] == 0)
 193             num_components = MAX2(num_components,
 194                                   instr->src[i].src.ssa->num_components);
 195       }
 196    }
 197    assert(num_components != 0);
 198
 199    /* Figure out the bitwidth based on the source bitwidth if the instruction
 200     * is variable-width.
 201     */
 202    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 203    if (bit_size == 0) {
 204       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 205          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 206          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 207             if (bit_size)
 208                assert(src_bit_size == bit_size);
 209             else
 210                bit_size = src_bit_size;
 211          } else {
 212             assert(src_bit_size ==
 213                nir_alu_type_get_type_size(op_info->input_types[i]));
 214          }
 215       }
 216    }
 217
 218    /* Make sure we don't swizzle from outside of our source vector (like if a
 219     * scalar value was passed into a multiply with a vector).
 220     */
 221    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 222       for (unsigned j = instr->src[i].src.ssa->num_components; j < 4; j++) {
 223          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 224       }
 225    }
 226
 227    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 228                      bit_size, NULL);
 229    instr->dest.write_mask = (1 << num_components) - 1;
 230
 231    nir_builder_instr_insert(build, &instr->instr);
 232
 233    return &instr->dest.dest.ssa;
 234 }
 235
 236 #define ALU1(op)                                                          \
 237 static inline nir_ssa_def *                                               \
 238 nir_##op(nir_builder *build, nir_ssa_def *src0)                           \
 239 {                                                                         \
 240    return nir_build_alu(build, nir_op_##op, src0, NULL, NULL, NULL);      \
 241 }
 242
 243 #define ALU2(op)                                                          \
 244 static inline nir_ssa_def *                                               \
 245 nir_##op(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)        \
 246 {                                                                         \
 247    return nir_build_alu(build, nir_op_##op, src0, src1, NULL, NULL);      \
 248 }
 249
 250 #define ALU3(op)                                                          \
 251 static inline nir_ssa_def *                                               \
 252 nir_##op(nir_builder *build, nir_ssa_def *src0,                           \
 253          nir_ssa_def *src1, nir_ssa_def *src2)                            \
 254 {                                                                         \
 255    return nir_build_alu(build, nir_op_##op, src0, src1, src2, NULL);      \
 256 }
 257
 258 #define ALU4(op)                                                          \
 259 static inline nir_ssa_def *                                               \
 260 nir_##op(nir_builder *build, nir_ssa_def *src0,                           \
 261          nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)         \
 262 {                                                                         \
 263    return nir_build_alu(build, nir_op_##op, src0, src1, src2, src3);      \
 264 }
 265
 266 #include "nir_builder_opcodes.h"
 267
 268 static inline nir_ssa_def *
 269 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 270 {
 271    switch (num_components) {
 272    case 4:
 273       return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
 274    case 3:
 275       return nir_vec3(build, comp[0], comp[1], comp[2]);
 276    case 2:
 277       return nir_vec2(build, comp[0], comp[1]);
 278    case 1:
 279       return comp[0];
 280    default:
 281       unreachable("bad component count");
 282       return NULL;
 283    }
 284 }
 285
 286 /**
 287  * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
 288  */
 289 static inline nir_ssa_def *
 290 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 291 {
 292    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
 293    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 294                      nir_src_bit_size(src.src), NULL);
 295    mov->exact = build->exact;
 296    mov->dest.write_mask = (1 << num_components) - 1;
 297    mov->src[0] = src;
 298    nir_builder_instr_insert(build, &mov->instr);
 299
 300    return &mov->dest.dest.ssa;
 301 }
 302
 303 static inline nir_ssa_def *
 304 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 305 {
 306    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
 307    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 308                      nir_src_bit_size(src.src), NULL);
 309    mov->exact = build->exact;
 310    mov->dest.write_mask = (1 << num_components) - 1;
 311    mov->src[0] = src;
 312    nir_builder_instr_insert(build, &mov->instr);
 313
 314    return &mov->dest.dest.ssa;
 315 }
 316
 317 /**
 318  * Construct an fmov or imov that reswizzles the source's components.
 319  */
 320 static inline nir_ssa_def *
 321 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned swiz[4],
 322             unsigned num_components, bool use_fmov)
 323 {
 324    nir_alu_src alu_src = { NIR_SRC_INIT };
 325    alu_src.src = nir_src_for_ssa(src);
 326    for (unsigned i = 0; i < num_components; i++)
 327       alu_src.swizzle[i] = swiz[i];
 328
 329    return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
 330                      nir_imov_alu(build, alu_src, num_components);
 331 }
 332
 333 /* Selects the right fdot given the number of components in each source. */
 334 static inline nir_ssa_def *
 335 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 336 {
 337    assert(src0->num_components == src1->num_components);
 338    switch (src0->num_components) {
 339    case 1: return nir_fmul(build, src0, src1);
 340    case 2: return nir_fdot2(build, src0, src1);
 341    case 3: return nir_fdot3(build, src0, src1);
 342    case 4: return nir_fdot4(build, src0, src1);
 343    default:
 344       unreachable("bad component size");
 345    }
 346
 347    return NULL;
 348 }
 349
 350 static inline nir_ssa_def *
 351 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 352 {
 353    unsigned swizzle[4] = {c, c, c, c};
 354    return nir_swizzle(b, def, swizzle, 1, false);
 355 }
 356
 357 /**
 358  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 359  * nir_build_alu()-based builder calls.
 360  *
 361  * See nir_ssa_for_alu_src() for alu instructions.
 362  */
 363 static inline nir_ssa_def *
 364 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 365 {
 366    if (src.is_ssa && src.ssa->num_components == num_components)
 367       return src.ssa;
 368
 369    nir_alu_src alu = { NIR_SRC_INIT };
 370    alu.src = src;
 371    for (int j = 0; j < 4; j++)
 372       alu.swizzle[j] = j;
 373
 374    return nir_imov_alu(build, alu, num_components);
 375 }
 376
 377 /**
 378  * Similar to nir_ssa_for_src(), but for alu src's, respecting the
 379  * nir_alu_src's swizzle.
 380  */
 381 static inline nir_ssa_def *
 382 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 383 {
 384    static uint8_t trivial_swizzle[4] = { 0, 1, 2, 3 };
 385    nir_alu_src *src = &instr->src[srcn];
 386    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 387
 388    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 389        !src->abs && !src->negate &&
 390        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 391       return src->src.ssa;
 392
 393    return nir_imov_alu(build, *src, num_components);
 394 }
 395
 396 static inline nir_ssa_def *
 397 nir_load_var(nir_builder *build, nir_variable *var)
 398 {
 399    const unsigned num_components = glsl_get_vector_elements(var->type);
 400
 401    nir_intrinsic_instr *load =
 402       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_var);
 403    load->num_components = num_components;
 404    load->variables[0] = nir_deref_var_create(load, var);
 405    nir_ssa_dest_init(&load->instr, &load->dest, num_components,
 406                      glsl_get_bit_size(var->type), NULL);
 407    nir_builder_instr_insert(build, &load->instr);
 408    return &load->dest.ssa;
 409 }
 410
 411 static inline void
 412 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
 413               unsigned writemask)
 414 {
 415    const unsigned num_components = glsl_get_vector_elements(var->type);
 416
 417    nir_intrinsic_instr *store =
 418       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_var);
 419    store->num_components = num_components;
 420    nir_intrinsic_set_write_mask(store, writemask);
 421    store->variables[0] = nir_deref_var_create(store, var);
 422    store->src[0] = nir_src_for_ssa(value);
 423    nir_builder_instr_insert(build, &store->instr);
 424 }
 425
 426 static inline void
 427 nir_store_deref_var(nir_builder *build, nir_deref_var *deref,
 428                     nir_ssa_def *value, unsigned writemask)
 429 {
 430    const unsigned num_components =
 431       glsl_get_vector_elements(nir_deref_tail(&deref->deref)->type);
 432
 433    nir_intrinsic_instr *store =
 434       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_var);
 435    store->num_components = num_components;
 436    store->const_index[0] = writemask & ((1 << num_components) - 1);
 437    store->variables[0] = nir_deref_as_var(nir_copy_deref(store, &deref->deref));
 438    store->src[0] = nir_src_for_ssa(value);
 439    nir_builder_instr_insert(build, &store->instr);
 440 }
 441
 442 static inline void
 443 nir_copy_deref_var(nir_builder *build, nir_deref_var *dest, nir_deref_var *src)
 444 {
 445    assert(nir_deref_tail(&dest->deref)->type ==
 446           nir_deref_tail(&src->deref)->type);
 447
 448    nir_intrinsic_instr *copy =
 449       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_var);
 450    copy->variables[0] = nir_deref_as_var(nir_copy_deref(copy, &dest->deref));
 451    copy->variables[1] = nir_deref_as_var(nir_copy_deref(copy, &src->deref));
 452    nir_builder_instr_insert(build, &copy->instr);
 453 }
 454
 455 static inline void
 456 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
 457 {
 458    nir_intrinsic_instr *copy =
 459       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_var);
 460    copy->variables[0] = nir_deref_var_create(copy, dest);
 461    copy->variables[1] = nir_deref_var_create(copy, src);
 462    nir_builder_instr_insert(build, &copy->instr);
 463 }
 464
 465 static inline nir_ssa_def *
 466 nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index)
 467 {
 468    nir_intrinsic_instr *load = nir_intrinsic_instr_create(build->shader, op);
 469    load->num_components = nir_intrinsic_infos[op].dest_components;
 470    load->const_index[0] = index;
 471    nir_ssa_dest_init(&load->instr, &load->dest,
 472                      nir_intrinsic_infos[op].dest_components, 32, NULL);
 473    nir_builder_instr_insert(build, &load->instr);
 474    return &load->dest.ssa;
 475 }
 476
 477 static inline void
 478 nir_jump(nir_builder *build, nir_jump_type jump_type)
 479 {
 480    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
 481    nir_builder_instr_insert(build, &jump->instr);
 482 }
 483
 484 #endif /* NIR_BUILDER_H */