2 * Copyright © 2014-2015 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 #include "nir_control_flow.h"
31 typedef struct nir_builder
{
34 /* Whether new ALU instructions will be marked "exact" */
38 nir_function_impl
*impl
;
42 nir_builder_init(nir_builder
*build
, nir_function_impl
*impl
)
44 memset(build
, 0, sizeof(*build
));
47 build
->shader
= impl
->function
->shader
;
51 nir_builder_init_simple_shader(nir_builder
*build
, void *mem_ctx
,
52 gl_shader_stage stage
,
53 const nir_shader_compiler_options
*options
)
55 build
->shader
= nir_shader_create(mem_ctx
, stage
, options
);
56 nir_function
*func
= nir_function_create(build
->shader
, "main");
58 build
->impl
= nir_function_impl_create(func
);
59 build
->cursor
= nir_after_cf_list(&build
->impl
->body
);
63 nir_builder_instr_insert(nir_builder
*build
, nir_instr
*instr
)
65 nir_instr_insert(build
->cursor
, instr
);
67 /* Move the cursor forward. */
68 build
->cursor
= nir_after_instr(instr
);
72 nir_builder_cf_insert(nir_builder
*build
, nir_cf_node
*cf
)
74 nir_cf_node_insert(build
->cursor
, cf
);
77 static inline nir_ssa_def
*
78 nir_ssa_undef(nir_builder
*build
, unsigned num_components
, unsigned bit_size
)
80 nir_ssa_undef_instr
*undef
=
81 nir_ssa_undef_instr_create(build
->shader
, num_components
, bit_size
);
85 nir_instr_insert(nir_before_cf_list(&build
->impl
->body
), &undef
->instr
);
90 static inline nir_ssa_def
*
91 nir_build_imm(nir_builder
*build
, unsigned num_components
,
92 unsigned bit_size
, nir_const_value value
)
94 nir_load_const_instr
*load_const
=
95 nir_load_const_instr_create(build
->shader
, num_components
, bit_size
);
99 load_const
->value
= value
;
101 nir_builder_instr_insert(build
, &load_const
->instr
);
103 return &load_const
->def
;
106 static inline nir_ssa_def
*
107 nir_imm_float(nir_builder
*build
, float x
)
111 memset(&v
, 0, sizeof(v
));
114 return nir_build_imm(build
, 1, 32, v
);
117 static inline nir_ssa_def
*
118 nir_imm_double(nir_builder
*build
, double x
)
120 nir_const_value v
= { { .f64
= {x
, 0, 0, 0} } };
121 nir_ssa_def
*def
= nir_build_imm(build
, 1, 64, v
);
125 static inline nir_ssa_def
*
126 nir_imm_vec4(nir_builder
*build
, float x
, float y
, float z
, float w
)
130 memset(&v
, 0, sizeof(v
));
136 return nir_build_imm(build
, 4, 32, v
);
139 static inline nir_ssa_def
*
140 nir_imm_int(nir_builder
*build
, int x
)
144 memset(&v
, 0, sizeof(v
));
147 return nir_build_imm(build
, 1, 32, v
);
150 static inline nir_ssa_def
*
151 nir_imm_ivec4(nir_builder
*build
, int x
, int y
, int z
, int w
)
155 memset(&v
, 0, sizeof(v
));
161 return nir_build_imm(build
, 4, 32, v
);
164 static inline nir_ssa_def
*
165 nir_build_alu(nir_builder
*build
, nir_op op
, nir_ssa_def
*src0
,
166 nir_ssa_def
*src1
, nir_ssa_def
*src2
, nir_ssa_def
*src3
)
168 const nir_op_info
*op_info
= &nir_op_infos
[op
];
169 nir_alu_instr
*instr
= nir_alu_instr_create(build
->shader
, op
);
173 instr
->exact
= build
->exact
;
175 instr
->src
[0].src
= nir_src_for_ssa(src0
);
177 instr
->src
[1].src
= nir_src_for_ssa(src1
);
179 instr
->src
[2].src
= nir_src_for_ssa(src2
);
181 instr
->src
[3].src
= nir_src_for_ssa(src3
);
183 /* Guess the number of components the destination temporary should have
184 * based on our input sizes, if it's not fixed for the op.
186 unsigned num_components
= op_info
->output_size
;
187 if (num_components
== 0) {
188 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
189 if (op_info
->input_sizes
[i
] == 0)
190 num_components
= MAX2(num_components
,
191 instr
->src
[i
].src
.ssa
->num_components
);
194 assert(num_components
!= 0);
196 /* Figure out the bitwidth based on the source bitwidth if the instruction
199 unsigned bit_size
= nir_alu_type_get_type_size(op_info
->output_type
);
201 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
202 unsigned src_bit_size
= instr
->src
[i
].src
.ssa
->bit_size
;
203 if (nir_alu_type_get_type_size(op_info
->input_types
[i
]) == 0) {
205 assert(src_bit_size
== bit_size
);
207 bit_size
= src_bit_size
;
209 assert(src_bit_size
==
210 nir_alu_type_get_type_size(op_info
->input_types
[i
]));
215 /* Make sure we don't swizzle from outside of our source vector (like if a
216 * scalar value was passed into a multiply with a vector).
218 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
219 for (unsigned j
= instr
->src
[i
].src
.ssa
->num_components
; j
< 4; j
++) {
220 instr
->src
[i
].swizzle
[j
] = instr
->src
[i
].src
.ssa
->num_components
- 1;
224 nir_ssa_dest_init(&instr
->instr
, &instr
->dest
.dest
, num_components
,
226 instr
->dest
.write_mask
= (1 << num_components
) - 1;
228 nir_builder_instr_insert(build
, &instr
->instr
);
230 return &instr
->dest
.dest
.ssa
;
234 static inline nir_ssa_def * \
235 nir_##op(nir_builder *build, nir_ssa_def *src0) \
237 return nir_build_alu(build, nir_op_##op, src0, NULL, NULL, NULL); \
241 static inline nir_ssa_def * \
242 nir_##op(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) \
244 return nir_build_alu(build, nir_op_##op, src0, src1, NULL, NULL); \
248 static inline nir_ssa_def * \
249 nir_##op(nir_builder *build, nir_ssa_def *src0, \
250 nir_ssa_def *src1, nir_ssa_def *src2) \
252 return nir_build_alu(build, nir_op_##op, src0, src1, src2, NULL); \
256 static inline nir_ssa_def * \
257 nir_##op(nir_builder *build, nir_ssa_def *src0, \
258 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3) \
260 return nir_build_alu(build, nir_op_##op, src0, src1, src2, src3); \
263 #include "nir_builder_opcodes.h"
265 static inline nir_ssa_def
*
266 nir_vec(nir_builder
*build
, nir_ssa_def
**comp
, unsigned num_components
)
268 switch (num_components
) {
270 return nir_vec4(build
, comp
[0], comp
[1], comp
[2], comp
[3]);
272 return nir_vec3(build
, comp
[0], comp
[1], comp
[2]);
274 return nir_vec2(build
, comp
[0], comp
[1]);
278 unreachable("bad component count");
284 * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
286 static inline nir_ssa_def
*
287 nir_fmov_alu(nir_builder
*build
, nir_alu_src src
, unsigned num_components
)
289 nir_alu_instr
*mov
= nir_alu_instr_create(build
->shader
, nir_op_fmov
);
290 nir_ssa_dest_init(&mov
->instr
, &mov
->dest
.dest
, num_components
,
291 nir_src_bit_size(src
.src
), NULL
);
292 mov
->exact
= build
->exact
;
293 mov
->dest
.write_mask
= (1 << num_components
) - 1;
295 nir_builder_instr_insert(build
, &mov
->instr
);
297 return &mov
->dest
.dest
.ssa
;
300 static inline nir_ssa_def
*
301 nir_imov_alu(nir_builder
*build
, nir_alu_src src
, unsigned num_components
)
303 nir_alu_instr
*mov
= nir_alu_instr_create(build
->shader
, nir_op_imov
);
304 nir_ssa_dest_init(&mov
->instr
, &mov
->dest
.dest
, num_components
,
305 nir_src_bit_size(src
.src
), NULL
);
306 mov
->exact
= build
->exact
;
307 mov
->dest
.write_mask
= (1 << num_components
) - 1;
309 nir_builder_instr_insert(build
, &mov
->instr
);
311 return &mov
->dest
.dest
.ssa
;
315 * Construct an fmov or imov that reswizzles the source's components.
317 static inline nir_ssa_def
*
318 nir_swizzle(nir_builder
*build
, nir_ssa_def
*src
, const unsigned swiz
[4],
319 unsigned num_components
, bool use_fmov
)
321 nir_alu_src alu_src
= { NIR_SRC_INIT
};
322 alu_src
.src
= nir_src_for_ssa(src
);
323 for (unsigned i
= 0; i
< num_components
; i
++)
324 alu_src
.swizzle
[i
] = swiz
[i
];
326 return use_fmov
? nir_fmov_alu(build
, alu_src
, num_components
) :
327 nir_imov_alu(build
, alu_src
, num_components
);
330 /* Selects the right fdot given the number of components in each source. */
331 static inline nir_ssa_def
*
332 nir_fdot(nir_builder
*build
, nir_ssa_def
*src0
, nir_ssa_def
*src1
)
334 assert(src0
->num_components
== src1
->num_components
);
335 switch (src0
->num_components
) {
336 case 1: return nir_fmul(build
, src0
, src1
);
337 case 2: return nir_fdot2(build
, src0
, src1
);
338 case 3: return nir_fdot3(build
, src0
, src1
);
339 case 4: return nir_fdot4(build
, src0
, src1
);
341 unreachable("bad component size");
347 static inline nir_ssa_def
*
348 nir_channel(nir_builder
*b
, nir_ssa_def
*def
, unsigned c
)
350 unsigned swizzle
[4] = {c
, c
, c
, c
};
351 return nir_swizzle(b
, def
, swizzle
, 1, false);
355 * Turns a nir_src into a nir_ssa_def * so it can be passed to
356 * nir_build_alu()-based builder calls.
358 * See nir_ssa_for_alu_src() for alu instructions.
360 static inline nir_ssa_def
*
361 nir_ssa_for_src(nir_builder
*build
, nir_src src
, int num_components
)
363 if (src
.is_ssa
&& src
.ssa
->num_components
== num_components
)
366 nir_alu_src alu
= { NIR_SRC_INIT
};
368 for (int j
= 0; j
< 4; j
++)
371 return nir_imov_alu(build
, alu
, num_components
);
375 * Similar to nir_ssa_for_src(), but for alu src's, respecting the
376 * nir_alu_src's swizzle.
378 static inline nir_ssa_def
*
379 nir_ssa_for_alu_src(nir_builder
*build
, nir_alu_instr
*instr
, unsigned srcn
)
381 static uint8_t trivial_swizzle
[4] = { 0, 1, 2, 3 };
382 nir_alu_src
*src
= &instr
->src
[srcn
];
383 unsigned num_components
= nir_ssa_alu_instr_src_components(instr
, srcn
);
385 if (src
->src
.is_ssa
&& (src
->src
.ssa
->num_components
== num_components
) &&
386 !src
->abs
&& !src
->negate
&&
387 (memcmp(src
->swizzle
, trivial_swizzle
, num_components
) == 0))
390 return nir_imov_alu(build
, *src
, num_components
);
393 static inline nir_ssa_def
*
394 nir_load_var(nir_builder
*build
, nir_variable
*var
)
396 const unsigned num_components
= glsl_get_vector_elements(var
->type
);
398 nir_intrinsic_instr
*load
=
399 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_load_var
);
400 load
->num_components
= num_components
;
401 load
->variables
[0] = nir_deref_var_create(load
, var
);
402 nir_ssa_dest_init(&load
->instr
, &load
->dest
, num_components
,
403 glsl_get_bit_size(glsl_get_base_type(var
->type
)), NULL
);
404 nir_builder_instr_insert(build
, &load
->instr
);
405 return &load
->dest
.ssa
;
409 nir_store_var(nir_builder
*build
, nir_variable
*var
, nir_ssa_def
*value
,
412 const unsigned num_components
= glsl_get_vector_elements(var
->type
);
414 nir_intrinsic_instr
*store
=
415 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_store_var
);
416 store
->num_components
= num_components
;
417 nir_intrinsic_set_write_mask(store
, writemask
);
418 store
->variables
[0] = nir_deref_var_create(store
, var
);
419 store
->src
[0] = nir_src_for_ssa(value
);
420 nir_builder_instr_insert(build
, &store
->instr
);
424 nir_store_deref_var(nir_builder
*build
, nir_deref_var
*deref
,
425 nir_ssa_def
*value
, unsigned writemask
)
427 const unsigned num_components
=
428 glsl_get_vector_elements(nir_deref_tail(&deref
->deref
)->type
);
430 nir_intrinsic_instr
*store
=
431 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_store_var
);
432 store
->num_components
= num_components
;
433 store
->const_index
[0] = writemask
& ((1 << num_components
) - 1);
434 store
->variables
[0] = nir_deref_as_var(nir_copy_deref(store
, &deref
->deref
));
435 store
->src
[0] = nir_src_for_ssa(value
);
436 nir_builder_instr_insert(build
, &store
->instr
);
440 nir_copy_deref_var(nir_builder
*build
, nir_deref_var
*dest
, nir_deref_var
*src
)
442 assert(nir_deref_tail(&dest
->deref
)->type
==
443 nir_deref_tail(&src
->deref
)->type
);
445 nir_intrinsic_instr
*copy
=
446 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_copy_var
);
447 copy
->variables
[0] = nir_deref_as_var(nir_copy_deref(copy
, &dest
->deref
));
448 copy
->variables
[1] = nir_deref_as_var(nir_copy_deref(copy
, &src
->deref
));
449 nir_builder_instr_insert(build
, ©
->instr
);
453 nir_copy_var(nir_builder
*build
, nir_variable
*dest
, nir_variable
*src
)
455 nir_intrinsic_instr
*copy
=
456 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_copy_var
);
457 copy
->variables
[0] = nir_deref_var_create(copy
, dest
);
458 copy
->variables
[1] = nir_deref_var_create(copy
, src
);
459 nir_builder_instr_insert(build
, ©
->instr
);
462 static inline nir_ssa_def
*
463 nir_load_system_value(nir_builder
*build
, nir_intrinsic_op op
, int index
)
465 nir_intrinsic_instr
*load
= nir_intrinsic_instr_create(build
->shader
, op
);
466 load
->num_components
= nir_intrinsic_infos
[op
].dest_components
;
467 load
->const_index
[0] = index
;
468 nir_ssa_dest_init(&load
->instr
, &load
->dest
,
469 nir_intrinsic_infos
[op
].dest_components
, 32, NULL
);
470 nir_builder_instr_insert(build
, &load
->instr
);
471 return &load
->dest
.ssa
;
475 nir_jump(nir_builder
*build
, nir_jump_type jump_type
)
477 nir_jump_instr
*jump
= nir_jump_instr_create(build
->shader
, jump_type
);
478 nir_builder_instr_insert(build
, &jump
->instr
);
481 #endif /* NIR_BUILDER_H */