Merge commit '8b0fb1c152fe191768953aa8c77b89034a377f83' into vulkan
[mesa.git] / src / compiler / nir / nir_builder.h
1 /*
2 * Copyright © 2014-2015 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef NIR_BUILDER_H
25 #define NIR_BUILDER_H
26
27 #include "nir_control_flow.h"
28
29 struct exec_list;
30
31 typedef struct nir_builder {
32 nir_cursor cursor;
33
34 nir_shader *shader;
35 nir_function_impl *impl;
36 } nir_builder;
37
38 static inline void
39 nir_builder_init(nir_builder *build, nir_function_impl *impl)
40 {
41 memset(build, 0, sizeof(*build));
42 build->impl = impl;
43 build->shader = impl->function->shader;
44 }
45
46 static inline void
47 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
48 gl_shader_stage stage,
49 const nir_shader_compiler_options *options)
50 {
51 build->shader = nir_shader_create(mem_ctx, stage, options);
52 nir_function *func = nir_function_create(build->shader, "main");
53 build->impl = nir_function_impl_create(func);
54 build->cursor = nir_after_cf_list(&build->impl->body);
55 }
56
57 static inline void
58 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
59 {
60 nir_instr_insert(build->cursor, instr);
61
62 /* Move the cursor forward. */
63 build->cursor = nir_after_instr(instr);
64 }
65
66 static inline void
67 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
68 {
69 nir_cf_node_insert(build->cursor, cf);
70 }
71
72 static inline nir_ssa_def *
73 nir_ssa_undef(nir_builder *build, unsigned num_components)
74 {
75 nir_ssa_undef_instr *undef =
76 nir_ssa_undef_instr_create(build->shader, num_components);
77 if (!undef)
78 return NULL;
79
80 nir_instr_insert(nir_before_block(nir_start_block(build->impl)),
81 &undef->instr);
82
83 return &undef->def;
84 }
85
86 static inline nir_ssa_def *
87 nir_build_imm(nir_builder *build, unsigned num_components, nir_const_value value)
88 {
89 nir_load_const_instr *load_const =
90 nir_load_const_instr_create(build->shader, num_components);
91 if (!load_const)
92 return NULL;
93
94 load_const->value = value;
95
96 nir_builder_instr_insert(build, &load_const->instr);
97
98 return &load_const->def;
99 }
100
101 static inline nir_ssa_def *
102 nir_imm_float(nir_builder *build, float x)
103 {
104 nir_const_value v;
105
106 memset(&v, 0, sizeof(v));
107 v.f[0] = x;
108
109 return nir_build_imm(build, 1, v);
110 }
111
112 static inline nir_ssa_def *
113 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
114 {
115 nir_const_value v;
116
117 memset(&v, 0, sizeof(v));
118 v.f[0] = x;
119 v.f[1] = y;
120 v.f[2] = z;
121 v.f[3] = w;
122
123 return nir_build_imm(build, 4, v);
124 }
125
126 static inline nir_ssa_def *
127 nir_imm_int(nir_builder *build, int x)
128 {
129 nir_const_value v;
130
131 memset(&v, 0, sizeof(v));
132 v.i[0] = x;
133
134 return nir_build_imm(build, 1, v);
135 }
136
137 static inline nir_ssa_def *
138 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
139 {
140 nir_const_value v;
141
142 memset(&v, 0, sizeof(v));
143 v.i[0] = x;
144 v.i[1] = y;
145 v.i[2] = z;
146 v.i[3] = w;
147
148 return nir_build_imm(build, 4, v);
149 }
150
151 static inline nir_ssa_def *
152 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
153 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
154 {
155 const nir_op_info *op_info = &nir_op_infos[op];
156 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
157 if (!instr)
158 return NULL;
159
160 instr->src[0].src = nir_src_for_ssa(src0);
161 if (src1)
162 instr->src[1].src = nir_src_for_ssa(src1);
163 if (src2)
164 instr->src[2].src = nir_src_for_ssa(src2);
165 if (src3)
166 instr->src[3].src = nir_src_for_ssa(src3);
167
168 /* Guess the number of components the destination temporary should have
169 * based on our input sizes, if it's not fixed for the op.
170 */
171 unsigned num_components = op_info->output_size;
172 if (num_components == 0) {
173 for (unsigned i = 0; i < op_info->num_inputs; i++) {
174 if (op_info->input_sizes[i] == 0)
175 num_components = MAX2(num_components,
176 instr->src[i].src.ssa->num_components);
177 }
178 }
179 assert(num_components != 0);
180
181 /* Make sure we don't swizzle from outside of our source vector (like if a
182 * scalar value was passed into a multiply with a vector).
183 */
184 for (unsigned i = 0; i < op_info->num_inputs; i++) {
185 for (unsigned j = instr->src[i].src.ssa->num_components; j < 4; j++) {
186 instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
187 }
188 }
189
190 nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components, NULL);
191 instr->dest.write_mask = (1 << num_components) - 1;
192
193 nir_builder_instr_insert(build, &instr->instr);
194
195 return &instr->dest.dest.ssa;
196 }
197
198 #define ALU1(op) \
199 static inline nir_ssa_def * \
200 nir_##op(nir_builder *build, nir_ssa_def *src0) \
201 { \
202 return nir_build_alu(build, nir_op_##op, src0, NULL, NULL, NULL); \
203 }
204
205 #define ALU2(op) \
206 static inline nir_ssa_def * \
207 nir_##op(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) \
208 { \
209 return nir_build_alu(build, nir_op_##op, src0, src1, NULL, NULL); \
210 }
211
212 #define ALU3(op) \
213 static inline nir_ssa_def * \
214 nir_##op(nir_builder *build, nir_ssa_def *src0, \
215 nir_ssa_def *src1, nir_ssa_def *src2) \
216 { \
217 return nir_build_alu(build, nir_op_##op, src0, src1, src2, NULL); \
218 }
219
220 #define ALU4(op) \
221 static inline nir_ssa_def * \
222 nir_##op(nir_builder *build, nir_ssa_def *src0, \
223 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3) \
224 { \
225 return nir_build_alu(build, nir_op_##op, src0, src1, src2, src3); \
226 }
227
228 #include "nir_builder_opcodes.h"
229
230 static inline nir_ssa_def *
231 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
232 {
233 switch (num_components) {
234 case 4:
235 return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
236 case 3:
237 return nir_vec3(build, comp[0], comp[1], comp[2]);
238 case 2:
239 return nir_vec2(build, comp[0], comp[1]);
240 case 1:
241 return comp[0];
242 default:
243 unreachable("bad component count");
244 return NULL;
245 }
246 }
247
248 /**
249 * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
250 */
251 static inline nir_ssa_def *
252 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
253 {
254 nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
255 nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components, NULL);
256 mov->dest.write_mask = (1 << num_components) - 1;
257 mov->src[0] = src;
258 nir_builder_instr_insert(build, &mov->instr);
259
260 return &mov->dest.dest.ssa;
261 }
262
263 static inline nir_ssa_def *
264 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
265 {
266 nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
267 nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components, NULL);
268 mov->dest.write_mask = (1 << num_components) - 1;
269 mov->src[0] = src;
270 nir_builder_instr_insert(build, &mov->instr);
271
272 return &mov->dest.dest.ssa;
273 }
274
275 /**
276 * Construct an fmov or imov that reswizzles the source's components.
277 */
278 static inline nir_ssa_def *
279 nir_swizzle(nir_builder *build, nir_ssa_def *src, unsigned swiz[4],
280 unsigned num_components, bool use_fmov)
281 {
282 nir_alu_src alu_src = { NIR_SRC_INIT };
283 alu_src.src = nir_src_for_ssa(src);
284 for (unsigned i = 0; i < num_components; i++)
285 alu_src.swizzle[i] = swiz[i];
286
287 return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
288 nir_imov_alu(build, alu_src, num_components);
289 }
290
291 /* Selects the right fdot given the number of components in each source. */
292 static inline nir_ssa_def *
293 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
294 {
295 assert(src0->num_components == src1->num_components);
296 switch (src0->num_components) {
297 case 1: return nir_fmul(build, src0, src1);
298 case 2: return nir_fdot2(build, src0, src1);
299 case 3: return nir_fdot3(build, src0, src1);
300 case 4: return nir_fdot4(build, src0, src1);
301 default:
302 unreachable("bad component size");
303 }
304
305 return NULL;
306 }
307
308 static inline nir_ssa_def *
309 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
310 {
311 unsigned swizzle[4] = {c, c, c, c};
312 return nir_swizzle(b, def, swizzle, 1, false);
313 }
314
315 /**
316 * Turns a nir_src into a nir_ssa_def * so it can be passed to
317 * nir_build_alu()-based builder calls.
318 *
319 * See nir_ssa_for_alu_src() for alu instructions.
320 */
321 static inline nir_ssa_def *
322 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
323 {
324 if (src.is_ssa && src.ssa->num_components == num_components)
325 return src.ssa;
326
327 nir_alu_src alu = { NIR_SRC_INIT };
328 alu.src = src;
329 for (int j = 0; j < 4; j++)
330 alu.swizzle[j] = j;
331
332 return nir_imov_alu(build, alu, num_components);
333 }
334
335 /**
336 * Similar to nir_ssa_for_src(), but for alu src's, respecting the
337 * nir_alu_src's swizzle.
338 */
339 static inline nir_ssa_def *
340 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
341 {
342 static uint8_t trivial_swizzle[4] = { 0, 1, 2, 3 };
343 nir_alu_src *src = &instr->src[srcn];
344 unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
345
346 if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
347 !src->abs && !src->negate &&
348 (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
349 return src->src.ssa;
350
351 return nir_imov_alu(build, *src, num_components);
352 }
353
354 static inline nir_ssa_def *
355 nir_load_var(nir_builder *build, nir_variable *var)
356 {
357 const unsigned num_components = glsl_get_vector_elements(var->type);
358
359 nir_intrinsic_instr *load =
360 nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_var);
361 load->num_components = num_components;
362 load->variables[0] = nir_deref_var_create(load, var);
363 nir_ssa_dest_init(&load->instr, &load->dest, num_components, NULL);
364 nir_builder_instr_insert(build, &load->instr);
365 return &load->dest.ssa;
366 }
367
368 static inline void
369 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
370 unsigned writemask)
371 {
372 const unsigned num_components = glsl_get_vector_elements(var->type);
373
374 nir_intrinsic_instr *store =
375 nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_var);
376 store->num_components = num_components;
377 nir_intrinsic_set_write_mask(store, writemask);
378 store->variables[0] = nir_deref_var_create(store, var);
379 store->src[0] = nir_src_for_ssa(value);
380 nir_builder_instr_insert(build, &store->instr);
381 }
382
383 static inline void
384 nir_store_deref_var(nir_builder *build, nir_deref_var *deref,
385 nir_ssa_def *value, unsigned writemask)
386 {
387 const unsigned num_components =
388 glsl_get_vector_elements(nir_deref_tail(&deref->deref)->type);
389
390 nir_intrinsic_instr *store =
391 nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_var);
392 store->num_components = num_components;
393 store->const_index[0] = writemask & ((1 << num_components) - 1);
394 store->variables[0] = nir_deref_as_var(nir_copy_deref(store, &deref->deref));
395 store->src[0] = nir_src_for_ssa(value);
396 nir_builder_instr_insert(build, &store->instr);
397 }
398
399 static inline void
400 nir_copy_deref_var(nir_builder *build, nir_deref_var *dest, nir_deref_var *src)
401 {
402 assert(nir_deref_tail(&dest->deref)->type ==
403 nir_deref_tail(&src->deref)->type);
404
405 nir_intrinsic_instr *copy =
406 nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_var);
407 copy->variables[0] = nir_deref_as_var(nir_copy_deref(copy, &dest->deref));
408 copy->variables[1] = nir_deref_as_var(nir_copy_deref(copy, &src->deref));
409 nir_builder_instr_insert(build, &copy->instr);
410 }
411
412 static inline void
413 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
414 {
415 nir_intrinsic_instr *copy =
416 nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_var);
417 copy->variables[0] = nir_deref_var_create(copy, dest);
418 copy->variables[1] = nir_deref_var_create(copy, src);
419 nir_builder_instr_insert(build, &copy->instr);
420 }
421
422 static inline nir_ssa_def *
423 nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index)
424 {
425 nir_intrinsic_instr *load = nir_intrinsic_instr_create(build->shader, op);
426 load->num_components = nir_intrinsic_infos[op].dest_components;
427 load->const_index[0] = index;
428 nir_ssa_dest_init(&load->instr, &load->dest,
429 nir_intrinsic_infos[op].dest_components, NULL);
430 nir_builder_instr_insert(build, &load->instr);
431 return &load->dest.ssa;
432 }
433
434 static inline void
435 nir_jump(nir_builder *build, nir_jump_type jump_type)
436 {
437 nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
438 nir_builder_instr_insert(build, &jump->instr);
439 }
440
441 #endif /* NIR_BUILDER_H */