2 * Copyright © 2014-2015 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 #include "nir_control_flow.h"
28 #include "util/bitscan.h"
29 #include "util/half_float.h"
33 typedef struct nir_builder
{
36 /* Whether new ALU instructions will be marked "exact" */
40 nir_function_impl
*impl
;
44 nir_builder_init(nir_builder
*build
, nir_function_impl
*impl
)
46 memset(build
, 0, sizeof(*build
));
49 build
->shader
= impl
->function
->shader
;
53 nir_builder_init_simple_shader(nir_builder
*build
, void *mem_ctx
,
54 gl_shader_stage stage
,
55 const nir_shader_compiler_options
*options
)
57 build
->shader
= nir_shader_create(mem_ctx
, stage
, options
, NULL
);
58 nir_function
*func
= nir_function_create(build
->shader
, "main");
59 func
->is_entrypoint
= true;
61 build
->impl
= nir_function_impl_create(func
);
62 build
->cursor
= nir_after_cf_list(&build
->impl
->body
);
66 nir_builder_instr_insert(nir_builder
*build
, nir_instr
*instr
)
68 nir_instr_insert(build
->cursor
, instr
);
70 /* Move the cursor forward. */
71 build
->cursor
= nir_after_instr(instr
);
74 static inline nir_instr
*
75 nir_builder_last_instr(nir_builder
*build
)
77 assert(build
->cursor
.option
== nir_cursor_after_instr
);
78 return build
->cursor
.instr
;
82 nir_builder_cf_insert(nir_builder
*build
, nir_cf_node
*cf
)
84 nir_cf_node_insert(build
->cursor
, cf
);
88 nir_builder_is_inside_cf(nir_builder
*build
, nir_cf_node
*cf_node
)
90 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
91 for (nir_cf_node
*n
= &block
->cf_node
; n
; n
= n
->parent
) {
98 static inline nir_if
*
99 nir_push_if(nir_builder
*build
, nir_ssa_def
*condition
)
101 nir_if
*nif
= nir_if_create(build
->shader
);
102 nif
->condition
= nir_src_for_ssa(condition
);
103 nir_builder_cf_insert(build
, &nif
->cf_node
);
104 build
->cursor
= nir_before_cf_list(&nif
->then_list
);
108 static inline nir_if
*
109 nir_push_else(nir_builder
*build
, nir_if
*nif
)
112 assert(nir_builder_is_inside_cf(build
, &nif
->cf_node
));
114 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
115 nif
= nir_cf_node_as_if(block
->cf_node
.parent
);
117 build
->cursor
= nir_before_cf_list(&nif
->else_list
);
122 nir_pop_if(nir_builder
*build
, nir_if
*nif
)
125 assert(nir_builder_is_inside_cf(build
, &nif
->cf_node
));
127 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
128 nif
= nir_cf_node_as_if(block
->cf_node
.parent
);
130 build
->cursor
= nir_after_cf_node(&nif
->cf_node
);
133 static inline nir_ssa_def
*
134 nir_if_phi(nir_builder
*build
, nir_ssa_def
*then_def
, nir_ssa_def
*else_def
)
136 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
137 nir_if
*nif
= nir_cf_node_as_if(nir_cf_node_prev(&block
->cf_node
));
139 nir_phi_instr
*phi
= nir_phi_instr_create(build
->shader
);
141 nir_phi_src
*src
= ralloc(phi
, nir_phi_src
);
142 src
->pred
= nir_if_last_then_block(nif
);
143 src
->src
= nir_src_for_ssa(then_def
);
144 exec_list_push_tail(&phi
->srcs
, &src
->node
);
146 src
= ralloc(phi
, nir_phi_src
);
147 src
->pred
= nir_if_last_else_block(nif
);
148 src
->src
= nir_src_for_ssa(else_def
);
149 exec_list_push_tail(&phi
->srcs
, &src
->node
);
151 assert(then_def
->num_components
== else_def
->num_components
);
152 assert(then_def
->bit_size
== else_def
->bit_size
);
153 nir_ssa_dest_init(&phi
->instr
, &phi
->dest
,
154 then_def
->num_components
, then_def
->bit_size
, NULL
);
156 nir_builder_instr_insert(build
, &phi
->instr
);
158 return &phi
->dest
.ssa
;
161 static inline nir_loop
*
162 nir_push_loop(nir_builder
*build
)
164 nir_loop
*loop
= nir_loop_create(build
->shader
);
165 nir_builder_cf_insert(build
, &loop
->cf_node
);
166 build
->cursor
= nir_before_cf_list(&loop
->body
);
171 nir_pop_loop(nir_builder
*build
, nir_loop
*loop
)
174 assert(nir_builder_is_inside_cf(build
, &loop
->cf_node
));
176 nir_block
*block
= nir_cursor_current_block(build
->cursor
);
177 loop
= nir_cf_node_as_loop(block
->cf_node
.parent
);
179 build
->cursor
= nir_after_cf_node(&loop
->cf_node
);
182 static inline nir_ssa_def
*
183 nir_ssa_undef(nir_builder
*build
, unsigned num_components
, unsigned bit_size
)
185 nir_ssa_undef_instr
*undef
=
186 nir_ssa_undef_instr_create(build
->shader
, num_components
, bit_size
);
190 nir_instr_insert(nir_before_cf_list(&build
->impl
->body
), &undef
->instr
);
195 static inline nir_ssa_def
*
196 nir_build_imm(nir_builder
*build
, unsigned num_components
,
197 unsigned bit_size
, const nir_const_value
*value
)
199 nir_load_const_instr
*load_const
=
200 nir_load_const_instr_create(build
->shader
, num_components
, bit_size
);
204 memcpy(load_const
->value
, value
, sizeof(nir_const_value
) * num_components
);
206 nir_builder_instr_insert(build
, &load_const
->instr
);
208 return &load_const
->def
;
211 static inline nir_ssa_def
*
212 nir_imm_zero(nir_builder
*build
, unsigned num_components
, unsigned bit_size
)
214 nir_load_const_instr
*load_const
=
215 nir_load_const_instr_create(build
->shader
, num_components
, bit_size
);
217 /* nir_load_const_instr_create uses rzalloc so it's already zero */
219 nir_builder_instr_insert(build
, &load_const
->instr
);
221 return &load_const
->def
;
224 static inline nir_ssa_def
*
225 nir_imm_bool(nir_builder
*build
, bool x
)
229 memset(&v
, 0, sizeof(v
));
232 return nir_build_imm(build
, 1, 1, &v
);
235 static inline nir_ssa_def
*
236 nir_imm_true(nir_builder
*build
)
238 return nir_imm_bool(build
, true);
241 static inline nir_ssa_def
*
242 nir_imm_false(nir_builder
*build
)
244 return nir_imm_bool(build
, false);
247 static inline nir_ssa_def
*
248 nir_imm_float16(nir_builder
*build
, float x
)
252 memset(&v
, 0, sizeof(v
));
253 v
.u16
= _mesa_float_to_half(x
);
255 return nir_build_imm(build
, 1, 16, &v
);
258 static inline nir_ssa_def
*
259 nir_imm_float(nir_builder
*build
, float x
)
263 memset(&v
, 0, sizeof(v
));
266 return nir_build_imm(build
, 1, 32, &v
);
269 static inline nir_ssa_def
*
270 nir_imm_double(nir_builder
*build
, double x
)
274 memset(&v
, 0, sizeof(v
));
277 return nir_build_imm(build
, 1, 64, &v
);
280 static inline nir_ssa_def
*
281 nir_imm_floatN_t(nir_builder
*build
, double x
, unsigned bit_size
)
285 return nir_imm_float16(build
, x
);
287 return nir_imm_float(build
, x
);
289 return nir_imm_double(build
, x
);
292 unreachable("unknown float immediate bit size");
295 static inline nir_ssa_def
*
296 nir_imm_vec2(nir_builder
*build
, float x
, float y
)
298 nir_const_value v
[2];
300 memset(v
, 0, sizeof(v
));
304 return nir_build_imm(build
, 2, 32, v
);
307 static inline nir_ssa_def
*
308 nir_imm_vec4(nir_builder
*build
, float x
, float y
, float z
, float w
)
310 nir_const_value v
[4];
312 memset(v
, 0, sizeof(v
));
318 return nir_build_imm(build
, 4, 32, v
);
321 static inline nir_ssa_def
*
322 nir_imm_ivec2(nir_builder
*build
, int x
, int y
)
324 nir_const_value v
[2];
326 memset(v
, 0, sizeof(v
));
330 return nir_build_imm(build
, 2, 32, v
);
333 static inline nir_ssa_def
*
334 nir_imm_int(nir_builder
*build
, int x
)
338 memset(&v
, 0, sizeof(v
));
341 return nir_build_imm(build
, 1, 32, &v
);
344 static inline nir_ssa_def
*
345 nir_imm_int64(nir_builder
*build
, int64_t x
)
349 memset(&v
, 0, sizeof(v
));
352 return nir_build_imm(build
, 1, 64, &v
);
355 static inline nir_ssa_def
*
356 nir_imm_intN_t(nir_builder
*build
, uint64_t x
, unsigned bit_size
)
360 memset(&v
, 0, sizeof(v
));
361 assert(bit_size
<= 64);
365 v
.i64
= x
& (~0ull >> (64 - bit_size
));
367 return nir_build_imm(build
, 1, bit_size
, &v
);
370 static inline nir_ssa_def
*
371 nir_imm_ivec4(nir_builder
*build
, int x
, int y
, int z
, int w
)
373 nir_const_value v
[4];
375 memset(v
, 0, sizeof(v
));
381 return nir_build_imm(build
, 4, 32, v
);
384 static inline nir_ssa_def
*
385 nir_imm_boolN_t(nir_builder
*build
, bool x
, unsigned bit_size
)
387 /* We use a 0/-1 convention for all booleans regardless of size */
388 return nir_imm_intN_t(build
, -(int)x
, bit_size
);
391 static inline nir_ssa_def
*
392 nir_build_alu(nir_builder
*build
, nir_op op
, nir_ssa_def
*src0
,
393 nir_ssa_def
*src1
, nir_ssa_def
*src2
, nir_ssa_def
*src3
)
395 const nir_op_info
*op_info
= &nir_op_infos
[op
];
396 nir_alu_instr
*instr
= nir_alu_instr_create(build
->shader
, op
);
400 instr
->exact
= build
->exact
;
402 instr
->src
[0].src
= nir_src_for_ssa(src0
);
404 instr
->src
[1].src
= nir_src_for_ssa(src1
);
406 instr
->src
[2].src
= nir_src_for_ssa(src2
);
408 instr
->src
[3].src
= nir_src_for_ssa(src3
);
410 /* Guess the number of components the destination temporary should have
411 * based on our input sizes, if it's not fixed for the op.
413 unsigned num_components
= op_info
->output_size
;
414 if (num_components
== 0) {
415 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
416 if (op_info
->input_sizes
[i
] == 0)
417 num_components
= MAX2(num_components
,
418 instr
->src
[i
].src
.ssa
->num_components
);
421 assert(num_components
!= 0);
423 /* Figure out the bitwidth based on the source bitwidth if the instruction
426 unsigned bit_size
= nir_alu_type_get_type_size(op_info
->output_type
);
428 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
429 unsigned src_bit_size
= instr
->src
[i
].src
.ssa
->bit_size
;
430 if (nir_alu_type_get_type_size(op_info
->input_types
[i
]) == 0) {
432 assert(src_bit_size
== bit_size
);
434 bit_size
= src_bit_size
;
436 assert(src_bit_size
==
437 nir_alu_type_get_type_size(op_info
->input_types
[i
]));
442 /* When in doubt, assume 32. */
446 /* Make sure we don't swizzle from outside of our source vector (like if a
447 * scalar value was passed into a multiply with a vector).
449 for (unsigned i
= 0; i
< op_info
->num_inputs
; i
++) {
450 for (unsigned j
= instr
->src
[i
].src
.ssa
->num_components
;
451 j
< NIR_MAX_VEC_COMPONENTS
; j
++) {
452 instr
->src
[i
].swizzle
[j
] = instr
->src
[i
].src
.ssa
->num_components
- 1;
456 nir_ssa_dest_init(&instr
->instr
, &instr
->dest
.dest
, num_components
,
458 instr
->dest
.write_mask
= (1 << num_components
) - 1;
460 nir_builder_instr_insert(build
, &instr
->instr
);
462 return &instr
->dest
.dest
.ssa
;
465 #include "nir_builder_opcodes.h"
467 static inline nir_ssa_def
*
468 nir_vec(nir_builder
*build
, nir_ssa_def
**comp
, unsigned num_components
)
470 switch (num_components
) {
472 return nir_vec4(build
, comp
[0], comp
[1], comp
[2], comp
[3]);
474 return nir_vec3(build
, comp
[0], comp
[1], comp
[2]);
476 return nir_vec2(build
, comp
[0], comp
[1]);
480 unreachable("bad component count");
486 * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
488 static inline nir_ssa_def
*
489 nir_fmov_alu(nir_builder
*build
, nir_alu_src src
, unsigned num_components
)
491 nir_alu_instr
*mov
= nir_alu_instr_create(build
->shader
, nir_op_fmov
);
492 nir_ssa_dest_init(&mov
->instr
, &mov
->dest
.dest
, num_components
,
493 nir_src_bit_size(src
.src
), NULL
);
494 mov
->exact
= build
->exact
;
495 mov
->dest
.write_mask
= (1 << num_components
) - 1;
497 nir_builder_instr_insert(build
, &mov
->instr
);
499 return &mov
->dest
.dest
.ssa
;
502 static inline nir_ssa_def
*
503 nir_imov_alu(nir_builder
*build
, nir_alu_src src
, unsigned num_components
)
505 nir_alu_instr
*mov
= nir_alu_instr_create(build
->shader
, nir_op_imov
);
506 nir_ssa_dest_init(&mov
->instr
, &mov
->dest
.dest
, num_components
,
507 nir_src_bit_size(src
.src
), NULL
);
508 mov
->exact
= build
->exact
;
509 mov
->dest
.write_mask
= (1 << num_components
) - 1;
511 nir_builder_instr_insert(build
, &mov
->instr
);
513 return &mov
->dest
.dest
.ssa
;
517 * Construct an fmov or imov that reswizzles the source's components.
519 static inline nir_ssa_def
*
520 nir_swizzle(nir_builder
*build
, nir_ssa_def
*src
, const unsigned *swiz
,
521 unsigned num_components
, bool use_fmov
)
523 assert(num_components
<= NIR_MAX_VEC_COMPONENTS
);
524 nir_alu_src alu_src
= { NIR_SRC_INIT
};
525 alu_src
.src
= nir_src_for_ssa(src
);
527 bool is_identity_swizzle
= true;
528 for (unsigned i
= 0; i
< num_components
&& i
< NIR_MAX_VEC_COMPONENTS
; i
++) {
530 is_identity_swizzle
= false;
531 alu_src
.swizzle
[i
] = swiz
[i
];
534 if (num_components
== src
->num_components
&& is_identity_swizzle
)
537 return use_fmov
? nir_fmov_alu(build
, alu_src
, num_components
) :
538 nir_imov_alu(build
, alu_src
, num_components
);
541 /* Selects the right fdot given the number of components in each source. */
542 static inline nir_ssa_def
*
543 nir_fdot(nir_builder
*build
, nir_ssa_def
*src0
, nir_ssa_def
*src1
)
545 assert(src0
->num_components
== src1
->num_components
);
546 switch (src0
->num_components
) {
547 case 1: return nir_fmul(build
, src0
, src1
);
548 case 2: return nir_fdot2(build
, src0
, src1
);
549 case 3: return nir_fdot3(build
, src0
, src1
);
550 case 4: return nir_fdot4(build
, src0
, src1
);
552 unreachable("bad component size");
558 static inline nir_ssa_def
*
559 nir_bany_inequal(nir_builder
*b
, nir_ssa_def
*src0
, nir_ssa_def
*src1
)
561 switch (src0
->num_components
) {
562 case 1: return nir_ine(b
, src0
, src1
);
563 case 2: return nir_bany_inequal2(b
, src0
, src1
);
564 case 3: return nir_bany_inequal3(b
, src0
, src1
);
565 case 4: return nir_bany_inequal4(b
, src0
, src1
);
567 unreachable("bad component size");
571 static inline nir_ssa_def
*
572 nir_bany(nir_builder
*b
, nir_ssa_def
*src
)
574 return nir_bany_inequal(b
, src
, nir_imm_false(b
));
577 static inline nir_ssa_def
*
578 nir_channel(nir_builder
*b
, nir_ssa_def
*def
, unsigned c
)
580 return nir_swizzle(b
, def
, &c
, 1, false);
583 static inline nir_ssa_def
*
584 nir_channels(nir_builder
*b
, nir_ssa_def
*def
, nir_component_mask_t mask
)
586 unsigned num_channels
= 0, swizzle
[NIR_MAX_VEC_COMPONENTS
] = { 0 };
588 for (unsigned i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; i
++) {
589 if ((mask
& (1 << i
)) == 0)
591 swizzle
[num_channels
++] = i
;
594 return nir_swizzle(b
, def
, swizzle
, num_channels
, false);
597 static inline nir_ssa_def
*
598 _nir_vector_extract_helper(nir_builder
*b
, nir_ssa_def
*vec
, nir_ssa_def
*c
,
599 unsigned start
, unsigned end
)
601 if (start
== end
- 1) {
602 return nir_channel(b
, vec
, start
);
604 unsigned mid
= start
+ (end
- start
) / 2;
605 return nir_bcsel(b
, nir_ilt(b
, c
, nir_imm_int(b
, mid
)),
606 _nir_vector_extract_helper(b
, vec
, c
, start
, mid
),
607 _nir_vector_extract_helper(b
, vec
, c
, mid
, end
));
611 static inline nir_ssa_def
*
612 nir_vector_extract(nir_builder
*b
, nir_ssa_def
*vec
, nir_ssa_def
*c
)
614 nir_src c_src
= nir_src_for_ssa(c
);
615 if (nir_src_is_const(c_src
)) {
616 unsigned c_const
= nir_src_as_uint(c_src
);
617 if (c_const
< vec
->num_components
)
618 return nir_channel(b
, vec
, c_const
);
620 return nir_ssa_undef(b
, 1, vec
->bit_size
);
622 return _nir_vector_extract_helper(b
, vec
, c
, 0, vec
->num_components
);
626 static inline nir_ssa_def
*
627 nir_i2i(nir_builder
*build
, nir_ssa_def
*x
, unsigned dest_bit_size
)
629 if (x
->bit_size
== dest_bit_size
)
632 switch (dest_bit_size
) {
633 case 64: return nir_i2i64(build
, x
);
634 case 32: return nir_i2i32(build
, x
);
635 case 16: return nir_i2i16(build
, x
);
636 case 8: return nir_i2i8(build
, x
);
637 default: unreachable("Invalid bit size");
641 static inline nir_ssa_def
*
642 nir_u2u(nir_builder
*build
, nir_ssa_def
*x
, unsigned dest_bit_size
)
644 if (x
->bit_size
== dest_bit_size
)
647 switch (dest_bit_size
) {
648 case 64: return nir_u2u64(build
, x
);
649 case 32: return nir_u2u32(build
, x
);
650 case 16: return nir_u2u16(build
, x
);
651 case 8: return nir_u2u8(build
, x
);
652 default: unreachable("Invalid bit size");
656 static inline nir_ssa_def
*
657 nir_iadd_imm(nir_builder
*build
, nir_ssa_def
*x
, uint64_t y
)
659 assert(x
->bit_size
<= 64);
660 if (x
->bit_size
< 64)
661 y
&= (1ull << x
->bit_size
) - 1;
666 return nir_iadd(build
, x
, nir_imm_intN_t(build
, y
, x
->bit_size
));
670 static inline nir_ssa_def
*
671 nir_imul_imm(nir_builder
*build
, nir_ssa_def
*x
, uint64_t y
)
673 assert(x
->bit_size
<= 64);
674 if (x
->bit_size
< 64)
675 y
&= (1ull << x
->bit_size
) - 1;
678 return nir_imm_intN_t(build
, 0, x
->bit_size
);
681 } else if (util_is_power_of_two_or_zero64(y
)) {
682 return nir_ishl(build
, x
, nir_imm_int(build
, ffsll(y
) - 1));
684 return nir_imul(build
, x
, nir_imm_intN_t(build
, y
, x
->bit_size
));
688 static inline nir_ssa_def
*
689 nir_fadd_imm(nir_builder
*build
, nir_ssa_def
*x
, double y
)
691 return nir_fadd(build
, x
, nir_imm_floatN_t(build
, y
, x
->bit_size
));
694 static inline nir_ssa_def
*
695 nir_fmul_imm(nir_builder
*build
, nir_ssa_def
*x
, double y
)
697 return nir_fmul(build
, x
, nir_imm_floatN_t(build
, y
, x
->bit_size
));
700 static inline nir_ssa_def
*
701 nir_pack_bits(nir_builder
*b
, nir_ssa_def
*src
, unsigned dest_bit_size
)
703 assert(src
->num_components
* src
->bit_size
== dest_bit_size
);
705 switch (dest_bit_size
) {
707 switch (src
->bit_size
) {
708 case 32: return nir_pack_64_2x32(b
, src
);
709 case 16: return nir_pack_64_4x16(b
, src
);
715 if (src
->bit_size
== 16)
716 return nir_pack_32_2x16(b
, src
);
723 /* If we got here, we have no dedicated unpack opcode. */
724 nir_ssa_def
*dest
= nir_imm_intN_t(b
, 0, dest_bit_size
);
725 for (unsigned i
= 0; i
< src
->num_components
; i
++) {
726 nir_ssa_def
*val
= nir_u2u(b
, nir_channel(b
, src
, i
), dest_bit_size
);
727 val
= nir_ishl(b
, val
, nir_imm_int(b
, i
* src
->bit_size
));
728 dest
= nir_ior(b
, dest
, val
);
733 static inline nir_ssa_def
*
734 nir_unpack_bits(nir_builder
*b
, nir_ssa_def
*src
, unsigned dest_bit_size
)
736 assert(src
->num_components
== 1);
737 assert(src
->bit_size
> dest_bit_size
);
738 const unsigned dest_num_components
= src
->bit_size
/ dest_bit_size
;
739 assert(dest_num_components
<= NIR_MAX_VEC_COMPONENTS
);
741 switch (src
->bit_size
) {
743 switch (dest_bit_size
) {
744 case 32: return nir_unpack_64_2x32(b
, src
);
745 case 16: return nir_unpack_64_4x16(b
, src
);
751 if (dest_bit_size
== 16)
752 return nir_unpack_32_2x16(b
, src
);
759 /* If we got here, we have no dedicated unpack opcode. */
760 nir_ssa_def
*dest_comps
[NIR_MAX_VEC_COMPONENTS
];
761 for (unsigned i
= 0; i
< dest_num_components
; i
++) {
762 nir_ssa_def
*val
= nir_ushr(b
, src
, nir_imm_int(b
, i
* dest_bit_size
));
763 dest_comps
[i
] = nir_u2u(b
, val
, dest_bit_size
);
765 return nir_vec(b
, dest_comps
, dest_num_components
);
768 static inline nir_ssa_def
*
769 nir_bitcast_vector(nir_builder
*b
, nir_ssa_def
*src
, unsigned dest_bit_size
)
771 assert((src
->bit_size
* src
->num_components
) % dest_bit_size
== 0);
772 const unsigned dest_num_components
=
773 (src
->bit_size
* src
->num_components
) / dest_bit_size
;
774 assert(dest_num_components
<= NIR_MAX_VEC_COMPONENTS
);
776 if (src
->bit_size
> dest_bit_size
) {
777 assert(src
->bit_size
% dest_bit_size
== 0);
778 if (src
->num_components
== 1) {
779 return nir_unpack_bits(b
, src
, dest_bit_size
);
781 const unsigned divisor
= src
->bit_size
/ dest_bit_size
;
782 assert(src
->num_components
* divisor
== dest_num_components
);
783 nir_ssa_def
*dest
[NIR_MAX_VEC_COMPONENTS
];
784 for (unsigned i
= 0; i
< src
->num_components
; i
++) {
785 nir_ssa_def
*unpacked
=
786 nir_unpack_bits(b
, nir_channel(b
, src
, i
), dest_bit_size
);
787 assert(unpacked
->num_components
== divisor
);
788 for (unsigned j
= 0; j
< divisor
; j
++)
789 dest
[i
* divisor
+ j
] = nir_channel(b
, unpacked
, j
);
791 return nir_vec(b
, dest
, dest_num_components
);
793 } else if (src
->bit_size
< dest_bit_size
) {
794 assert(dest_bit_size
% src
->bit_size
== 0);
795 if (dest_num_components
== 1) {
796 return nir_pack_bits(b
, src
, dest_bit_size
);
798 const unsigned divisor
= dest_bit_size
/ src
->bit_size
;
799 assert(src
->num_components
== dest_num_components
* divisor
);
800 nir_ssa_def
*dest
[NIR_MAX_VEC_COMPONENTS
];
801 for (unsigned i
= 0; i
< dest_num_components
; i
++) {
802 nir_component_mask_t src_mask
=
803 ((1 << divisor
) - 1) << (i
* divisor
);
804 dest
[i
] = nir_pack_bits(b
, nir_channels(b
, src
, src_mask
),
807 return nir_vec(b
, dest
, dest_num_components
);
810 assert(src
->bit_size
== dest_bit_size
);
816 * Turns a nir_src into a nir_ssa_def * so it can be passed to
817 * nir_build_alu()-based builder calls.
819 * See nir_ssa_for_alu_src() for alu instructions.
821 static inline nir_ssa_def
*
822 nir_ssa_for_src(nir_builder
*build
, nir_src src
, int num_components
)
824 if (src
.is_ssa
&& src
.ssa
->num_components
== num_components
)
827 nir_alu_src alu
= { NIR_SRC_INIT
};
829 for (int j
= 0; j
< 4; j
++)
832 return nir_imov_alu(build
, alu
, num_components
);
836 * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
837 * nir_alu_src's swizzle.
839 static inline nir_ssa_def
*
840 nir_ssa_for_alu_src(nir_builder
*build
, nir_alu_instr
*instr
, unsigned srcn
)
842 static uint8_t trivial_swizzle
[NIR_MAX_VEC_COMPONENTS
];
843 for (int i
= 0; i
< NIR_MAX_VEC_COMPONENTS
; ++i
)
844 trivial_swizzle
[i
] = i
;
845 nir_alu_src
*src
= &instr
->src
[srcn
];
846 unsigned num_components
= nir_ssa_alu_instr_src_components(instr
, srcn
);
848 if (src
->src
.is_ssa
&& (src
->src
.ssa
->num_components
== num_components
) &&
849 !src
->abs
&& !src
->negate
&&
850 (memcmp(src
->swizzle
, trivial_swizzle
, num_components
) == 0))
853 return nir_imov_alu(build
, *src
, num_components
);
856 static inline unsigned
857 nir_get_ptr_bitsize(nir_builder
*build
)
859 if (build
->shader
->info
.stage
== MESA_SHADER_KERNEL
)
860 return build
->shader
->info
.cs
.ptr_size
;
864 static inline nir_deref_instr
*
865 nir_build_deref_var(nir_builder
*build
, nir_variable
*var
)
867 nir_deref_instr
*deref
=
868 nir_deref_instr_create(build
->shader
, nir_deref_type_var
);
870 deref
->mode
= var
->data
.mode
;
871 deref
->type
= var
->type
;
874 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
, 1,
875 nir_get_ptr_bitsize(build
), NULL
);
877 nir_builder_instr_insert(build
, &deref
->instr
);
882 static inline nir_deref_instr
*
883 nir_build_deref_array(nir_builder
*build
, nir_deref_instr
*parent
,
886 assert(glsl_type_is_array(parent
->type
) ||
887 glsl_type_is_matrix(parent
->type
) ||
888 glsl_type_is_vector(parent
->type
));
890 assert(index
->bit_size
== parent
->dest
.ssa
.bit_size
);
892 nir_deref_instr
*deref
=
893 nir_deref_instr_create(build
->shader
, nir_deref_type_array
);
895 deref
->mode
= parent
->mode
;
896 deref
->type
= glsl_get_array_element(parent
->type
);
897 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
898 deref
->arr
.index
= nir_src_for_ssa(index
);
900 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
901 parent
->dest
.ssa
.num_components
,
902 parent
->dest
.ssa
.bit_size
, NULL
);
904 nir_builder_instr_insert(build
, &deref
->instr
);
909 static inline nir_deref_instr
*
910 nir_build_deref_array_imm(nir_builder
*build
, nir_deref_instr
*parent
,
913 assert(parent
->dest
.is_ssa
);
914 nir_ssa_def
*idx_ssa
= nir_imm_intN_t(build
, index
,
915 parent
->dest
.ssa
.bit_size
);
917 return nir_build_deref_array(build
, parent
, idx_ssa
);
920 static inline nir_deref_instr
*
921 nir_build_deref_ptr_as_array(nir_builder
*build
, nir_deref_instr
*parent
,
924 assert(parent
->deref_type
== nir_deref_type_array
||
925 parent
->deref_type
== nir_deref_type_ptr_as_array
||
926 parent
->deref_type
== nir_deref_type_cast
);
928 assert(index
->bit_size
== parent
->dest
.ssa
.bit_size
);
930 nir_deref_instr
*deref
=
931 nir_deref_instr_create(build
->shader
, nir_deref_type_ptr_as_array
);
933 deref
->mode
= parent
->mode
;
934 deref
->type
= parent
->type
;
935 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
936 deref
->arr
.index
= nir_src_for_ssa(index
);
938 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
939 parent
->dest
.ssa
.num_components
,
940 parent
->dest
.ssa
.bit_size
, NULL
);
942 nir_builder_instr_insert(build
, &deref
->instr
);
947 static inline nir_deref_instr
*
948 nir_build_deref_array_wildcard(nir_builder
*build
, nir_deref_instr
*parent
)
950 assert(glsl_type_is_array(parent
->type
) ||
951 glsl_type_is_matrix(parent
->type
));
953 nir_deref_instr
*deref
=
954 nir_deref_instr_create(build
->shader
, nir_deref_type_array_wildcard
);
956 deref
->mode
= parent
->mode
;
957 deref
->type
= glsl_get_array_element(parent
->type
);
958 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
960 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
961 parent
->dest
.ssa
.num_components
,
962 parent
->dest
.ssa
.bit_size
, NULL
);
964 nir_builder_instr_insert(build
, &deref
->instr
);
969 static inline nir_deref_instr
*
970 nir_build_deref_struct(nir_builder
*build
, nir_deref_instr
*parent
,
973 assert(glsl_type_is_struct_or_ifc(parent
->type
));
975 nir_deref_instr
*deref
=
976 nir_deref_instr_create(build
->shader
, nir_deref_type_struct
);
978 deref
->mode
= parent
->mode
;
979 deref
->type
= glsl_get_struct_field(parent
->type
, index
);
980 deref
->parent
= nir_src_for_ssa(&parent
->dest
.ssa
);
981 deref
->strct
.index
= index
;
983 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
984 parent
->dest
.ssa
.num_components
,
985 parent
->dest
.ssa
.bit_size
, NULL
);
987 nir_builder_instr_insert(build
, &deref
->instr
);
992 static inline nir_deref_instr
*
993 nir_build_deref_cast(nir_builder
*build
, nir_ssa_def
*parent
,
994 nir_variable_mode mode
, const struct glsl_type
*type
,
997 nir_deref_instr
*deref
=
998 nir_deref_instr_create(build
->shader
, nir_deref_type_cast
);
1002 deref
->parent
= nir_src_for_ssa(parent
);
1003 deref
->cast
.ptr_stride
= ptr_stride
;
1005 nir_ssa_dest_init(&deref
->instr
, &deref
->dest
,
1006 parent
->num_components
, parent
->bit_size
, NULL
);
1008 nir_builder_instr_insert(build
, &deref
->instr
);
1013 /** Returns a deref that follows another but starting from the given parent
1015 * The new deref will be the same type and take the same array or struct index
1016 * as the leader deref but it may have a different parent. This is very
1017 * useful for walking deref paths.
1019 static inline nir_deref_instr
*
1020 nir_build_deref_follower(nir_builder
*b
, nir_deref_instr
*parent
,
1021 nir_deref_instr
*leader
)
1023 /* If the derefs would have the same parent, don't make a new one */
1024 assert(leader
->parent
.is_ssa
);
1025 if (leader
->parent
.ssa
== &parent
->dest
.ssa
)
1028 UNUSED nir_deref_instr
*leader_parent
= nir_src_as_deref(leader
->parent
);
1030 switch (leader
->deref_type
) {
1031 case nir_deref_type_var
:
1032 unreachable("A var dereference cannot have a parent");
1035 case nir_deref_type_array
:
1036 case nir_deref_type_array_wildcard
:
1037 assert(glsl_type_is_matrix(parent
->type
) ||
1038 glsl_type_is_array(parent
->type
) ||
1039 (leader
->deref_type
== nir_deref_type_array
&&
1040 glsl_type_is_vector(parent
->type
)));
1041 assert(glsl_get_length(parent
->type
) ==
1042 glsl_get_length(leader_parent
->type
));
1044 if (leader
->deref_type
== nir_deref_type_array
) {
1045 assert(leader
->arr
.index
.is_ssa
);
1046 nir_ssa_def
*index
= nir_i2i(b
, leader
->arr
.index
.ssa
,
1047 parent
->dest
.ssa
.bit_size
);
1048 return nir_build_deref_array(b
, parent
, index
);
1050 return nir_build_deref_array_wildcard(b
, parent
);
1053 case nir_deref_type_struct
:
1054 assert(glsl_type_is_struct_or_ifc(parent
->type
));
1055 assert(glsl_get_length(parent
->type
) ==
1056 glsl_get_length(leader_parent
->type
));
1058 return nir_build_deref_struct(b
, parent
, leader
->strct
.index
);
1061 unreachable("Invalid deref instruction type");
1065 static inline nir_ssa_def
*
1066 nir_load_reg(nir_builder
*build
, nir_register
*reg
)
1068 return nir_ssa_for_src(build
, nir_src_for_reg(reg
), reg
->num_components
);
1071 static inline nir_ssa_def
*
1072 nir_load_deref_with_access(nir_builder
*build
, nir_deref_instr
*deref
,
1073 enum gl_access_qualifier access
)
1075 nir_intrinsic_instr
*load
=
1076 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_load_deref
);
1077 load
->num_components
= glsl_get_vector_elements(deref
->type
);
1078 load
->src
[0] = nir_src_for_ssa(&deref
->dest
.ssa
);
1079 nir_ssa_dest_init(&load
->instr
, &load
->dest
, load
->num_components
,
1080 glsl_get_bit_size(deref
->type
), NULL
);
1081 nir_intrinsic_set_access(load
, access
);
1082 nir_builder_instr_insert(build
, &load
->instr
);
1083 return &load
->dest
.ssa
;
1086 static inline nir_ssa_def
*
1087 nir_load_deref(nir_builder
*build
, nir_deref_instr
*deref
)
1089 return nir_load_deref_with_access(build
, deref
, (enum gl_access_qualifier
)0);
1093 nir_store_deref_with_access(nir_builder
*build
, nir_deref_instr
*deref
,
1094 nir_ssa_def
*value
, unsigned writemask
,
1095 enum gl_access_qualifier access
)
1097 nir_intrinsic_instr
*store
=
1098 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_store_deref
);
1099 store
->num_components
= glsl_get_vector_elements(deref
->type
);
1100 store
->src
[0] = nir_src_for_ssa(&deref
->dest
.ssa
);
1101 store
->src
[1] = nir_src_for_ssa(value
);
1102 nir_intrinsic_set_write_mask(store
,
1103 writemask
& ((1 << store
->num_components
) - 1));
1104 nir_intrinsic_set_access(store
, access
);
1105 nir_builder_instr_insert(build
, &store
->instr
);
1109 nir_store_deref(nir_builder
*build
, nir_deref_instr
*deref
,
1110 nir_ssa_def
*value
, unsigned writemask
)
1112 nir_store_deref_with_access(build
, deref
, value
, writemask
,
1113 (enum gl_access_qualifier
)0);
1117 nir_copy_deref(nir_builder
*build
, nir_deref_instr
*dest
, nir_deref_instr
*src
)
1119 nir_intrinsic_instr
*copy
=
1120 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_copy_deref
);
1121 copy
->src
[0] = nir_src_for_ssa(&dest
->dest
.ssa
);
1122 copy
->src
[1] = nir_src_for_ssa(&src
->dest
.ssa
);
1123 nir_builder_instr_insert(build
, ©
->instr
);
1126 static inline nir_ssa_def
*
1127 nir_load_var(nir_builder
*build
, nir_variable
*var
)
1129 return nir_load_deref(build
, nir_build_deref_var(build
, var
));
1133 nir_store_var(nir_builder
*build
, nir_variable
*var
, nir_ssa_def
*value
,
1136 nir_store_deref(build
, nir_build_deref_var(build
, var
), value
, writemask
);
1140 nir_copy_var(nir_builder
*build
, nir_variable
*dest
, nir_variable
*src
)
1142 nir_copy_deref(build
, nir_build_deref_var(build
, dest
),
1143 nir_build_deref_var(build
, src
));
1146 static inline nir_ssa_def
*
1147 nir_load_param(nir_builder
*build
, uint32_t param_idx
)
1149 assert(param_idx
< build
->impl
->function
->num_params
);
1150 nir_parameter
*param
= &build
->impl
->function
->params
[param_idx
];
1152 nir_intrinsic_instr
*load
=
1153 nir_intrinsic_instr_create(build
->shader
, nir_intrinsic_load_param
);
1154 nir_intrinsic_set_param_idx(load
, param_idx
);
1155 load
->num_components
= param
->num_components
;
1156 nir_ssa_dest_init(&load
->instr
, &load
->dest
,
1157 param
->num_components
, param
->bit_size
, NULL
);
1158 nir_builder_instr_insert(build
, &load
->instr
);
1159 return &load
->dest
.ssa
;
1162 #include "nir_builder_opcodes.h"
1164 static inline nir_ssa_def
*
1165 nir_f2b(nir_builder
*build
, nir_ssa_def
*f
)
1167 return nir_f2b1(build
, f
);
1170 static inline nir_ssa_def
*
1171 nir_i2b(nir_builder
*build
, nir_ssa_def
*i
)
1173 return nir_i2b1(build
, i
);
1176 static inline nir_ssa_def
*
1177 nir_b2f(nir_builder
*build
, nir_ssa_def
*b
, uint32_t bit_size
)
1180 case 64: return nir_b2f64(build
, b
);
1181 case 32: return nir_b2f32(build
, b
);
1182 case 16: return nir_b2f16(build
, b
);
1184 unreachable("Invalid bit-size");
1188 static inline nir_ssa_def
*
1189 nir_load_barycentric(nir_builder
*build
, nir_intrinsic_op op
,
1190 unsigned interp_mode
)
1192 nir_intrinsic_instr
*bary
= nir_intrinsic_instr_create(build
->shader
, op
);
1193 nir_ssa_dest_init(&bary
->instr
, &bary
->dest
, 2, 32, NULL
);
1194 nir_intrinsic_set_interp_mode(bary
, interp_mode
);
1195 nir_builder_instr_insert(build
, &bary
->instr
);
1196 return &bary
->dest
.ssa
;
1200 nir_jump(nir_builder
*build
, nir_jump_type jump_type
)
1202 nir_jump_instr
*jump
= nir_jump_instr_create(build
->shader
, jump_type
);
1203 nir_builder_instr_insert(build
, &jump
->instr
);
1206 static inline nir_ssa_def
*
1207 nir_compare_func(nir_builder
*b
, enum compare_func func
,
1208 nir_ssa_def
*src0
, nir_ssa_def
*src1
)
1211 case COMPARE_FUNC_NEVER
:
1212 return nir_imm_int(b
, 0);
1213 case COMPARE_FUNC_ALWAYS
:
1214 return nir_imm_int(b
, ~0);
1215 case COMPARE_FUNC_EQUAL
:
1216 return nir_feq(b
, src0
, src1
);
1217 case COMPARE_FUNC_NOTEQUAL
:
1218 return nir_fne(b
, src0
, src1
);
1219 case COMPARE_FUNC_GREATER
:
1220 return nir_flt(b
, src1
, src0
);
1221 case COMPARE_FUNC_GEQUAL
:
1222 return nir_fge(b
, src0
, src1
);
1223 case COMPARE_FUNC_LESS
:
1224 return nir_flt(b
, src0
, src1
);
1225 case COMPARE_FUNC_LEQUAL
:
1226 return nir_fge(b
, src1
, src0
);
1228 unreachable("bad compare func");
1231 #endif /* NIR_BUILDER_H */