nir: nir_build_deref_follower accept array derefs of vectors
[mesa.git] / src / compiler / nir / nir_builder.h
1 /*
2 * Copyright © 2014-2015 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef NIR_BUILDER_H
25 #define NIR_BUILDER_H
26
27 #include "nir_control_flow.h"
28 #include "util/half_float.h"
29
30 struct exec_list;
31
32 typedef struct nir_builder {
33 nir_cursor cursor;
34
35 /* Whether new ALU instructions will be marked "exact" */
36 bool exact;
37
38 nir_shader *shader;
39 nir_function_impl *impl;
40 } nir_builder;
41
42 static inline void
43 nir_builder_init(nir_builder *build, nir_function_impl *impl)
44 {
45 memset(build, 0, sizeof(*build));
46 build->exact = false;
47 build->impl = impl;
48 build->shader = impl->function->shader;
49 }
50
51 static inline void
52 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
53 gl_shader_stage stage,
54 const nir_shader_compiler_options *options)
55 {
56 build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
57 nir_function *func = nir_function_create(build->shader, "main");
58 func->is_entrypoint = true;
59 build->exact = false;
60 build->impl = nir_function_impl_create(func);
61 build->cursor = nir_after_cf_list(&build->impl->body);
62 }
63
64 static inline void
65 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
66 {
67 nir_instr_insert(build->cursor, instr);
68
69 /* Move the cursor forward. */
70 build->cursor = nir_after_instr(instr);
71 }
72
73 static inline nir_instr *
74 nir_builder_last_instr(nir_builder *build)
75 {
76 assert(build->cursor.option == nir_cursor_after_instr);
77 return build->cursor.instr;
78 }
79
80 static inline void
81 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
82 {
83 nir_cf_node_insert(build->cursor, cf);
84 }
85
86 static inline bool
87 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
88 {
89 nir_block *block = nir_cursor_current_block(build->cursor);
90 for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
91 if (n == cf_node)
92 return true;
93 }
94 return false;
95 }
96
97 static inline nir_if *
98 nir_push_if(nir_builder *build, nir_ssa_def *condition)
99 {
100 nir_if *nif = nir_if_create(build->shader);
101 nif->condition = nir_src_for_ssa(condition);
102 nir_builder_cf_insert(build, &nif->cf_node);
103 build->cursor = nir_before_cf_list(&nif->then_list);
104 return nif;
105 }
106
107 static inline nir_if *
108 nir_push_else(nir_builder *build, nir_if *nif)
109 {
110 if (nif) {
111 assert(nir_builder_is_inside_cf(build, &nif->cf_node));
112 } else {
113 nir_block *block = nir_cursor_current_block(build->cursor);
114 nif = nir_cf_node_as_if(block->cf_node.parent);
115 }
116 build->cursor = nir_before_cf_list(&nif->else_list);
117 return nif;
118 }
119
120 static inline void
121 nir_pop_if(nir_builder *build, nir_if *nif)
122 {
123 if (nif) {
124 assert(nir_builder_is_inside_cf(build, &nif->cf_node));
125 } else {
126 nir_block *block = nir_cursor_current_block(build->cursor);
127 nif = nir_cf_node_as_if(block->cf_node.parent);
128 }
129 build->cursor = nir_after_cf_node(&nif->cf_node);
130 }
131
132 static inline nir_ssa_def *
133 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
134 {
135 nir_block *block = nir_cursor_current_block(build->cursor);
136 nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
137
138 nir_phi_instr *phi = nir_phi_instr_create(build->shader);
139
140 nir_phi_src *src = ralloc(phi, nir_phi_src);
141 src->pred = nir_if_last_then_block(nif);
142 src->src = nir_src_for_ssa(then_def);
143 exec_list_push_tail(&phi->srcs, &src->node);
144
145 src = ralloc(phi, nir_phi_src);
146 src->pred = nir_if_last_else_block(nif);
147 src->src = nir_src_for_ssa(else_def);
148 exec_list_push_tail(&phi->srcs, &src->node);
149
150 assert(then_def->num_components == else_def->num_components);
151 assert(then_def->bit_size == else_def->bit_size);
152 nir_ssa_dest_init(&phi->instr, &phi->dest,
153 then_def->num_components, then_def->bit_size, NULL);
154
155 nir_builder_instr_insert(build, &phi->instr);
156
157 return &phi->dest.ssa;
158 }
159
160 static inline nir_loop *
161 nir_push_loop(nir_builder *build)
162 {
163 nir_loop *loop = nir_loop_create(build->shader);
164 nir_builder_cf_insert(build, &loop->cf_node);
165 build->cursor = nir_before_cf_list(&loop->body);
166 return loop;
167 }
168
169 static inline void
170 nir_pop_loop(nir_builder *build, nir_loop *loop)
171 {
172 if (loop) {
173 assert(nir_builder_is_inside_cf(build, &loop->cf_node));
174 } else {
175 nir_block *block = nir_cursor_current_block(build->cursor);
176 loop = nir_cf_node_as_loop(block->cf_node.parent);
177 }
178 build->cursor = nir_after_cf_node(&loop->cf_node);
179 }
180
181 static inline nir_ssa_def *
182 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
183 {
184 nir_ssa_undef_instr *undef =
185 nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
186 if (!undef)
187 return NULL;
188
189 nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
190
191 return &undef->def;
192 }
193
194 static inline nir_ssa_def *
195 nir_build_imm(nir_builder *build, unsigned num_components,
196 unsigned bit_size, nir_const_value value)
197 {
198 nir_load_const_instr *load_const =
199 nir_load_const_instr_create(build->shader, num_components, bit_size);
200 if (!load_const)
201 return NULL;
202
203 load_const->value = value;
204
205 nir_builder_instr_insert(build, &load_const->instr);
206
207 return &load_const->def;
208 }
209
210 static inline nir_ssa_def *
211 nir_imm_bool(nir_builder *build, bool x)
212 {
213 nir_const_value v;
214
215 memset(&v, 0, sizeof(v));
216 v.b[0] = x;
217
218 return nir_build_imm(build, 1, 1, v);
219 }
220
221 static inline nir_ssa_def *
222 nir_imm_true(nir_builder *build)
223 {
224 return nir_imm_bool(build, true);
225 }
226
227 static inline nir_ssa_def *
228 nir_imm_false(nir_builder *build)
229 {
230 return nir_imm_bool(build, false);
231 }
232
233 static inline nir_ssa_def *
234 nir_imm_float16(nir_builder *build, float x)
235 {
236 nir_const_value v;
237
238 memset(&v, 0, sizeof(v));
239 v.u16[0] = _mesa_float_to_half(x);
240
241 return nir_build_imm(build, 1, 16, v);
242 }
243
244 static inline nir_ssa_def *
245 nir_imm_float(nir_builder *build, float x)
246 {
247 nir_const_value v;
248
249 memset(&v, 0, sizeof(v));
250 v.f32[0] = x;
251
252 return nir_build_imm(build, 1, 32, v);
253 }
254
255 static inline nir_ssa_def *
256 nir_imm_double(nir_builder *build, double x)
257 {
258 nir_const_value v;
259
260 memset(&v, 0, sizeof(v));
261 v.f64[0] = x;
262
263 return nir_build_imm(build, 1, 64, v);
264 }
265
266 static inline nir_ssa_def *
267 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
268 {
269 switch (bit_size) {
270 case 16:
271 return nir_imm_float16(build, x);
272 case 32:
273 return nir_imm_float(build, x);
274 case 64:
275 return nir_imm_double(build, x);
276 }
277
278 unreachable("unknown float immediate bit size");
279 }
280
281 static inline nir_ssa_def *
282 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
283 {
284 nir_const_value v;
285
286 memset(&v, 0, sizeof(v));
287 v.f32[0] = x;
288 v.f32[1] = y;
289 v.f32[2] = z;
290 v.f32[3] = w;
291
292 return nir_build_imm(build, 4, 32, v);
293 }
294
295 static inline nir_ssa_def *
296 nir_imm_ivec2(nir_builder *build, int x, int y)
297 {
298 nir_const_value v;
299
300 memset(&v, 0, sizeof(v));
301 v.i32[0] = x;
302 v.i32[1] = y;
303
304 return nir_build_imm(build, 2, 32, v);
305 }
306
307 static inline nir_ssa_def *
308 nir_imm_int(nir_builder *build, int x)
309 {
310 nir_const_value v;
311
312 memset(&v, 0, sizeof(v));
313 v.i32[0] = x;
314
315 return nir_build_imm(build, 1, 32, v);
316 }
317
318 static inline nir_ssa_def *
319 nir_imm_int64(nir_builder *build, int64_t x)
320 {
321 nir_const_value v;
322
323 memset(&v, 0, sizeof(v));
324 v.i64[0] = x;
325
326 return nir_build_imm(build, 1, 64, v);
327 }
328
329 static inline nir_ssa_def *
330 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
331 {
332 nir_const_value v;
333
334 memset(&v, 0, sizeof(v));
335 assert(bit_size <= 64);
336 if (bit_size == 1)
337 v.b[0] = x & 1;
338 else
339 v.i64[0] = x & (~0ull >> (64 - bit_size));
340
341 return nir_build_imm(build, 1, bit_size, v);
342 }
343
344 static inline nir_ssa_def *
345 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
346 {
347 nir_const_value v;
348
349 memset(&v, 0, sizeof(v));
350 v.i32[0] = x;
351 v.i32[1] = y;
352 v.i32[2] = z;
353 v.i32[3] = w;
354
355 return nir_build_imm(build, 4, 32, v);
356 }
357
358 static inline nir_ssa_def *
359 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
360 {
361 /* We use a 0/-1 convention for all booleans regardless of size */
362 return nir_imm_intN_t(build, -(int)x, bit_size);
363 }
364
365 static inline nir_ssa_def *
366 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
367 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
368 {
369 const nir_op_info *op_info = &nir_op_infos[op];
370 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
371 if (!instr)
372 return NULL;
373
374 instr->exact = build->exact;
375
376 instr->src[0].src = nir_src_for_ssa(src0);
377 if (src1)
378 instr->src[1].src = nir_src_for_ssa(src1);
379 if (src2)
380 instr->src[2].src = nir_src_for_ssa(src2);
381 if (src3)
382 instr->src[3].src = nir_src_for_ssa(src3);
383
384 /* Guess the number of components the destination temporary should have
385 * based on our input sizes, if it's not fixed for the op.
386 */
387 unsigned num_components = op_info->output_size;
388 if (num_components == 0) {
389 for (unsigned i = 0; i < op_info->num_inputs; i++) {
390 if (op_info->input_sizes[i] == 0)
391 num_components = MAX2(num_components,
392 instr->src[i].src.ssa->num_components);
393 }
394 }
395 assert(num_components != 0);
396
397 /* Figure out the bitwidth based on the source bitwidth if the instruction
398 * is variable-width.
399 */
400 unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
401 if (bit_size == 0) {
402 for (unsigned i = 0; i < op_info->num_inputs; i++) {
403 unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
404 if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
405 if (bit_size)
406 assert(src_bit_size == bit_size);
407 else
408 bit_size = src_bit_size;
409 } else {
410 assert(src_bit_size ==
411 nir_alu_type_get_type_size(op_info->input_types[i]));
412 }
413 }
414 }
415
416 /* When in doubt, assume 32. */
417 if (bit_size == 0)
418 bit_size = 32;
419
420 /* Make sure we don't swizzle from outside of our source vector (like if a
421 * scalar value was passed into a multiply with a vector).
422 */
423 for (unsigned i = 0; i < op_info->num_inputs; i++) {
424 for (unsigned j = instr->src[i].src.ssa->num_components;
425 j < NIR_MAX_VEC_COMPONENTS; j++) {
426 instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
427 }
428 }
429
430 nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
431 bit_size, NULL);
432 instr->dest.write_mask = (1 << num_components) - 1;
433
434 nir_builder_instr_insert(build, &instr->instr);
435
436 return &instr->dest.dest.ssa;
437 }
438
439 #include "nir_builder_opcodes.h"
440
441 static inline nir_ssa_def *
442 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
443 {
444 switch (num_components) {
445 case 4:
446 return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
447 case 3:
448 return nir_vec3(build, comp[0], comp[1], comp[2]);
449 case 2:
450 return nir_vec2(build, comp[0], comp[1]);
451 case 1:
452 return comp[0];
453 default:
454 unreachable("bad component count");
455 return NULL;
456 }
457 }
458
459 /**
460 * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
461 */
462 static inline nir_ssa_def *
463 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
464 {
465 nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
466 nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
467 nir_src_bit_size(src.src), NULL);
468 mov->exact = build->exact;
469 mov->dest.write_mask = (1 << num_components) - 1;
470 mov->src[0] = src;
471 nir_builder_instr_insert(build, &mov->instr);
472
473 return &mov->dest.dest.ssa;
474 }
475
476 static inline nir_ssa_def *
477 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
478 {
479 nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
480 nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
481 nir_src_bit_size(src.src), NULL);
482 mov->exact = build->exact;
483 mov->dest.write_mask = (1 << num_components) - 1;
484 mov->src[0] = src;
485 nir_builder_instr_insert(build, &mov->instr);
486
487 return &mov->dest.dest.ssa;
488 }
489
490 /**
491 * Construct an fmov or imov that reswizzles the source's components.
492 */
493 static inline nir_ssa_def *
494 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
495 unsigned num_components, bool use_fmov)
496 {
497 assert(num_components <= NIR_MAX_VEC_COMPONENTS);
498 nir_alu_src alu_src = { NIR_SRC_INIT };
499 alu_src.src = nir_src_for_ssa(src);
500 for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++)
501 alu_src.swizzle[i] = swiz[i];
502
503 return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
504 nir_imov_alu(build, alu_src, num_components);
505 }
506
507 /* Selects the right fdot given the number of components in each source. */
508 static inline nir_ssa_def *
509 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
510 {
511 assert(src0->num_components == src1->num_components);
512 switch (src0->num_components) {
513 case 1: return nir_fmul(build, src0, src1);
514 case 2: return nir_fdot2(build, src0, src1);
515 case 3: return nir_fdot3(build, src0, src1);
516 case 4: return nir_fdot4(build, src0, src1);
517 default:
518 unreachable("bad component size");
519 }
520
521 return NULL;
522 }
523
524 static inline nir_ssa_def *
525 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
526 {
527 switch (src0->num_components) {
528 case 1: return nir_ine(b, src0, src1);
529 case 2: return nir_bany_inequal2(b, src0, src1);
530 case 3: return nir_bany_inequal3(b, src0, src1);
531 case 4: return nir_bany_inequal4(b, src0, src1);
532 default:
533 unreachable("bad component size");
534 }
535 }
536
537 static inline nir_ssa_def *
538 nir_bany(nir_builder *b, nir_ssa_def *src)
539 {
540 return nir_bany_inequal(b, src, nir_imm_false(b));
541 }
542
543 static inline nir_ssa_def *
544 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
545 {
546 return nir_swizzle(b, def, &c, 1, false);
547 }
548
549 static inline nir_ssa_def *
550 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
551 {
552 unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
553
554 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
555 if ((mask & (1 << i)) == 0)
556 continue;
557 swizzle[num_channels++] = i;
558 }
559
560 return nir_swizzle(b, def, swizzle, num_channels, false);
561 }
562
563 static inline nir_ssa_def *
564 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
565 {
566 if (x->bit_size == dest_bit_size)
567 return x;
568
569 switch (dest_bit_size) {
570 case 64: return nir_i2i64(build, x);
571 case 32: return nir_i2i32(build, x);
572 case 16: return nir_i2i16(build, x);
573 case 8: return nir_i2i8(build, x);
574 default: unreachable("Invalid bit size");
575 }
576 }
577
578 static inline nir_ssa_def *
579 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
580 {
581 if (x->bit_size == dest_bit_size)
582 return x;
583
584 switch (dest_bit_size) {
585 case 64: return nir_u2u64(build, x);
586 case 32: return nir_u2u32(build, x);
587 case 16: return nir_u2u16(build, x);
588 case 8: return nir_u2u8(build, x);
589 default: unreachable("Invalid bit size");
590 }
591 }
592
593 static inline nir_ssa_def *
594 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
595 {
596 return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
597 }
598
599 static inline nir_ssa_def *
600 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
601 {
602 return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
603 }
604
605 static inline nir_ssa_def *
606 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
607 {
608 return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
609 }
610
611 static inline nir_ssa_def *
612 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
613 {
614 return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
615 }
616
617 static inline nir_ssa_def *
618 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
619 {
620 assert(src->num_components * src->bit_size == dest_bit_size);
621
622 switch (dest_bit_size) {
623 case 64:
624 switch (src->bit_size) {
625 case 32: return nir_pack_64_2x32(b, src);
626 case 16: return nir_pack_64_4x16(b, src);
627 default: break;
628 }
629 break;
630
631 case 32:
632 if (src->bit_size == 16)
633 return nir_pack_32_2x16(b, src);
634 break;
635
636 default:
637 break;
638 }
639
640 /* If we got here, we have no dedicated unpack opcode. */
641 nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
642 for (unsigned i = 0; i < src->num_components; i++) {
643 nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
644 val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
645 dest = nir_ior(b, dest, val);
646 }
647 return dest;
648 }
649
650 static inline nir_ssa_def *
651 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
652 {
653 assert(src->num_components == 1);
654 assert(src->bit_size > dest_bit_size);
655 const unsigned dest_num_components = src->bit_size / dest_bit_size;
656 assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
657
658 switch (src->bit_size) {
659 case 64:
660 switch (dest_bit_size) {
661 case 32: return nir_unpack_64_2x32(b, src);
662 case 16: return nir_unpack_64_4x16(b, src);
663 default: break;
664 }
665 break;
666
667 case 32:
668 if (dest_bit_size == 16)
669 return nir_unpack_32_2x16(b, src);
670 break;
671
672 default:
673 break;
674 }
675
676 /* If we got here, we have no dedicated unpack opcode. */
677 nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
678 for (unsigned i = 0; i < dest_num_components; i++) {
679 nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
680 dest_comps[i] = nir_u2u(b, val, dest_bit_size);
681 }
682 return nir_vec(b, dest_comps, dest_num_components);
683 }
684
685 static inline nir_ssa_def *
686 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
687 {
688 assert((src->bit_size * src->num_components) % dest_bit_size == 0);
689 const unsigned dest_num_components =
690 (src->bit_size * src->num_components) / dest_bit_size;
691 assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
692
693 if (src->bit_size > dest_bit_size) {
694 assert(src->bit_size % dest_bit_size == 0);
695 if (src->num_components == 1) {
696 return nir_unpack_bits(b, src, dest_bit_size);
697 } else {
698 const unsigned divisor = src->bit_size / dest_bit_size;
699 assert(src->num_components * divisor == dest_num_components);
700 nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
701 for (unsigned i = 0; i < src->num_components; i++) {
702 nir_ssa_def *unpacked =
703 nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
704 assert(unpacked->num_components == divisor);
705 for (unsigned j = 0; j < divisor; j++)
706 dest[i * divisor + j] = nir_channel(b, unpacked, j);
707 }
708 return nir_vec(b, dest, dest_num_components);
709 }
710 } else if (src->bit_size < dest_bit_size) {
711 assert(dest_bit_size % src->bit_size == 0);
712 if (dest_num_components == 1) {
713 return nir_pack_bits(b, src, dest_bit_size);
714 } else {
715 const unsigned divisor = dest_bit_size / src->bit_size;
716 assert(src->num_components == dest_num_components * divisor);
717 nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
718 for (unsigned i = 0; i < dest_num_components; i++) {
719 nir_component_mask_t src_mask =
720 ((1 << divisor) - 1) << (i * divisor);
721 dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
722 dest_bit_size);
723 }
724 return nir_vec(b, dest, dest_num_components);
725 }
726 } else {
727 assert(src->bit_size == dest_bit_size);
728 return src;
729 }
730 }
731
732 /**
733 * Turns a nir_src into a nir_ssa_def * so it can be passed to
734 * nir_build_alu()-based builder calls.
735 *
736 * See nir_ssa_for_alu_src() for alu instructions.
737 */
738 static inline nir_ssa_def *
739 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
740 {
741 if (src.is_ssa && src.ssa->num_components == num_components)
742 return src.ssa;
743
744 nir_alu_src alu = { NIR_SRC_INIT };
745 alu.src = src;
746 for (int j = 0; j < 4; j++)
747 alu.swizzle[j] = j;
748
749 return nir_imov_alu(build, alu, num_components);
750 }
751
752 /**
753 * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
754 * nir_alu_src's swizzle.
755 */
756 static inline nir_ssa_def *
757 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
758 {
759 static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
760 for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
761 trivial_swizzle[i] = i;
762 nir_alu_src *src = &instr->src[srcn];
763 unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
764
765 if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
766 !src->abs && !src->negate &&
767 (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
768 return src->src.ssa;
769
770 return nir_imov_alu(build, *src, num_components);
771 }
772
773 static inline nir_deref_instr *
774 nir_build_deref_var(nir_builder *build, nir_variable *var)
775 {
776 nir_deref_instr *deref =
777 nir_deref_instr_create(build->shader, nir_deref_type_var);
778
779 deref->mode = var->data.mode;
780 deref->type = var->type;
781 deref->var = var;
782
783 nir_ssa_dest_init(&deref->instr, &deref->dest, 1, 32, NULL);
784
785 nir_builder_instr_insert(build, &deref->instr);
786
787 return deref;
788 }
789
790 static inline nir_deref_instr *
791 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
792 nir_ssa_def *index)
793 {
794 assert(glsl_type_is_array(parent->type) ||
795 glsl_type_is_matrix(parent->type) ||
796 glsl_type_is_vector(parent->type));
797
798 nir_deref_instr *deref =
799 nir_deref_instr_create(build->shader, nir_deref_type_array);
800
801 deref->mode = parent->mode;
802 deref->type = glsl_get_array_element(parent->type);
803 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
804 deref->arr.index = nir_src_for_ssa(index);
805
806 nir_ssa_dest_init(&deref->instr, &deref->dest,
807 parent->dest.ssa.num_components,
808 parent->dest.ssa.bit_size, NULL);
809
810 nir_builder_instr_insert(build, &deref->instr);
811
812 return deref;
813 }
814
815 static inline nir_deref_instr *
816 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
817 nir_ssa_def *index)
818 {
819 assert(parent->deref_type == nir_deref_type_array ||
820 parent->deref_type == nir_deref_type_ptr_as_array ||
821 parent->deref_type == nir_deref_type_cast);
822
823 nir_deref_instr *deref =
824 nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
825
826 deref->mode = parent->mode;
827 deref->type = parent->type;
828 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
829 deref->arr.index = nir_src_for_ssa(index);
830
831 nir_ssa_dest_init(&deref->instr, &deref->dest,
832 parent->dest.ssa.num_components,
833 parent->dest.ssa.bit_size, NULL);
834
835 nir_builder_instr_insert(build, &deref->instr);
836
837 return deref;
838 }
839
840 static inline nir_deref_instr *
841 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
842 {
843 assert(glsl_type_is_array(parent->type) ||
844 glsl_type_is_matrix(parent->type));
845
846 nir_deref_instr *deref =
847 nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
848
849 deref->mode = parent->mode;
850 deref->type = glsl_get_array_element(parent->type);
851 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
852
853 nir_ssa_dest_init(&deref->instr, &deref->dest,
854 parent->dest.ssa.num_components,
855 parent->dest.ssa.bit_size, NULL);
856
857 nir_builder_instr_insert(build, &deref->instr);
858
859 return deref;
860 }
861
862 static inline nir_deref_instr *
863 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
864 unsigned index)
865 {
866 assert(glsl_type_is_struct(parent->type));
867
868 nir_deref_instr *deref =
869 nir_deref_instr_create(build->shader, nir_deref_type_struct);
870
871 deref->mode = parent->mode;
872 deref->type = glsl_get_struct_field(parent->type, index);
873 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
874 deref->strct.index = index;
875
876 nir_ssa_dest_init(&deref->instr, &deref->dest,
877 parent->dest.ssa.num_components,
878 parent->dest.ssa.bit_size, NULL);
879
880 nir_builder_instr_insert(build, &deref->instr);
881
882 return deref;
883 }
884
885 static inline nir_deref_instr *
886 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
887 nir_variable_mode mode, const struct glsl_type *type,
888 unsigned ptr_stride)
889 {
890 nir_deref_instr *deref =
891 nir_deref_instr_create(build->shader, nir_deref_type_cast);
892
893 deref->mode = mode;
894 deref->type = type;
895 deref->parent = nir_src_for_ssa(parent);
896 deref->cast.ptr_stride = ptr_stride;
897
898 nir_ssa_dest_init(&deref->instr, &deref->dest,
899 parent->num_components, parent->bit_size, NULL);
900
901 nir_builder_instr_insert(build, &deref->instr);
902
903 return deref;
904 }
905
906 /** Returns a deref that follows another but starting from the given parent
907 *
908 * The new deref will be the same type and take the same array or struct index
909 * as the leader deref but it may have a different parent. This is very
910 * useful for walking deref paths.
911 */
912 static inline nir_deref_instr *
913 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
914 nir_deref_instr *leader)
915 {
916 /* If the derefs would have the same parent, don't make a new one */
917 assert(leader->parent.is_ssa);
918 if (leader->parent.ssa == &parent->dest.ssa)
919 return leader;
920
921 UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
922
923 switch (leader->deref_type) {
924 case nir_deref_type_var:
925 unreachable("A var dereference cannot have a parent");
926 break;
927
928 case nir_deref_type_array:
929 case nir_deref_type_array_wildcard:
930 assert(glsl_type_is_matrix(parent->type) ||
931 glsl_type_is_array(parent->type) ||
932 (leader->deref_type == nir_deref_type_array &&
933 glsl_type_is_vector(parent->type)));
934 assert(glsl_get_length(parent->type) ==
935 glsl_get_length(leader_parent->type));
936
937 if (leader->deref_type == nir_deref_type_array) {
938 assert(leader->arr.index.is_ssa);
939 return nir_build_deref_array(b, parent, leader->arr.index.ssa);
940 } else {
941 return nir_build_deref_array_wildcard(b, parent);
942 }
943
944 case nir_deref_type_struct:
945 assert(glsl_type_is_struct(parent->type));
946 assert(glsl_get_length(parent->type) ==
947 glsl_get_length(leader_parent->type));
948
949 return nir_build_deref_struct(b, parent, leader->strct.index);
950
951 default:
952 unreachable("Invalid deref instruction type");
953 }
954 }
955
956 static inline nir_ssa_def *
957 nir_load_reg(nir_builder *build, nir_register *reg)
958 {
959 return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
960 }
961
962 static inline nir_ssa_def *
963 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
964 {
965 nir_intrinsic_instr *load =
966 nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
967 load->num_components = glsl_get_vector_elements(deref->type);
968 load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
969 nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
970 glsl_get_bit_size(deref->type), NULL);
971 nir_builder_instr_insert(build, &load->instr);
972 return &load->dest.ssa;
973 }
974
975 static inline void
976 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
977 nir_ssa_def *value, unsigned writemask)
978 {
979 nir_intrinsic_instr *store =
980 nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
981 store->num_components = glsl_get_vector_elements(deref->type);
982 store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
983 store->src[1] = nir_src_for_ssa(value);
984 nir_intrinsic_set_write_mask(store,
985 writemask & ((1 << store->num_components) - 1));
986 nir_builder_instr_insert(build, &store->instr);
987 }
988
989 static inline void
990 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
991 {
992 nir_intrinsic_instr *copy =
993 nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
994 copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
995 copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
996 nir_builder_instr_insert(build, &copy->instr);
997 }
998
999 static inline nir_ssa_def *
1000 nir_load_var(nir_builder *build, nir_variable *var)
1001 {
1002 return nir_load_deref(build, nir_build_deref_var(build, var));
1003 }
1004
1005 static inline void
1006 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1007 unsigned writemask)
1008 {
1009 nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1010 }
1011
1012 static inline void
1013 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1014 {
1015 nir_copy_deref(build, nir_build_deref_var(build, dest),
1016 nir_build_deref_var(build, src));
1017 }
1018
1019 static inline nir_ssa_def *
1020 nir_load_param(nir_builder *build, uint32_t param_idx)
1021 {
1022 assert(param_idx < build->impl->function->num_params);
1023 nir_parameter *param = &build->impl->function->params[param_idx];
1024
1025 nir_intrinsic_instr *load =
1026 nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1027 nir_intrinsic_set_param_idx(load, param_idx);
1028 load->num_components = param->num_components;
1029 nir_ssa_dest_init(&load->instr, &load->dest,
1030 param->num_components, param->bit_size, NULL);
1031 nir_builder_instr_insert(build, &load->instr);
1032 return &load->dest.ssa;
1033 }
1034
1035 #include "nir_builder_opcodes.h"
1036
1037 static inline nir_ssa_def *
1038 nir_f2b(nir_builder *build, nir_ssa_def *f)
1039 {
1040 return nir_f2b1(build, f);
1041 }
1042
1043 static inline nir_ssa_def *
1044 nir_i2b(nir_builder *build, nir_ssa_def *i)
1045 {
1046 return nir_i2b1(build, i);
1047 }
1048
1049 static inline nir_ssa_def *
1050 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1051 {
1052 switch (bit_size) {
1053 case 64: return nir_b2f64(build, b);
1054 case 32: return nir_b2f32(build, b);
1055 case 16: return nir_b2f16(build, b);
1056 default:
1057 unreachable("Invalid bit-size");
1058 };
1059 }
1060
1061 static inline nir_ssa_def *
1062 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1063 unsigned interp_mode)
1064 {
1065 nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1066 nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1067 nir_intrinsic_set_interp_mode(bary, interp_mode);
1068 nir_builder_instr_insert(build, &bary->instr);
1069 return &bary->dest.ssa;
1070 }
1071
1072 static inline void
1073 nir_jump(nir_builder *build, nir_jump_type jump_type)
1074 {
1075 nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1076 nir_builder_instr_insert(build, &jump->instr);
1077 }
1078
1079 static inline nir_ssa_def *
1080 nir_compare_func(nir_builder *b, enum compare_func func,
1081 nir_ssa_def *src0, nir_ssa_def *src1)
1082 {
1083 switch (func) {
1084 case COMPARE_FUNC_NEVER:
1085 return nir_imm_int(b, 0);
1086 case COMPARE_FUNC_ALWAYS:
1087 return nir_imm_int(b, ~0);
1088 case COMPARE_FUNC_EQUAL:
1089 return nir_feq(b, src0, src1);
1090 case COMPARE_FUNC_NOTEQUAL:
1091 return nir_fne(b, src0, src1);
1092 case COMPARE_FUNC_GREATER:
1093 return nir_flt(b, src1, src0);
1094 case COMPARE_FUNC_GEQUAL:
1095 return nir_fge(b, src0, src1);
1096 case COMPARE_FUNC_LESS:
1097 return nir_flt(b, src0, src1);
1098 case COMPARE_FUNC_LEQUAL:
1099 return nir_fge(b, src1, src0);
1100 }
1101 unreachable("bad compare func");
1102 }
1103
1104 #endif /* NIR_BUILDER_H */