src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/bitscan.h"
  29 #include "util/half_float.h"
  30
  31 struct exec_list;
  32
  33 typedef struct nir_builder {
  34    nir_cursor cursor;
  35
  36    /* Whether new ALU instructions will be marked "exact" */
  37    bool exact;
  38
  39    nir_shader *shader;
  40    nir_function_impl *impl;
  41 } nir_builder;
  42
  43 static inline void
  44 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  45 {
  46    memset(build, 0, sizeof(*build));
  47    build->exact = false;
  48    build->impl = impl;
  49    build->shader = impl->function->shader;
  50 }
  51
  52 static inline void
  53 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  54                                gl_shader_stage stage,
  55                                const nir_shader_compiler_options *options)
  56 {
  57    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  58    nir_function *func = nir_function_create(build->shader, "main");
  59    func->is_entrypoint = true;
  60    build->exact = false;
  61    build->impl = nir_function_impl_create(func);
  62    build->cursor = nir_after_cf_list(&build->impl->body);
  63 }
  64
  65 static inline void
  66 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  67 {
  68    nir_instr_insert(build->cursor, instr);
  69
  70    /* Move the cursor forward. */
  71    build->cursor = nir_after_instr(instr);
  72 }
  73
  74 static inline nir_instr *
  75 nir_builder_last_instr(nir_builder *build)
  76 {
  77    assert(build->cursor.option == nir_cursor_after_instr);
  78    return build->cursor.instr;
  79 }
  80
  81 static inline void
  82 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  83 {
  84    nir_cf_node_insert(build->cursor, cf);
  85 }
  86
  87 static inline bool
  88 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  89 {
  90    nir_block *block = nir_cursor_current_block(build->cursor);
  91    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  92       if (n == cf_node)
  93          return true;
  94    }
  95    return false;
  96 }
  97
  98 static inline nir_if *
  99 nir_push_if(nir_builder *build, nir_ssa_def *condition)
 100 {
 101    nir_if *nif = nir_if_create(build->shader);
 102    nif->condition = nir_src_for_ssa(condition);
 103    nir_builder_cf_insert(build, &nif->cf_node);
 104    build->cursor = nir_before_cf_list(&nif->then_list);
 105    return nif;
 106 }
 107
 108 static inline nir_if *
 109 nir_push_else(nir_builder *build, nir_if *nif)
 110 {
 111    if (nif) {
 112       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 113    } else {
 114       nir_block *block = nir_cursor_current_block(build->cursor);
 115       nif = nir_cf_node_as_if(block->cf_node.parent);
 116    }
 117    build->cursor = nir_before_cf_list(&nif->else_list);
 118    return nif;
 119 }
 120
 121 static inline void
 122 nir_pop_if(nir_builder *build, nir_if *nif)
 123 {
 124    if (nif) {
 125       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 126    } else {
 127       nir_block *block = nir_cursor_current_block(build->cursor);
 128       nif = nir_cf_node_as_if(block->cf_node.parent);
 129    }
 130    build->cursor = nir_after_cf_node(&nif->cf_node);
 131 }
 132
 133 static inline nir_ssa_def *
 134 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 135 {
 136    nir_block *block = nir_cursor_current_block(build->cursor);
 137    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 138
 139    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 140
 141    nir_phi_src *src = ralloc(phi, nir_phi_src);
 142    src->pred = nir_if_last_then_block(nif);
 143    src->src = nir_src_for_ssa(then_def);
 144    exec_list_push_tail(&phi->srcs, &src->node);
 145
 146    src = ralloc(phi, nir_phi_src);
 147    src->pred = nir_if_last_else_block(nif);
 148    src->src = nir_src_for_ssa(else_def);
 149    exec_list_push_tail(&phi->srcs, &src->node);
 150
 151    assert(then_def->num_components == else_def->num_components);
 152    assert(then_def->bit_size == else_def->bit_size);
 153    nir_ssa_dest_init(&phi->instr, &phi->dest,
 154                      then_def->num_components, then_def->bit_size, NULL);
 155
 156    nir_builder_instr_insert(build, &phi->instr);
 157
 158    return &phi->dest.ssa;
 159 }
 160
 161 static inline nir_loop *
 162 nir_push_loop(nir_builder *build)
 163 {
 164    nir_loop *loop = nir_loop_create(build->shader);
 165    nir_builder_cf_insert(build, &loop->cf_node);
 166    build->cursor = nir_before_cf_list(&loop->body);
 167    return loop;
 168 }
 169
 170 static inline void
 171 nir_pop_loop(nir_builder *build, nir_loop *loop)
 172 {
 173    if (loop) {
 174       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 175    } else {
 176       nir_block *block = nir_cursor_current_block(build->cursor);
 177       loop = nir_cf_node_as_loop(block->cf_node.parent);
 178    }
 179    build->cursor = nir_after_cf_node(&loop->cf_node);
 180 }
 181
 182 static inline nir_ssa_def *
 183 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 184 {
 185    nir_ssa_undef_instr *undef =
 186       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 187    if (!undef)
 188       return NULL;
 189
 190    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 191
 192    return &undef->def;
 193 }
 194
 195 static inline nir_ssa_def *
 196 nir_build_imm(nir_builder *build, unsigned num_components,
 197               unsigned bit_size, nir_const_value value)
 198 {
 199    nir_load_const_instr *load_const =
 200       nir_load_const_instr_create(build->shader, num_components, bit_size);
 201    if (!load_const)
 202       return NULL;
 203
 204    load_const->value = value;
 205
 206    nir_builder_instr_insert(build, &load_const->instr);
 207
 208    return &load_const->def;
 209 }
 210
 211 static inline nir_ssa_def *
 212 nir_imm_zero(nir_builder *build, unsigned num_components, unsigned bit_size)
 213 {
 214    nir_load_const_instr *load_const =
 215       nir_load_const_instr_create(build->shader, num_components, bit_size);
 216
 217    /* nir_load_const_instr_create uses rzalloc so it's already zero */
 218
 219    nir_builder_instr_insert(build, &load_const->instr);
 220
 221    return &load_const->def;
 222 }
 223
 224 static inline nir_ssa_def *
 225 nir_imm_bool(nir_builder *build, bool x)
 226 {
 227    nir_const_value v;
 228
 229    memset(&v, 0, sizeof(v));
 230    v.b[0] = x;
 231
 232    return nir_build_imm(build, 1, 1, v);
 233 }
 234
 235 static inline nir_ssa_def *
 236 nir_imm_true(nir_builder *build)
 237 {
 238    return nir_imm_bool(build, true);
 239 }
 240
 241 static inline nir_ssa_def *
 242 nir_imm_false(nir_builder *build)
 243 {
 244    return nir_imm_bool(build, false);
 245 }
 246
 247 static inline nir_ssa_def *
 248 nir_imm_float16(nir_builder *build, float x)
 249 {
 250    nir_const_value v;
 251
 252    memset(&v, 0, sizeof(v));
 253    v.u16[0] = _mesa_float_to_half(x);
 254
 255    return nir_build_imm(build, 1, 16, v);
 256 }
 257
 258 static inline nir_ssa_def *
 259 nir_imm_float(nir_builder *build, float x)
 260 {
 261    nir_const_value v;
 262
 263    memset(&v, 0, sizeof(v));
 264    v.f32[0] = x;
 265
 266    return nir_build_imm(build, 1, 32, v);
 267 }
 268
 269 static inline nir_ssa_def *
 270 nir_imm_double(nir_builder *build, double x)
 271 {
 272    nir_const_value v;
 273
 274    memset(&v, 0, sizeof(v));
 275    v.f64[0] = x;
 276
 277    return nir_build_imm(build, 1, 64, v);
 278 }
 279
 280 static inline nir_ssa_def *
 281 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 282 {
 283    switch (bit_size) {
 284    case 16:
 285       return nir_imm_float16(build, x);
 286    case 32:
 287       return nir_imm_float(build, x);
 288    case 64:
 289       return nir_imm_double(build, x);
 290    }
 291
 292    unreachable("unknown float immediate bit size");
 293 }
 294
 295 static inline nir_ssa_def *
 296 nir_imm_vec2(nir_builder *build, float x, float y)
 297 {
 298    nir_const_value v;
 299
 300    memset(&v, 0, sizeof(v));
 301    v.f32[0] = x;
 302    v.f32[1] = y;
 303
 304    return nir_build_imm(build, 2, 32, v);
 305 }
 306
 307 static inline nir_ssa_def *
 308 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 309 {
 310    nir_const_value v;
 311
 312    memset(&v, 0, sizeof(v));
 313    v.f32[0] = x;
 314    v.f32[1] = y;
 315    v.f32[2] = z;
 316    v.f32[3] = w;
 317
 318    return nir_build_imm(build, 4, 32, v);
 319 }
 320
 321 static inline nir_ssa_def *
 322 nir_imm_ivec2(nir_builder *build, int x, int y)
 323 {
 324    nir_const_value v;
 325
 326    memset(&v, 0, sizeof(v));
 327    v.i32[0] = x;
 328    v.i32[1] = y;
 329
 330    return nir_build_imm(build, 2, 32, v);
 331 }
 332
 333 static inline nir_ssa_def *
 334 nir_imm_int(nir_builder *build, int x)
 335 {
 336    nir_const_value v;
 337
 338    memset(&v, 0, sizeof(v));
 339    v.i32[0] = x;
 340
 341    return nir_build_imm(build, 1, 32, v);
 342 }
 343
 344 static inline nir_ssa_def *
 345 nir_imm_int64(nir_builder *build, int64_t x)
 346 {
 347    nir_const_value v;
 348
 349    memset(&v, 0, sizeof(v));
 350    v.i64[0] = x;
 351
 352    return nir_build_imm(build, 1, 64, v);
 353 }
 354
 355 static inline nir_ssa_def *
 356 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 357 {
 358    nir_const_value v;
 359
 360    memset(&v, 0, sizeof(v));
 361    assert(bit_size <= 64);
 362    if (bit_size == 1)
 363       v.b[0] = x & 1;
 364    else
 365       v.i64[0] = x & (~0ull >> (64 - bit_size));
 366
 367    return nir_build_imm(build, 1, bit_size, v);
 368 }
 369
 370 static inline nir_ssa_def *
 371 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 372 {
 373    nir_const_value v;
 374
 375    memset(&v, 0, sizeof(v));
 376    v.i32[0] = x;
 377    v.i32[1] = y;
 378    v.i32[2] = z;
 379    v.i32[3] = w;
 380
 381    return nir_build_imm(build, 4, 32, v);
 382 }
 383
 384 static inline nir_ssa_def *
 385 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
 386 {
 387    /* We use a 0/-1 convention for all booleans regardless of size */
 388    return nir_imm_intN_t(build, -(int)x, bit_size);
 389 }
 390
 391 static inline nir_ssa_def *
 392 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 393               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 394 {
 395    const nir_op_info *op_info = &nir_op_infos[op];
 396    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 397    if (!instr)
 398       return NULL;
 399
 400    instr->exact = build->exact;
 401
 402    instr->src[0].src = nir_src_for_ssa(src0);
 403    if (src1)
 404       instr->src[1].src = nir_src_for_ssa(src1);
 405    if (src2)
 406       instr->src[2].src = nir_src_for_ssa(src2);
 407    if (src3)
 408       instr->src[3].src = nir_src_for_ssa(src3);
 409
 410    /* Guess the number of components the destination temporary should have
 411     * based on our input sizes, if it's not fixed for the op.
 412     */
 413    unsigned num_components = op_info->output_size;
 414    if (num_components == 0) {
 415       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 416          if (op_info->input_sizes[i] == 0)
 417             num_components = MAX2(num_components,
 418                                   instr->src[i].src.ssa->num_components);
 419       }
 420    }
 421    assert(num_components != 0);
 422
 423    /* Figure out the bitwidth based on the source bitwidth if the instruction
 424     * is variable-width.
 425     */
 426    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 427    if (bit_size == 0) {
 428       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 429          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 430          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 431             if (bit_size)
 432                assert(src_bit_size == bit_size);
 433             else
 434                bit_size = src_bit_size;
 435          } else {
 436             assert(src_bit_size ==
 437                nir_alu_type_get_type_size(op_info->input_types[i]));
 438          }
 439       }
 440    }
 441
 442    /* When in doubt, assume 32. */
 443    if (bit_size == 0)
 444       bit_size = 32;
 445
 446    /* Make sure we don't swizzle from outside of our source vector (like if a
 447     * scalar value was passed into a multiply with a vector).
 448     */
 449    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 450       for (unsigned j = instr->src[i].src.ssa->num_components;
 451            j < NIR_MAX_VEC_COMPONENTS; j++) {
 452          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 453       }
 454    }
 455
 456    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 457                      bit_size, NULL);
 458    instr->dest.write_mask = (1 << num_components) - 1;
 459
 460    nir_builder_instr_insert(build, &instr->instr);
 461
 462    return &instr->dest.dest.ssa;
 463 }
 464
 465 #include "nir_builder_opcodes.h"
 466
 467 static inline nir_ssa_def *
 468 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 469 {
 470    switch (num_components) {
 471    case 4:
 472       return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
 473    case 3:
 474       return nir_vec3(build, comp[0], comp[1], comp[2]);
 475    case 2:
 476       return nir_vec2(build, comp[0], comp[1]);
 477    case 1:
 478       return comp[0];
 479    default:
 480       unreachable("bad component count");
 481       return NULL;
 482    }
 483 }
 484
 485 /**
 486  * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
 487  */
 488 static inline nir_ssa_def *
 489 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 490 {
 491    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
 492    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 493                      nir_src_bit_size(src.src), NULL);
 494    mov->exact = build->exact;
 495    mov->dest.write_mask = (1 << num_components) - 1;
 496    mov->src[0] = src;
 497    nir_builder_instr_insert(build, &mov->instr);
 498
 499    return &mov->dest.dest.ssa;
 500 }
 501
 502 static inline nir_ssa_def *
 503 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 504 {
 505    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
 506    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 507                      nir_src_bit_size(src.src), NULL);
 508    mov->exact = build->exact;
 509    mov->dest.write_mask = (1 << num_components) - 1;
 510    mov->src[0] = src;
 511    nir_builder_instr_insert(build, &mov->instr);
 512
 513    return &mov->dest.dest.ssa;
 514 }
 515
 516 /**
 517  * Construct an fmov or imov that reswizzles the source's components.
 518  */
 519 static inline nir_ssa_def *
 520 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 521             unsigned num_components, bool use_fmov)
 522 {
 523    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 524    nir_alu_src alu_src = { NIR_SRC_INIT };
 525    alu_src.src = nir_src_for_ssa(src);
 526
 527    bool is_identity_swizzle = true;
 528    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
 529       if (swiz[i] != i)
 530          is_identity_swizzle = false;
 531       alu_src.swizzle[i] = swiz[i];
 532    }
 533
 534    if (num_components == src->num_components && is_identity_swizzle)
 535       return src;
 536
 537    return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
 538                      nir_imov_alu(build, alu_src, num_components);
 539 }
 540
 541 /* Selects the right fdot given the number of components in each source. */
 542 static inline nir_ssa_def *
 543 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 544 {
 545    assert(src0->num_components == src1->num_components);
 546    switch (src0->num_components) {
 547    case 1: return nir_fmul(build, src0, src1);
 548    case 2: return nir_fdot2(build, src0, src1);
 549    case 3: return nir_fdot3(build, src0, src1);
 550    case 4: return nir_fdot4(build, src0, src1);
 551    default:
 552       unreachable("bad component size");
 553    }
 554
 555    return NULL;
 556 }
 557
 558 static inline nir_ssa_def *
 559 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 560 {
 561    switch (src0->num_components) {
 562    case 1: return nir_ine(b, src0, src1);
 563    case 2: return nir_bany_inequal2(b, src0, src1);
 564    case 3: return nir_bany_inequal3(b, src0, src1);
 565    case 4: return nir_bany_inequal4(b, src0, src1);
 566    default:
 567       unreachable("bad component size");
 568    }
 569 }
 570
 571 static inline nir_ssa_def *
 572 nir_bany(nir_builder *b, nir_ssa_def *src)
 573 {
 574    return nir_bany_inequal(b, src, nir_imm_false(b));
 575 }
 576
 577 static inline nir_ssa_def *
 578 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 579 {
 580    return nir_swizzle(b, def, &c, 1, false);
 581 }
 582
 583 static inline nir_ssa_def *
 584 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 585 {
 586    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 587
 588    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 589       if ((mask & (1 << i)) == 0)
 590          continue;
 591       swizzle[num_channels++] = i;
 592    }
 593
 594    return nir_swizzle(b, def, swizzle, num_channels, false);
 595 }
 596
 597 static inline nir_ssa_def *
 598 _nir_vector_extract_helper(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c,
 599                            unsigned start, unsigned end)
 600 {
 601    if (start == end - 1) {
 602       return nir_channel(b, vec, start);
 603    } else {
 604       unsigned mid = start + (end - start) / 2;
 605       return nir_bcsel(b, nir_ilt(b, c, nir_imm_int(b, mid)),
 606                        _nir_vector_extract_helper(b, vec, c, start, mid),
 607                        _nir_vector_extract_helper(b, vec, c, mid, end));
 608    }
 609 }
 610
 611 static inline nir_ssa_def *
 612 nir_vector_extract(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c)
 613 {
 614    nir_src c_src = nir_src_for_ssa(c);
 615    if (nir_src_is_const(c_src)) {
 616       unsigned c_const = nir_src_as_uint(c_src);
 617       if (c_const < vec->num_components)
 618          return nir_channel(b, vec, c_const);
 619       else
 620          return nir_ssa_undef(b, 1, vec->bit_size);
 621    } else {
 622       return _nir_vector_extract_helper(b, vec, c, 0, vec->num_components);
 623    }
 624 }
 625
 626 static inline nir_ssa_def *
 627 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 628 {
 629    if (x->bit_size == dest_bit_size)
 630       return x;
 631
 632    switch (dest_bit_size) {
 633    case 64: return nir_i2i64(build, x);
 634    case 32: return nir_i2i32(build, x);
 635    case 16: return nir_i2i16(build, x);
 636    case 8:  return nir_i2i8(build, x);
 637    default: unreachable("Invalid bit size");
 638    }
 639 }
 640
 641 static inline nir_ssa_def *
 642 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 643 {
 644    if (x->bit_size == dest_bit_size)
 645       return x;
 646
 647    switch (dest_bit_size) {
 648    case 64: return nir_u2u64(build, x);
 649    case 32: return nir_u2u32(build, x);
 650    case 16: return nir_u2u16(build, x);
 651    case 8:  return nir_u2u8(build, x);
 652    default: unreachable("Invalid bit size");
 653    }
 654 }
 655
 656 static inline nir_ssa_def *
 657 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 658 {
 659    assert(x->bit_size <= 64);
 660    if (x->bit_size < 64)
 661       y &= (1ull << x->bit_size) - 1;
 662
 663    if (y == 0) {
 664       return x;
 665    } else {
 666       return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 667    }
 668 }
 669
 670 static inline nir_ssa_def *
 671 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 672 {
 673    assert(x->bit_size <= 64);
 674    if (x->bit_size < 64)
 675       y &= (1ull << x->bit_size) - 1;
 676
 677    if (y == 0) {
 678       return nir_imm_intN_t(build, 0, x->bit_size);
 679    } else if (y == 1) {
 680       return x;
 681    } else if (util_is_power_of_two_or_zero64(y)) {
 682       return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
 683    } else {
 684       return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 685    }
 686 }
 687
 688 static inline nir_ssa_def *
 689 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
 690 {
 691    return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 692 }
 693
 694 static inline nir_ssa_def *
 695 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 696 {
 697    return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 698 }
 699
 700 static inline nir_ssa_def *
 701 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 702 {
 703    assert(src->num_components * src->bit_size == dest_bit_size);
 704
 705    switch (dest_bit_size) {
 706    case 64:
 707       switch (src->bit_size) {
 708       case 32: return nir_pack_64_2x32(b, src);
 709       case 16: return nir_pack_64_4x16(b, src);
 710       default: break;
 711       }
 712       break;
 713
 714    case 32:
 715       if (src->bit_size == 16)
 716          return nir_pack_32_2x16(b, src);
 717       break;
 718
 719    default:
 720       break;
 721    }
 722
 723    /* If we got here, we have no dedicated unpack opcode. */
 724    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 725    for (unsigned i = 0; i < src->num_components; i++) {
 726       nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
 727       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 728       dest = nir_ior(b, dest, val);
 729    }
 730    return dest;
 731 }
 732
 733 static inline nir_ssa_def *
 734 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 735 {
 736    assert(src->num_components == 1);
 737    assert(src->bit_size > dest_bit_size);
 738    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 739    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 740
 741    switch (src->bit_size) {
 742    case 64:
 743       switch (dest_bit_size) {
 744       case 32: return nir_unpack_64_2x32(b, src);
 745       case 16: return nir_unpack_64_4x16(b, src);
 746       default: break;
 747       }
 748       break;
 749
 750    case 32:
 751       if (dest_bit_size == 16)
 752          return nir_unpack_32_2x16(b, src);
 753       break;
 754
 755    default:
 756       break;
 757    }
 758
 759    /* If we got here, we have no dedicated unpack opcode. */
 760    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 761    for (unsigned i = 0; i < dest_num_components; i++) {
 762       nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
 763       dest_comps[i] = nir_u2u(b, val, dest_bit_size);
 764    }
 765    return nir_vec(b, dest_comps, dest_num_components);
 766 }
 767
 768 static inline nir_ssa_def *
 769 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 770 {
 771    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 772    const unsigned dest_num_components =
 773       (src->bit_size * src->num_components) / dest_bit_size;
 774    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 775
 776    if (src->bit_size > dest_bit_size) {
 777       assert(src->bit_size % dest_bit_size == 0);
 778       if (src->num_components == 1) {
 779          return nir_unpack_bits(b, src, dest_bit_size);
 780       } else {
 781          const unsigned divisor = src->bit_size / dest_bit_size;
 782          assert(src->num_components * divisor == dest_num_components);
 783          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 784          for (unsigned i = 0; i < src->num_components; i++) {
 785             nir_ssa_def *unpacked =
 786                nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
 787             assert(unpacked->num_components == divisor);
 788             for (unsigned j = 0; j < divisor; j++)
 789                dest[i * divisor + j] = nir_channel(b, unpacked, j);
 790          }
 791          return nir_vec(b, dest, dest_num_components);
 792       }
 793    } else if (src->bit_size < dest_bit_size) {
 794       assert(dest_bit_size % src->bit_size == 0);
 795       if (dest_num_components == 1) {
 796          return nir_pack_bits(b, src, dest_bit_size);
 797       } else {
 798          const unsigned divisor = dest_bit_size / src->bit_size;
 799          assert(src->num_components == dest_num_components * divisor);
 800          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 801          for (unsigned i = 0; i < dest_num_components; i++) {
 802             nir_component_mask_t src_mask =
 803                ((1 << divisor) - 1) << (i * divisor);
 804             dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
 805                                        dest_bit_size);
 806          }
 807          return nir_vec(b, dest, dest_num_components);
 808       }
 809    } else {
 810       assert(src->bit_size == dest_bit_size);
 811       return src;
 812    }
 813 }
 814
 815 /**
 816  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 817  * nir_build_alu()-based builder calls.
 818  *
 819  * See nir_ssa_for_alu_src() for alu instructions.
 820  */
 821 static inline nir_ssa_def *
 822 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 823 {
 824    if (src.is_ssa && src.ssa->num_components == num_components)
 825       return src.ssa;
 826
 827    nir_alu_src alu = { NIR_SRC_INIT };
 828    alu.src = src;
 829    for (int j = 0; j < 4; j++)
 830       alu.swizzle[j] = j;
 831
 832    return nir_imov_alu(build, alu, num_components);
 833 }
 834
 835 /**
 836  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 837  * nir_alu_src's swizzle.
 838  */
 839 static inline nir_ssa_def *
 840 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 841 {
 842    static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
 843    for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
 844       trivial_swizzle[i] = i;
 845    nir_alu_src *src = &instr->src[srcn];
 846    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 847
 848    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 849        !src->abs && !src->negate &&
 850        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 851       return src->src.ssa;
 852
 853    return nir_imov_alu(build, *src, num_components);
 854 }
 855
 856 static inline unsigned
 857 nir_get_ptr_bitsize(nir_builder *build)
 858 {
 859    if (build->shader->info.stage == MESA_SHADER_KERNEL)
 860       return build->shader->info.cs.ptr_size;
 861    return 32;
 862 }
 863
 864 static inline nir_deref_instr *
 865 nir_build_deref_var(nir_builder *build, nir_variable *var)
 866 {
 867    nir_deref_instr *deref =
 868       nir_deref_instr_create(build->shader, nir_deref_type_var);
 869
 870    deref->mode = var->data.mode;
 871    deref->type = var->type;
 872    deref->var = var;
 873
 874    nir_ssa_dest_init(&deref->instr, &deref->dest, 1,
 875                      nir_get_ptr_bitsize(build), NULL);
 876
 877    nir_builder_instr_insert(build, &deref->instr);
 878
 879    return deref;
 880 }
 881
 882 static inline nir_deref_instr *
 883 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
 884                       nir_ssa_def *index)
 885 {
 886    assert(glsl_type_is_array(parent->type) ||
 887           glsl_type_is_matrix(parent->type) ||
 888           glsl_type_is_vector(parent->type));
 889
 890    assert(index->bit_size == parent->dest.ssa.bit_size);
 891
 892    nir_deref_instr *deref =
 893       nir_deref_instr_create(build->shader, nir_deref_type_array);
 894
 895    deref->mode = parent->mode;
 896    deref->type = glsl_get_array_element(parent->type);
 897    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 898    deref->arr.index = nir_src_for_ssa(index);
 899
 900    nir_ssa_dest_init(&deref->instr, &deref->dest,
 901                      parent->dest.ssa.num_components,
 902                      parent->dest.ssa.bit_size, NULL);
 903
 904    nir_builder_instr_insert(build, &deref->instr);
 905
 906    return deref;
 907 }
 908
 909 static inline nir_deref_instr *
 910 nir_build_deref_array_imm(nir_builder *build, nir_deref_instr *parent,
 911                           int64_t index)
 912 {
 913    assert(parent->dest.is_ssa);
 914    nir_ssa_def *idx_ssa = nir_imm_intN_t(build, index,
 915                                          parent->dest.ssa.bit_size);
 916
 917    return nir_build_deref_array(build, parent, idx_ssa);
 918 }
 919
 920 static inline nir_deref_instr *
 921 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
 922                              nir_ssa_def *index)
 923 {
 924    assert(parent->deref_type == nir_deref_type_array ||
 925           parent->deref_type == nir_deref_type_ptr_as_array ||
 926           parent->deref_type == nir_deref_type_cast);
 927
 928    assert(index->bit_size == parent->dest.ssa.bit_size);
 929
 930    nir_deref_instr *deref =
 931       nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
 932
 933    deref->mode = parent->mode;
 934    deref->type = parent->type;
 935    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 936    deref->arr.index = nir_src_for_ssa(index);
 937
 938    nir_ssa_dest_init(&deref->instr, &deref->dest,
 939                      parent->dest.ssa.num_components,
 940                      parent->dest.ssa.bit_size, NULL);
 941
 942    nir_builder_instr_insert(build, &deref->instr);
 943
 944    return deref;
 945 }
 946
 947 static inline nir_deref_instr *
 948 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
 949 {
 950    assert(glsl_type_is_array(parent->type) ||
 951           glsl_type_is_matrix(parent->type));
 952
 953    nir_deref_instr *deref =
 954       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
 955
 956    deref->mode = parent->mode;
 957    deref->type = glsl_get_array_element(parent->type);
 958    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 959
 960    nir_ssa_dest_init(&deref->instr, &deref->dest,
 961                      parent->dest.ssa.num_components,
 962                      parent->dest.ssa.bit_size, NULL);
 963
 964    nir_builder_instr_insert(build, &deref->instr);
 965
 966    return deref;
 967 }
 968
 969 static inline nir_deref_instr *
 970 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
 971                        unsigned index)
 972 {
 973    assert(glsl_type_is_struct_or_ifc(parent->type));
 974
 975    nir_deref_instr *deref =
 976       nir_deref_instr_create(build->shader, nir_deref_type_struct);
 977
 978    deref->mode = parent->mode;
 979    deref->type = glsl_get_struct_field(parent->type, index);
 980    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 981    deref->strct.index = index;
 982
 983    nir_ssa_dest_init(&deref->instr, &deref->dest,
 984                      parent->dest.ssa.num_components,
 985                      parent->dest.ssa.bit_size, NULL);
 986
 987    nir_builder_instr_insert(build, &deref->instr);
 988
 989    return deref;
 990 }
 991
 992 static inline nir_deref_instr *
 993 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
 994                      nir_variable_mode mode, const struct glsl_type *type,
 995                      unsigned ptr_stride)
 996 {
 997    nir_deref_instr *deref =
 998       nir_deref_instr_create(build->shader, nir_deref_type_cast);
 999
1000    deref->mode = mode;
1001    deref->type = type;
1002    deref->parent = nir_src_for_ssa(parent);
1003    deref->cast.ptr_stride = ptr_stride;
1004
1005    nir_ssa_dest_init(&deref->instr, &deref->dest,
1006                      parent->num_components, parent->bit_size, NULL);
1007
1008    nir_builder_instr_insert(build, &deref->instr);
1009
1010    return deref;
1011 }
1012
1013 /** Returns a deref that follows another but starting from the given parent
1014  *
1015  * The new deref will be the same type and take the same array or struct index
1016  * as the leader deref but it may have a different parent.  This is very
1017  * useful for walking deref paths.
1018  */
1019 static inline nir_deref_instr *
1020 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
1021                          nir_deref_instr *leader)
1022 {
1023    /* If the derefs would have the same parent, don't make a new one */
1024    assert(leader->parent.is_ssa);
1025    if (leader->parent.ssa == &parent->dest.ssa)
1026       return leader;
1027
1028    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
1029
1030    switch (leader->deref_type) {
1031    case nir_deref_type_var:
1032       unreachable("A var dereference cannot have a parent");
1033       break;
1034
1035    case nir_deref_type_array:
1036    case nir_deref_type_array_wildcard:
1037       assert(glsl_type_is_matrix(parent->type) ||
1038              glsl_type_is_array(parent->type) ||
1039              (leader->deref_type == nir_deref_type_array &&
1040               glsl_type_is_vector(parent->type)));
1041       assert(glsl_get_length(parent->type) ==
1042              glsl_get_length(leader_parent->type));
1043
1044       if (leader->deref_type == nir_deref_type_array) {
1045          assert(leader->arr.index.is_ssa);
1046          nir_ssa_def *index = nir_i2i(b, leader->arr.index.ssa,
1047                                          parent->dest.ssa.bit_size);
1048          return nir_build_deref_array(b, parent, index);
1049       } else {
1050          return nir_build_deref_array_wildcard(b, parent);
1051       }
1052
1053    case nir_deref_type_struct:
1054       assert(glsl_type_is_struct_or_ifc(parent->type));
1055       assert(glsl_get_length(parent->type) ==
1056              glsl_get_length(leader_parent->type));
1057
1058       return nir_build_deref_struct(b, parent, leader->strct.index);
1059
1060    default:
1061       unreachable("Invalid deref instruction type");
1062    }
1063 }
1064
1065 static inline nir_ssa_def *
1066 nir_load_reg(nir_builder *build, nir_register *reg)
1067 {
1068    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
1069 }
1070
1071 static inline nir_ssa_def *
1072 nir_load_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1073                            enum gl_access_qualifier access)
1074 {
1075    nir_intrinsic_instr *load =
1076       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
1077    load->num_components = glsl_get_vector_elements(deref->type);
1078    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1079    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
1080                      glsl_get_bit_size(deref->type), NULL);
1081    nir_intrinsic_set_access(load, access);
1082    nir_builder_instr_insert(build, &load->instr);
1083    return &load->dest.ssa;
1084 }
1085
1086 static inline nir_ssa_def *
1087 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
1088 {
1089    return nir_load_deref_with_access(build, deref, (enum gl_access_qualifier)0);
1090 }
1091
1092 static inline void
1093 nir_store_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1094                             nir_ssa_def *value, unsigned writemask,
1095                             enum gl_access_qualifier access)
1096 {
1097    nir_intrinsic_instr *store =
1098       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
1099    store->num_components = glsl_get_vector_elements(deref->type);
1100    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1101    store->src[1] = nir_src_for_ssa(value);
1102    nir_intrinsic_set_write_mask(store,
1103                                 writemask & ((1 << store->num_components) - 1));
1104    nir_intrinsic_set_access(store, access);
1105    nir_builder_instr_insert(build, &store->instr);
1106 }
1107
1108 static inline void
1109 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1110                 nir_ssa_def *value, unsigned writemask)
1111 {
1112    nir_store_deref_with_access(build, deref, value, writemask,
1113                                (enum gl_access_qualifier)0);
1114 }
1115
1116 static inline void
1117 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1118 {
1119    nir_intrinsic_instr *copy =
1120       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
1121    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
1122    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
1123    nir_builder_instr_insert(build, &copy->instr);
1124 }
1125
1126 static inline nir_ssa_def *
1127 nir_load_var(nir_builder *build, nir_variable *var)
1128 {
1129    return nir_load_deref(build, nir_build_deref_var(build, var));
1130 }
1131
1132 static inline void
1133 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1134               unsigned writemask)
1135 {
1136    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1137 }
1138
1139 static inline void
1140 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1141 {
1142    nir_copy_deref(build, nir_build_deref_var(build, dest),
1143                          nir_build_deref_var(build, src));
1144 }
1145
1146 static inline nir_ssa_def *
1147 nir_load_param(nir_builder *build, uint32_t param_idx)
1148 {
1149    assert(param_idx < build->impl->function->num_params);
1150    nir_parameter *param = &build->impl->function->params[param_idx];
1151
1152    nir_intrinsic_instr *load =
1153       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1154    nir_intrinsic_set_param_idx(load, param_idx);
1155    load->num_components = param->num_components;
1156    nir_ssa_dest_init(&load->instr, &load->dest,
1157                      param->num_components, param->bit_size, NULL);
1158    nir_builder_instr_insert(build, &load->instr);
1159    return &load->dest.ssa;
1160 }
1161
1162 #include "nir_builder_opcodes.h"
1163
1164 static inline nir_ssa_def *
1165 nir_f2b(nir_builder *build, nir_ssa_def *f)
1166 {
1167    return nir_f2b1(build, f);
1168 }
1169
1170 static inline nir_ssa_def *
1171 nir_i2b(nir_builder *build, nir_ssa_def *i)
1172 {
1173    return nir_i2b1(build, i);
1174 }
1175
1176 static inline nir_ssa_def *
1177 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1178 {
1179    switch (bit_size) {
1180    case 64: return nir_b2f64(build, b);
1181    case 32: return nir_b2f32(build, b);
1182    case 16: return nir_b2f16(build, b);
1183    default:
1184       unreachable("Invalid bit-size");
1185    };
1186 }
1187
1188 static inline nir_ssa_def *
1189 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1190                      unsigned interp_mode)
1191 {
1192    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1193    nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1194    nir_intrinsic_set_interp_mode(bary, interp_mode);
1195    nir_builder_instr_insert(build, &bary->instr);
1196    return &bary->dest.ssa;
1197 }
1198
1199 static inline void
1200 nir_jump(nir_builder *build, nir_jump_type jump_type)
1201 {
1202    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1203    nir_builder_instr_insert(build, &jump->instr);
1204 }
1205
1206 static inline nir_ssa_def *
1207 nir_compare_func(nir_builder *b, enum compare_func func,
1208                  nir_ssa_def *src0, nir_ssa_def *src1)
1209 {
1210    switch (func) {
1211    case COMPARE_FUNC_NEVER:
1212       return nir_imm_int(b, 0);
1213    case COMPARE_FUNC_ALWAYS:
1214       return nir_imm_int(b, ~0);
1215    case COMPARE_FUNC_EQUAL:
1216       return nir_feq(b, src0, src1);
1217    case COMPARE_FUNC_NOTEQUAL:
1218       return nir_fne(b, src0, src1);
1219    case COMPARE_FUNC_GREATER:
1220       return nir_flt(b, src1, src0);
1221    case COMPARE_FUNC_GEQUAL:
1222       return nir_fge(b, src0, src1);
1223    case COMPARE_FUNC_LESS:
1224       return nir_flt(b, src0, src1);
1225    case COMPARE_FUNC_LEQUAL:
1226       return nir_fge(b, src1, src0);
1227    }
1228    unreachable("bad compare func");
1229 }
1230
1231 #endif /* NIR_BUILDER_H */