src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/half_float.h"
  29
  30 struct exec_list;
  31
  32 typedef struct nir_builder {
  33    nir_cursor cursor;
  34
  35    /* Whether new ALU instructions will be marked "exact" */
  36    bool exact;
  37
  38    nir_shader *shader;
  39    nir_function_impl *impl;
  40 } nir_builder;
  41
  42 static inline void
  43 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  44 {
  45    memset(build, 0, sizeof(*build));
  46    build->exact = false;
  47    build->impl = impl;
  48    build->shader = impl->function->shader;
  49 }
  50
  51 static inline void
  52 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  53                                gl_shader_stage stage,
  54                                const nir_shader_compiler_options *options)
  55 {
  56    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  57    nir_function *func = nir_function_create(build->shader, "main");
  58    build->exact = false;
  59    build->impl = nir_function_impl_create(func);
  60    build->cursor = nir_after_cf_list(&build->impl->body);
  61 }
  62
  63 static inline void
  64 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  65 {
  66    nir_instr_insert(build->cursor, instr);
  67
  68    /* Move the cursor forward. */
  69    build->cursor = nir_after_instr(instr);
  70 }
  71
  72 static inline nir_instr *
  73 nir_builder_last_instr(nir_builder *build)
  74 {
  75    assert(build->cursor.option == nir_cursor_after_instr);
  76    return build->cursor.instr;
  77 }
  78
  79 static inline void
  80 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  81 {
  82    nir_cf_node_insert(build->cursor, cf);
  83 }
  84
  85 static inline bool
  86 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  87 {
  88    nir_block *block = nir_cursor_current_block(build->cursor);
  89    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  90       if (n == cf_node)
  91          return true;
  92    }
  93    return false;
  94 }
  95
  96 static inline nir_if *
  97 nir_push_if(nir_builder *build, nir_ssa_def *condition)
  98 {
  99    nir_if *nif = nir_if_create(build->shader);
 100    nif->condition = nir_src_for_ssa(condition);
 101    nir_builder_cf_insert(build, &nif->cf_node);
 102    build->cursor = nir_before_cf_list(&nif->then_list);
 103    return nif;
 104 }
 105
 106 static inline nir_if *
 107 nir_push_else(nir_builder *build, nir_if *nif)
 108 {
 109    if (nif) {
 110       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 111    } else {
 112       nir_block *block = nir_cursor_current_block(build->cursor);
 113       nif = nir_cf_node_as_if(block->cf_node.parent);
 114    }
 115    build->cursor = nir_before_cf_list(&nif->else_list);
 116    return nif;
 117 }
 118
 119 static inline void
 120 nir_pop_if(nir_builder *build, nir_if *nif)
 121 {
 122    if (nif) {
 123       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 124    } else {
 125       nir_block *block = nir_cursor_current_block(build->cursor);
 126       nif = nir_cf_node_as_if(block->cf_node.parent);
 127    }
 128    build->cursor = nir_after_cf_node(&nif->cf_node);
 129 }
 130
 131 static inline nir_ssa_def *
 132 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 133 {
 134    nir_block *block = nir_cursor_current_block(build->cursor);
 135    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 136
 137    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 138
 139    nir_phi_src *src = ralloc(phi, nir_phi_src);
 140    src->pred = nir_if_last_then_block(nif);
 141    src->src = nir_src_for_ssa(then_def);
 142    exec_list_push_tail(&phi->srcs, &src->node);
 143
 144    src = ralloc(phi, nir_phi_src);
 145    src->pred = nir_if_last_else_block(nif);
 146    src->src = nir_src_for_ssa(else_def);
 147    exec_list_push_tail(&phi->srcs, &src->node);
 148
 149    assert(then_def->num_components == else_def->num_components);
 150    assert(then_def->bit_size == else_def->bit_size);
 151    nir_ssa_dest_init(&phi->instr, &phi->dest,
 152                      then_def->num_components, then_def->bit_size, NULL);
 153
 154    nir_builder_instr_insert(build, &phi->instr);
 155
 156    return &phi->dest.ssa;
 157 }
 158
 159 static inline nir_loop *
 160 nir_push_loop(nir_builder *build)
 161 {
 162    nir_loop *loop = nir_loop_create(build->shader);
 163    nir_builder_cf_insert(build, &loop->cf_node);
 164    build->cursor = nir_before_cf_list(&loop->body);
 165    return loop;
 166 }
 167
 168 static inline void
 169 nir_pop_loop(nir_builder *build, nir_loop *loop)
 170 {
 171    if (loop) {
 172       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 173    } else {
 174       nir_block *block = nir_cursor_current_block(build->cursor);
 175       loop = nir_cf_node_as_loop(block->cf_node.parent);
 176    }
 177    build->cursor = nir_after_cf_node(&loop->cf_node);
 178 }
 179
 180 static inline nir_ssa_def *
 181 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 182 {
 183    nir_ssa_undef_instr *undef =
 184       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 185    if (!undef)
 186       return NULL;
 187
 188    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 189
 190    return &undef->def;
 191 }
 192
 193 static inline nir_ssa_def *
 194 nir_build_imm(nir_builder *build, unsigned num_components,
 195               unsigned bit_size, nir_const_value value)
 196 {
 197    nir_load_const_instr *load_const =
 198       nir_load_const_instr_create(build->shader, num_components, bit_size);
 199    if (!load_const)
 200       return NULL;
 201
 202    load_const->value = value;
 203
 204    nir_builder_instr_insert(build, &load_const->instr);
 205
 206    return &load_const->def;
 207 }
 208
 209 static inline nir_ssa_def *
 210 nir_imm_bool(nir_builder *build, bool x)
 211 {
 212    nir_const_value v;
 213
 214    memset(&v, 0, sizeof(v));
 215    v.b[0] = x;
 216
 217    return nir_build_imm(build, 1, 1, v);
 218 }
 219
 220 static inline nir_ssa_def *
 221 nir_imm_true(nir_builder *build)
 222 {
 223    return nir_imm_bool(build, true);
 224 }
 225
 226 static inline nir_ssa_def *
 227 nir_imm_false(nir_builder *build)
 228 {
 229    return nir_imm_bool(build, false);
 230 }
 231
 232 static inline nir_ssa_def *
 233 nir_imm_float16(nir_builder *build, float x)
 234 {
 235    nir_const_value v;
 236
 237    memset(&v, 0, sizeof(v));
 238    v.u16[0] = _mesa_float_to_half(x);
 239
 240    return nir_build_imm(build, 1, 16, v);
 241 }
 242
 243 static inline nir_ssa_def *
 244 nir_imm_float(nir_builder *build, float x)
 245 {
 246    nir_const_value v;
 247
 248    memset(&v, 0, sizeof(v));
 249    v.f32[0] = x;
 250
 251    return nir_build_imm(build, 1, 32, v);
 252 }
 253
 254 static inline nir_ssa_def *
 255 nir_imm_double(nir_builder *build, double x)
 256 {
 257    nir_const_value v;
 258
 259    memset(&v, 0, sizeof(v));
 260    v.f64[0] = x;
 261
 262    return nir_build_imm(build, 1, 64, v);
 263 }
 264
 265 static inline nir_ssa_def *
 266 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 267 {
 268    switch (bit_size) {
 269    case 16:
 270       return nir_imm_float16(build, x);
 271    case 32:
 272       return nir_imm_float(build, x);
 273    case 64:
 274       return nir_imm_double(build, x);
 275    }
 276
 277    unreachable("unknown float immediate bit size");
 278 }
 279
 280 static inline nir_ssa_def *
 281 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 282 {
 283    nir_const_value v;
 284
 285    memset(&v, 0, sizeof(v));
 286    v.f32[0] = x;
 287    v.f32[1] = y;
 288    v.f32[2] = z;
 289    v.f32[3] = w;
 290
 291    return nir_build_imm(build, 4, 32, v);
 292 }
 293
 294 static inline nir_ssa_def *
 295 nir_imm_ivec2(nir_builder *build, int x, int y)
 296 {
 297    nir_const_value v;
 298
 299    memset(&v, 0, sizeof(v));
 300    v.i32[0] = x;
 301    v.i32[1] = y;
 302
 303    return nir_build_imm(build, 2, 32, v);
 304 }
 305
 306 static inline nir_ssa_def *
 307 nir_imm_int(nir_builder *build, int x)
 308 {
 309    nir_const_value v;
 310
 311    memset(&v, 0, sizeof(v));
 312    v.i32[0] = x;
 313
 314    return nir_build_imm(build, 1, 32, v);
 315 }
 316
 317 static inline nir_ssa_def *
 318 nir_imm_int64(nir_builder *build, int64_t x)
 319 {
 320    nir_const_value v;
 321
 322    memset(&v, 0, sizeof(v));
 323    v.i64[0] = x;
 324
 325    return nir_build_imm(build, 1, 64, v);
 326 }
 327
 328 static inline nir_ssa_def *
 329 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 330 {
 331    nir_const_value v;
 332
 333    memset(&v, 0, sizeof(v));
 334    assert(bit_size <= 64);
 335    if (bit_size == 1)
 336       v.b[0] = x & 1;
 337    else
 338       v.i64[0] = x & (~0ull >> (64 - bit_size));
 339
 340    return nir_build_imm(build, 1, bit_size, v);
 341 }
 342
 343 static inline nir_ssa_def *
 344 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 345 {
 346    nir_const_value v;
 347
 348    memset(&v, 0, sizeof(v));
 349    v.i32[0] = x;
 350    v.i32[1] = y;
 351    v.i32[2] = z;
 352    v.i32[3] = w;
 353
 354    return nir_build_imm(build, 4, 32, v);
 355 }
 356
 357 static inline nir_ssa_def *
 358 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
 359 {
 360    /* We use a 0/-1 convention for all booleans regardless of size */
 361    return nir_imm_intN_t(build, -(int)x, bit_size);
 362 }
 363
 364 static inline nir_ssa_def *
 365 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 366               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 367 {
 368    const nir_op_info *op_info = &nir_op_infos[op];
 369    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 370    if (!instr)
 371       return NULL;
 372
 373    instr->exact = build->exact;
 374
 375    instr->src[0].src = nir_src_for_ssa(src0);
 376    if (src1)
 377       instr->src[1].src = nir_src_for_ssa(src1);
 378    if (src2)
 379       instr->src[2].src = nir_src_for_ssa(src2);
 380    if (src3)
 381       instr->src[3].src = nir_src_for_ssa(src3);
 382
 383    /* Guess the number of components the destination temporary should have
 384     * based on our input sizes, if it's not fixed for the op.
 385     */
 386    unsigned num_components = op_info->output_size;
 387    if (num_components == 0) {
 388       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 389          if (op_info->input_sizes[i] == 0)
 390             num_components = MAX2(num_components,
 391                                   instr->src[i].src.ssa->num_components);
 392       }
 393    }
 394    assert(num_components != 0);
 395
 396    /* Figure out the bitwidth based on the source bitwidth if the instruction
 397     * is variable-width.
 398     */
 399    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 400    if (bit_size == 0) {
 401       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 402          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 403          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 404             if (bit_size)
 405                assert(src_bit_size == bit_size);
 406             else
 407                bit_size = src_bit_size;
 408          } else {
 409             assert(src_bit_size ==
 410                nir_alu_type_get_type_size(op_info->input_types[i]));
 411          }
 412       }
 413    }
 414
 415    /* When in doubt, assume 32. */
 416    if (bit_size == 0)
 417       bit_size = 32;
 418
 419    /* Make sure we don't swizzle from outside of our source vector (like if a
 420     * scalar value was passed into a multiply with a vector).
 421     */
 422    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 423       for (unsigned j = instr->src[i].src.ssa->num_components;
 424            j < NIR_MAX_VEC_COMPONENTS; j++) {
 425          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 426       }
 427    }
 428
 429    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 430                      bit_size, NULL);
 431    instr->dest.write_mask = (1 << num_components) - 1;
 432
 433    nir_builder_instr_insert(build, &instr->instr);
 434
 435    return &instr->dest.dest.ssa;
 436 }
 437
 438 #include "nir_builder_opcodes.h"
 439
 440 static inline nir_ssa_def *
 441 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 442 {
 443    switch (num_components) {
 444    case 4:
 445       return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
 446    case 3:
 447       return nir_vec3(build, comp[0], comp[1], comp[2]);
 448    case 2:
 449       return nir_vec2(build, comp[0], comp[1]);
 450    case 1:
 451       return comp[0];
 452    default:
 453       unreachable("bad component count");
 454       return NULL;
 455    }
 456 }
 457
 458 /**
 459  * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
 460  */
 461 static inline nir_ssa_def *
 462 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 463 {
 464    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
 465    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 466                      nir_src_bit_size(src.src), NULL);
 467    mov->exact = build->exact;
 468    mov->dest.write_mask = (1 << num_components) - 1;
 469    mov->src[0] = src;
 470    nir_builder_instr_insert(build, &mov->instr);
 471
 472    return &mov->dest.dest.ssa;
 473 }
 474
 475 static inline nir_ssa_def *
 476 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 477 {
 478    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
 479    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 480                      nir_src_bit_size(src.src), NULL);
 481    mov->exact = build->exact;
 482    mov->dest.write_mask = (1 << num_components) - 1;
 483    mov->src[0] = src;
 484    nir_builder_instr_insert(build, &mov->instr);
 485
 486    return &mov->dest.dest.ssa;
 487 }
 488
 489 /**
 490  * Construct an fmov or imov that reswizzles the source's components.
 491  */
 492 static inline nir_ssa_def *
 493 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 494             unsigned num_components, bool use_fmov)
 495 {
 496    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 497    nir_alu_src alu_src = { NIR_SRC_INIT };
 498    alu_src.src = nir_src_for_ssa(src);
 499    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++)
 500       alu_src.swizzle[i] = swiz[i];
 501
 502    return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
 503                      nir_imov_alu(build, alu_src, num_components);
 504 }
 505
 506 /* Selects the right fdot given the number of components in each source. */
 507 static inline nir_ssa_def *
 508 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 509 {
 510    assert(src0->num_components == src1->num_components);
 511    switch (src0->num_components) {
 512    case 1: return nir_fmul(build, src0, src1);
 513    case 2: return nir_fdot2(build, src0, src1);
 514    case 3: return nir_fdot3(build, src0, src1);
 515    case 4: return nir_fdot4(build, src0, src1);
 516    default:
 517       unreachable("bad component size");
 518    }
 519
 520    return NULL;
 521 }
 522
 523 static inline nir_ssa_def *
 524 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 525 {
 526    switch (src0->num_components) {
 527    case 1: return nir_ine(b, src0, src1);
 528    case 2: return nir_bany_inequal2(b, src0, src1);
 529    case 3: return nir_bany_inequal3(b, src0, src1);
 530    case 4: return nir_bany_inequal4(b, src0, src1);
 531    default:
 532       unreachable("bad component size");
 533    }
 534 }
 535
 536 static inline nir_ssa_def *
 537 nir_bany(nir_builder *b, nir_ssa_def *src)
 538 {
 539    return nir_bany_inequal(b, src, nir_imm_false(b));
 540 }
 541
 542 static inline nir_ssa_def *
 543 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 544 {
 545    return nir_swizzle(b, def, &c, 1, false);
 546 }
 547
 548 static inline nir_ssa_def *
 549 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 550 {
 551    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 552
 553    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 554       if ((mask & (1 << i)) == 0)
 555          continue;
 556       swizzle[num_channels++] = i;
 557    }
 558
 559    return nir_swizzle(b, def, swizzle, num_channels, false);
 560 }
 561
 562 static inline nir_ssa_def *
 563 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 564 {
 565    return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 566 }
 567
 568 static inline nir_ssa_def *
 569 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 570 {
 571    return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 572 }
 573
 574 static inline nir_ssa_def *
 575 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
 576 {
 577    return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 578 }
 579
 580 static inline nir_ssa_def *
 581 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 582 {
 583    return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 584 }
 585
 586 static inline nir_ssa_def *
 587 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 588 {
 589    assert(src->num_components * src->bit_size == dest_bit_size);
 590
 591    switch (dest_bit_size) {
 592    case 64:
 593       switch (src->bit_size) {
 594       case 32: return nir_pack_64_2x32(b, src);
 595       case 16: return nir_pack_64_4x16(b, src);
 596       default: break;
 597       }
 598       break;
 599
 600    case 32:
 601       if (src->bit_size == 16)
 602          return nir_pack_32_2x16(b, src);
 603       break;
 604
 605    default:
 606       break;
 607    }
 608
 609    /* If we got here, we have no dedicated unpack opcode. */
 610    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 611    for (unsigned i = 0; i < src->num_components; i++) {
 612       nir_ssa_def *val;
 613       switch (dest_bit_size) {
 614       case 64: val = nir_u2u64(b, nir_channel(b, src, i));  break;
 615       case 32: val = nir_u2u32(b, nir_channel(b, src, i));  break;
 616       case 16: val = nir_u2u16(b, nir_channel(b, src, i));  break;
 617       default: unreachable("Invalid bit size");
 618       }
 619       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 620       dest = nir_ior(b, dest, val);
 621    }
 622    return dest;
 623 }
 624
 625 static inline nir_ssa_def *
 626 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 627 {
 628    assert(src->num_components == 1);
 629    assert(src->bit_size > dest_bit_size);
 630    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 631    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 632
 633    switch (src->bit_size) {
 634    case 64:
 635       switch (dest_bit_size) {
 636       case 32: return nir_unpack_64_2x32(b, src);
 637       case 16: return nir_unpack_64_4x16(b, src);
 638       default: break;
 639       }
 640       break;
 641
 642    case 32:
 643       if (dest_bit_size == 16)
 644          return nir_unpack_32_2x16(b, src);
 645       break;
 646
 647    default:
 648       break;
 649    }
 650
 651    /* If we got here, we have no dedicated unpack opcode. */
 652    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 653    for (unsigned i = 0; i < dest_num_components; i++) {
 654       nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
 655       switch (dest_bit_size) {
 656       case 32: dest_comps[i] = nir_u2u32(b, val);  break;
 657       case 16: dest_comps[i] = nir_u2u16(b, val);  break;
 658       case 8:  dest_comps[i] = nir_u2u8(b, val);   break;
 659       default: unreachable("Invalid bit size");
 660       }
 661    }
 662    return nir_vec(b, dest_comps, dest_num_components);
 663 }
 664
 665 static inline nir_ssa_def *
 666 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 667 {
 668    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 669    const unsigned dest_num_components =
 670       (src->bit_size * src->num_components) / dest_bit_size;
 671    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 672
 673    if (src->bit_size > dest_bit_size) {
 674       assert(src->bit_size % dest_bit_size == 0);
 675       if (src->num_components == 1) {
 676          return nir_unpack_bits(b, src, dest_bit_size);
 677       } else {
 678          const unsigned divisor = src->bit_size / dest_bit_size;
 679          assert(src->num_components * divisor == dest_num_components);
 680          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 681          for (unsigned i = 0; i < src->num_components; i++) {
 682             nir_ssa_def *unpacked =
 683                nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
 684             assert(unpacked->num_components == divisor);
 685             for (unsigned j = 0; j < divisor; j++)
 686                dest[i * divisor + j] = nir_channel(b, unpacked, j);
 687          }
 688          return nir_vec(b, dest, dest_num_components);
 689       }
 690    } else if (src->bit_size < dest_bit_size) {
 691       assert(dest_bit_size % src->bit_size == 0);
 692       if (dest_num_components == 1) {
 693          return nir_pack_bits(b, src, dest_bit_size);
 694       } else {
 695          const unsigned divisor = dest_bit_size / src->bit_size;
 696          assert(src->num_components == dest_num_components * divisor);
 697          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 698          for (unsigned i = 0; i < dest_num_components; i++) {
 699             nir_component_mask_t src_mask =
 700                ((1 << divisor) - 1) << (i * divisor);
 701             dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
 702                                        dest_bit_size);
 703          }
 704          return nir_vec(b, dest, dest_num_components);
 705       }
 706    } else {
 707       assert(src->bit_size == dest_bit_size);
 708       return src;
 709    }
 710 }
 711
 712 /**
 713  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 714  * nir_build_alu()-based builder calls.
 715  *
 716  * See nir_ssa_for_alu_src() for alu instructions.
 717  */
 718 static inline nir_ssa_def *
 719 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 720 {
 721    if (src.is_ssa && src.ssa->num_components == num_components)
 722       return src.ssa;
 723
 724    nir_alu_src alu = { NIR_SRC_INIT };
 725    alu.src = src;
 726    for (int j = 0; j < 4; j++)
 727       alu.swizzle[j] = j;
 728
 729    return nir_imov_alu(build, alu, num_components);
 730 }
 731
 732 /**
 733  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 734  * nir_alu_src's swizzle.
 735  */
 736 static inline nir_ssa_def *
 737 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 738 {
 739    static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
 740    for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
 741       trivial_swizzle[i] = i;
 742    nir_alu_src *src = &instr->src[srcn];
 743    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 744
 745    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 746        !src->abs && !src->negate &&
 747        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 748       return src->src.ssa;
 749
 750    return nir_imov_alu(build, *src, num_components);
 751 }
 752
 753 static inline nir_deref_instr *
 754 nir_build_deref_var(nir_builder *build, nir_variable *var)
 755 {
 756    nir_deref_instr *deref =
 757       nir_deref_instr_create(build->shader, nir_deref_type_var);
 758
 759    deref->mode = var->data.mode;
 760    deref->type = var->type;
 761    deref->var = var;
 762
 763    nir_ssa_dest_init(&deref->instr, &deref->dest, 1, 32, NULL);
 764
 765    nir_builder_instr_insert(build, &deref->instr);
 766
 767    return deref;
 768 }
 769
 770 static inline nir_deref_instr *
 771 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
 772                       nir_ssa_def *index)
 773 {
 774    assert(glsl_type_is_array(parent->type) ||
 775           glsl_type_is_matrix(parent->type) ||
 776           glsl_type_is_vector(parent->type));
 777
 778    nir_deref_instr *deref =
 779       nir_deref_instr_create(build->shader, nir_deref_type_array);
 780
 781    deref->mode = parent->mode;
 782    deref->type = glsl_get_array_element(parent->type);
 783    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 784    deref->arr.index = nir_src_for_ssa(index);
 785
 786    nir_ssa_dest_init(&deref->instr, &deref->dest,
 787                      parent->dest.ssa.num_components,
 788                      parent->dest.ssa.bit_size, NULL);
 789
 790    nir_builder_instr_insert(build, &deref->instr);
 791
 792    return deref;
 793 }
 794
 795 static inline nir_deref_instr *
 796 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
 797 {
 798    assert(glsl_type_is_array(parent->type) ||
 799           glsl_type_is_matrix(parent->type));
 800
 801    nir_deref_instr *deref =
 802       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
 803
 804    deref->mode = parent->mode;
 805    deref->type = glsl_get_array_element(parent->type);
 806    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 807
 808    nir_ssa_dest_init(&deref->instr, &deref->dest,
 809                      parent->dest.ssa.num_components,
 810                      parent->dest.ssa.bit_size, NULL);
 811
 812    nir_builder_instr_insert(build, &deref->instr);
 813
 814    return deref;
 815 }
 816
 817 static inline nir_deref_instr *
 818 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
 819                        unsigned index)
 820 {
 821    assert(glsl_type_is_struct(parent->type));
 822
 823    nir_deref_instr *deref =
 824       nir_deref_instr_create(build->shader, nir_deref_type_struct);
 825
 826    deref->mode = parent->mode;
 827    deref->type = glsl_get_struct_field(parent->type, index);
 828    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 829    deref->strct.index = index;
 830
 831    nir_ssa_dest_init(&deref->instr, &deref->dest,
 832                      parent->dest.ssa.num_components,
 833                      parent->dest.ssa.bit_size, NULL);
 834
 835    nir_builder_instr_insert(build, &deref->instr);
 836
 837    return deref;
 838 }
 839
 840 static inline nir_deref_instr *
 841 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
 842                      nir_variable_mode mode, const struct glsl_type *type)
 843 {
 844    nir_deref_instr *deref =
 845       nir_deref_instr_create(build->shader, nir_deref_type_cast);
 846
 847    deref->mode = mode;
 848    deref->type = type;
 849    deref->parent = nir_src_for_ssa(parent);
 850
 851    nir_ssa_dest_init(&deref->instr, &deref->dest,
 852                      parent->num_components, parent->bit_size, NULL);
 853
 854    nir_builder_instr_insert(build, &deref->instr);
 855
 856    return deref;
 857 }
 858
 859 /** Returns a deref that follows another but starting from the given parent
 860  *
 861  * The new deref will be the same type and take the same array or struct index
 862  * as the leader deref but it may have a different parent.  This is very
 863  * useful for walking deref paths.
 864  */
 865 static inline nir_deref_instr *
 866 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
 867                          nir_deref_instr *leader)
 868 {
 869    /* If the derefs would have the same parent, don't make a new one */
 870    assert(leader->parent.is_ssa);
 871    if (leader->parent.ssa == &parent->dest.ssa)
 872       return leader;
 873
 874    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
 875
 876    switch (leader->deref_type) {
 877    case nir_deref_type_var:
 878       unreachable("A var dereference cannot have a parent");
 879       break;
 880
 881    case nir_deref_type_array:
 882    case nir_deref_type_array_wildcard:
 883       assert(glsl_type_is_matrix(parent->type) ||
 884              glsl_type_is_array(parent->type));
 885       assert(glsl_get_length(parent->type) ==
 886              glsl_get_length(leader_parent->type));
 887
 888       if (leader->deref_type == nir_deref_type_array) {
 889          assert(leader->arr.index.is_ssa);
 890          return nir_build_deref_array(b, parent, leader->arr.index.ssa);
 891       } else {
 892          return nir_build_deref_array_wildcard(b, parent);
 893       }
 894
 895    case nir_deref_type_struct:
 896       assert(glsl_type_is_struct(parent->type));
 897       assert(glsl_get_length(parent->type) ==
 898              glsl_get_length(leader_parent->type));
 899
 900       return nir_build_deref_struct(b, parent, leader->strct.index);
 901
 902    default:
 903       unreachable("Invalid deref instruction type");
 904    }
 905 }
 906
 907 static inline nir_ssa_def *
 908 nir_load_reg(nir_builder *build, nir_register *reg)
 909 {
 910    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
 911 }
 912
 913 static inline nir_ssa_def *
 914 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
 915 {
 916    nir_intrinsic_instr *load =
 917       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
 918    load->num_components = glsl_get_vector_elements(deref->type);
 919    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
 920    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
 921                      glsl_get_bit_size(deref->type), NULL);
 922    nir_builder_instr_insert(build, &load->instr);
 923    return &load->dest.ssa;
 924 }
 925
 926 static inline void
 927 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
 928                 nir_ssa_def *value, unsigned writemask)
 929 {
 930    nir_intrinsic_instr *store =
 931       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
 932    store->num_components = glsl_get_vector_elements(deref->type);
 933    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
 934    store->src[1] = nir_src_for_ssa(value);
 935    nir_intrinsic_set_write_mask(store,
 936                                 writemask & ((1 << store->num_components) - 1));
 937    nir_builder_instr_insert(build, &store->instr);
 938 }
 939
 940 static inline void
 941 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
 942 {
 943    nir_intrinsic_instr *copy =
 944       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
 945    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
 946    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
 947    nir_builder_instr_insert(build, &copy->instr);
 948 }
 949
 950 static inline nir_ssa_def *
 951 nir_load_var(nir_builder *build, nir_variable *var)
 952 {
 953    return nir_load_deref(build, nir_build_deref_var(build, var));
 954 }
 955
 956 static inline void
 957 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
 958               unsigned writemask)
 959 {
 960    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
 961 }
 962
 963 static inline void
 964 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
 965 {
 966    nir_copy_deref(build, nir_build_deref_var(build, dest),
 967                          nir_build_deref_var(build, src));
 968 }
 969
 970 static inline nir_ssa_def *
 971 nir_load_param(nir_builder *build, uint32_t param_idx)
 972 {
 973    assert(param_idx < build->impl->function->num_params);
 974    nir_parameter *param = &build->impl->function->params[param_idx];
 975
 976    nir_intrinsic_instr *load =
 977       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
 978    nir_intrinsic_set_param_idx(load, param_idx);
 979    load->num_components = param->num_components;
 980    nir_ssa_dest_init(&load->instr, &load->dest,
 981                      param->num_components, param->bit_size, NULL);
 982    nir_builder_instr_insert(build, &load->instr);
 983    return &load->dest.ssa;
 984 }
 985
 986 #include "nir_builder_opcodes.h"
 987
 988 static inline nir_ssa_def *
 989 nir_f2b(nir_builder *build, nir_ssa_def *f)
 990 {
 991    return nir_f2b1(build, f);
 992 }
 993
 994 static inline nir_ssa_def *
 995 nir_i2b(nir_builder *build, nir_ssa_def *i)
 996 {
 997    return nir_i2b1(build, i);
 998 }
 999
1000 static inline nir_ssa_def *
1001 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1002 {
1003    switch (bit_size) {
1004    case 64: return nir_b2f64(build, b);
1005    case 32: return nir_b2f32(build, b);
1006    case 16: return nir_b2f16(build, b);
1007    default:
1008       unreachable("Invalid bit-size");
1009    };
1010 }
1011
1012 static inline nir_ssa_def *
1013 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1014                      unsigned interp_mode)
1015 {
1016    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1017    nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1018    nir_intrinsic_set_interp_mode(bary, interp_mode);
1019    nir_builder_instr_insert(build, &bary->instr);
1020    return &bary->dest.ssa;
1021 }
1022
1023 static inline void
1024 nir_jump(nir_builder *build, nir_jump_type jump_type)
1025 {
1026    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1027    nir_builder_instr_insert(build, &jump->instr);
1028 }
1029
1030 static inline nir_ssa_def *
1031 nir_compare_func(nir_builder *b, enum compare_func func,
1032                  nir_ssa_def *src0, nir_ssa_def *src1)
1033 {
1034    switch (func) {
1035    case COMPARE_FUNC_NEVER:
1036       return nir_imm_int(b, 0);
1037    case COMPARE_FUNC_ALWAYS:
1038       return nir_imm_int(b, ~0);
1039    case COMPARE_FUNC_EQUAL:
1040       return nir_feq(b, src0, src1);
1041    case COMPARE_FUNC_NOTEQUAL:
1042       return nir_fne(b, src0, src1);
1043    case COMPARE_FUNC_GREATER:
1044       return nir_flt(b, src1, src0);
1045    case COMPARE_FUNC_GEQUAL:
1046       return nir_fge(b, src0, src1);
1047    case COMPARE_FUNC_LESS:
1048       return nir_flt(b, src0, src1);
1049    case COMPARE_FUNC_LEQUAL:
1050       return nir_fge(b, src1, src0);
1051    }
1052    unreachable("bad compare func");
1053 }
1054
1055 #endif /* NIR_BUILDER_H */