nir/builder: Add a nir_pack/unpack/bitcast helpers
[mesa.git] / src / compiler / nir / nir_builder.h
1 /*
2 * Copyright © 2014-2015 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef NIR_BUILDER_H
25 #define NIR_BUILDER_H
26
27 #include "nir_control_flow.h"
28 #include "util/half_float.h"
29
30 struct exec_list;
31
32 typedef struct nir_builder {
33 nir_cursor cursor;
34
35 /* Whether new ALU instructions will be marked "exact" */
36 bool exact;
37
38 nir_shader *shader;
39 nir_function_impl *impl;
40 } nir_builder;
41
42 static inline void
43 nir_builder_init(nir_builder *build, nir_function_impl *impl)
44 {
45 memset(build, 0, sizeof(*build));
46 build->exact = false;
47 build->impl = impl;
48 build->shader = impl->function->shader;
49 }
50
51 static inline void
52 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
53 gl_shader_stage stage,
54 const nir_shader_compiler_options *options)
55 {
56 build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
57 nir_function *func = nir_function_create(build->shader, "main");
58 build->exact = false;
59 build->impl = nir_function_impl_create(func);
60 build->cursor = nir_after_cf_list(&build->impl->body);
61 }
62
63 static inline void
64 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
65 {
66 nir_instr_insert(build->cursor, instr);
67
68 /* Move the cursor forward. */
69 build->cursor = nir_after_instr(instr);
70 }
71
72 static inline nir_instr *
73 nir_builder_last_instr(nir_builder *build)
74 {
75 assert(build->cursor.option == nir_cursor_after_instr);
76 return build->cursor.instr;
77 }
78
79 static inline void
80 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
81 {
82 nir_cf_node_insert(build->cursor, cf);
83 }
84
85 static inline bool
86 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
87 {
88 nir_block *block = nir_cursor_current_block(build->cursor);
89 for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
90 if (n == cf_node)
91 return true;
92 }
93 return false;
94 }
95
96 static inline nir_if *
97 nir_push_if(nir_builder *build, nir_ssa_def *condition)
98 {
99 nir_if *nif = nir_if_create(build->shader);
100 nif->condition = nir_src_for_ssa(condition);
101 nir_builder_cf_insert(build, &nif->cf_node);
102 build->cursor = nir_before_cf_list(&nif->then_list);
103 return nif;
104 }
105
106 static inline nir_if *
107 nir_push_else(nir_builder *build, nir_if *nif)
108 {
109 if (nif) {
110 assert(nir_builder_is_inside_cf(build, &nif->cf_node));
111 } else {
112 nir_block *block = nir_cursor_current_block(build->cursor);
113 nif = nir_cf_node_as_if(block->cf_node.parent);
114 }
115 build->cursor = nir_before_cf_list(&nif->else_list);
116 return nif;
117 }
118
119 static inline void
120 nir_pop_if(nir_builder *build, nir_if *nif)
121 {
122 if (nif) {
123 assert(nir_builder_is_inside_cf(build, &nif->cf_node));
124 } else {
125 nir_block *block = nir_cursor_current_block(build->cursor);
126 nif = nir_cf_node_as_if(block->cf_node.parent);
127 }
128 build->cursor = nir_after_cf_node(&nif->cf_node);
129 }
130
131 static inline nir_ssa_def *
132 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
133 {
134 nir_block *block = nir_cursor_current_block(build->cursor);
135 nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
136
137 nir_phi_instr *phi = nir_phi_instr_create(build->shader);
138
139 nir_phi_src *src = ralloc(phi, nir_phi_src);
140 src->pred = nir_if_last_then_block(nif);
141 src->src = nir_src_for_ssa(then_def);
142 exec_list_push_tail(&phi->srcs, &src->node);
143
144 src = ralloc(phi, nir_phi_src);
145 src->pred = nir_if_last_else_block(nif);
146 src->src = nir_src_for_ssa(else_def);
147 exec_list_push_tail(&phi->srcs, &src->node);
148
149 assert(then_def->num_components == else_def->num_components);
150 assert(then_def->bit_size == else_def->bit_size);
151 nir_ssa_dest_init(&phi->instr, &phi->dest,
152 then_def->num_components, then_def->bit_size, NULL);
153
154 nir_builder_instr_insert(build, &phi->instr);
155
156 return &phi->dest.ssa;
157 }
158
159 static inline nir_loop *
160 nir_push_loop(nir_builder *build)
161 {
162 nir_loop *loop = nir_loop_create(build->shader);
163 nir_builder_cf_insert(build, &loop->cf_node);
164 build->cursor = nir_before_cf_list(&loop->body);
165 return loop;
166 }
167
168 static inline void
169 nir_pop_loop(nir_builder *build, nir_loop *loop)
170 {
171 if (loop) {
172 assert(nir_builder_is_inside_cf(build, &loop->cf_node));
173 } else {
174 nir_block *block = nir_cursor_current_block(build->cursor);
175 loop = nir_cf_node_as_loop(block->cf_node.parent);
176 }
177 build->cursor = nir_after_cf_node(&loop->cf_node);
178 }
179
180 static inline nir_ssa_def *
181 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
182 {
183 nir_ssa_undef_instr *undef =
184 nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
185 if (!undef)
186 return NULL;
187
188 nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
189
190 return &undef->def;
191 }
192
193 static inline nir_ssa_def *
194 nir_build_imm(nir_builder *build, unsigned num_components,
195 unsigned bit_size, nir_const_value value)
196 {
197 nir_load_const_instr *load_const =
198 nir_load_const_instr_create(build->shader, num_components, bit_size);
199 if (!load_const)
200 return NULL;
201
202 load_const->value = value;
203
204 nir_builder_instr_insert(build, &load_const->instr);
205
206 return &load_const->def;
207 }
208
209 static inline nir_ssa_def *
210 nir_imm_bool(nir_builder *build, bool x)
211 {
212 nir_const_value v;
213
214 memset(&v, 0, sizeof(v));
215 v.u32[0] = x ? NIR_TRUE : NIR_FALSE;
216
217 return nir_build_imm(build, 1, 32, v);
218 }
219
220 static inline nir_ssa_def *
221 nir_imm_true(nir_builder *build)
222 {
223 return nir_imm_bool(build, true);
224 }
225
226 static inline nir_ssa_def *
227 nir_imm_false(nir_builder *build)
228 {
229 return nir_imm_bool(build, false);
230 }
231
232 static inline nir_ssa_def *
233 nir_imm_float16(nir_builder *build, float x)
234 {
235 nir_const_value v;
236
237 memset(&v, 0, sizeof(v));
238 v.u16[0] = _mesa_float_to_half(x);
239
240 return nir_build_imm(build, 1, 16, v);
241 }
242
243 static inline nir_ssa_def *
244 nir_imm_float(nir_builder *build, float x)
245 {
246 nir_const_value v;
247
248 memset(&v, 0, sizeof(v));
249 v.f32[0] = x;
250
251 return nir_build_imm(build, 1, 32, v);
252 }
253
254 static inline nir_ssa_def *
255 nir_imm_double(nir_builder *build, double x)
256 {
257 nir_const_value v;
258
259 memset(&v, 0, sizeof(v));
260 v.f64[0] = x;
261
262 return nir_build_imm(build, 1, 64, v);
263 }
264
265 static inline nir_ssa_def *
266 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
267 {
268 switch (bit_size) {
269 case 16:
270 return nir_imm_float16(build, x);
271 case 32:
272 return nir_imm_float(build, x);
273 case 64:
274 return nir_imm_double(build, x);
275 }
276
277 unreachable("unknown float immediate bit size");
278 }
279
280 static inline nir_ssa_def *
281 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
282 {
283 nir_const_value v;
284
285 memset(&v, 0, sizeof(v));
286 v.f32[0] = x;
287 v.f32[1] = y;
288 v.f32[2] = z;
289 v.f32[3] = w;
290
291 return nir_build_imm(build, 4, 32, v);
292 }
293
294 static inline nir_ssa_def *
295 nir_imm_ivec2(nir_builder *build, int x, int y)
296 {
297 nir_const_value v;
298
299 memset(&v, 0, sizeof(v));
300 v.i32[0] = x;
301 v.i32[1] = y;
302
303 return nir_build_imm(build, 2, 32, v);
304 }
305
306 static inline nir_ssa_def *
307 nir_imm_int(nir_builder *build, int x)
308 {
309 nir_const_value v;
310
311 memset(&v, 0, sizeof(v));
312 v.i32[0] = x;
313
314 return nir_build_imm(build, 1, 32, v);
315 }
316
317 static inline nir_ssa_def *
318 nir_imm_int64(nir_builder *build, int64_t x)
319 {
320 nir_const_value v;
321
322 memset(&v, 0, sizeof(v));
323 v.i64[0] = x;
324
325 return nir_build_imm(build, 1, 64, v);
326 }
327
328 static inline nir_ssa_def *
329 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
330 {
331 nir_const_value v;
332
333 assert(bit_size == 64 ||
334 (int64_t)x >> bit_size == 0 ||
335 (int64_t)x >> bit_size == -1);
336
337 memset(&v, 0, sizeof(v));
338 assert(bit_size <= 64);
339 v.i64[0] = x & (~0ull >> (64 - bit_size));
340
341 return nir_build_imm(build, 1, bit_size, v);
342 }
343
344 static inline nir_ssa_def *
345 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
346 {
347 nir_const_value v;
348
349 memset(&v, 0, sizeof(v));
350 v.i32[0] = x;
351 v.i32[1] = y;
352 v.i32[2] = z;
353 v.i32[3] = w;
354
355 return nir_build_imm(build, 4, 32, v);
356 }
357
358 static inline nir_ssa_def *
359 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
360 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
361 {
362 const nir_op_info *op_info = &nir_op_infos[op];
363 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
364 if (!instr)
365 return NULL;
366
367 instr->exact = build->exact;
368
369 instr->src[0].src = nir_src_for_ssa(src0);
370 if (src1)
371 instr->src[1].src = nir_src_for_ssa(src1);
372 if (src2)
373 instr->src[2].src = nir_src_for_ssa(src2);
374 if (src3)
375 instr->src[3].src = nir_src_for_ssa(src3);
376
377 /* Guess the number of components the destination temporary should have
378 * based on our input sizes, if it's not fixed for the op.
379 */
380 unsigned num_components = op_info->output_size;
381 if (num_components == 0) {
382 for (unsigned i = 0; i < op_info->num_inputs; i++) {
383 if (op_info->input_sizes[i] == 0)
384 num_components = MAX2(num_components,
385 instr->src[i].src.ssa->num_components);
386 }
387 }
388 assert(num_components != 0);
389
390 /* Figure out the bitwidth based on the source bitwidth if the instruction
391 * is variable-width.
392 */
393 unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
394 if (bit_size == 0) {
395 for (unsigned i = 0; i < op_info->num_inputs; i++) {
396 unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
397 if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
398 if (bit_size)
399 assert(src_bit_size == bit_size);
400 else
401 bit_size = src_bit_size;
402 } else {
403 assert(src_bit_size ==
404 nir_alu_type_get_type_size(op_info->input_types[i]));
405 }
406 }
407 }
408
409 /* When in doubt, assume 32. */
410 if (bit_size == 0)
411 bit_size = 32;
412
413 /* Make sure we don't swizzle from outside of our source vector (like if a
414 * scalar value was passed into a multiply with a vector).
415 */
416 for (unsigned i = 0; i < op_info->num_inputs; i++) {
417 for (unsigned j = instr->src[i].src.ssa->num_components;
418 j < NIR_MAX_VEC_COMPONENTS; j++) {
419 instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
420 }
421 }
422
423 nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
424 bit_size, NULL);
425 instr->dest.write_mask = (1 << num_components) - 1;
426
427 nir_builder_instr_insert(build, &instr->instr);
428
429 return &instr->dest.dest.ssa;
430 }
431
432 #include "nir_builder_opcodes.h"
433
434 static inline nir_ssa_def *
435 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
436 {
437 switch (num_components) {
438 case 4:
439 return nir_vec4(build, comp[0], comp[1], comp[2], comp[3]);
440 case 3:
441 return nir_vec3(build, comp[0], comp[1], comp[2]);
442 case 2:
443 return nir_vec2(build, comp[0], comp[1]);
444 case 1:
445 return comp[0];
446 default:
447 unreachable("bad component count");
448 return NULL;
449 }
450 }
451
452 /**
453 * Similar to nir_fmov, but takes a nir_alu_src instead of a nir_ssa_def.
454 */
455 static inline nir_ssa_def *
456 nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
457 {
458 nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_fmov);
459 nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
460 nir_src_bit_size(src.src), NULL);
461 mov->exact = build->exact;
462 mov->dest.write_mask = (1 << num_components) - 1;
463 mov->src[0] = src;
464 nir_builder_instr_insert(build, &mov->instr);
465
466 return &mov->dest.dest.ssa;
467 }
468
469 static inline nir_ssa_def *
470 nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
471 {
472 nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
473 nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
474 nir_src_bit_size(src.src), NULL);
475 mov->exact = build->exact;
476 mov->dest.write_mask = (1 << num_components) - 1;
477 mov->src[0] = src;
478 nir_builder_instr_insert(build, &mov->instr);
479
480 return &mov->dest.dest.ssa;
481 }
482
483 /**
484 * Construct an fmov or imov that reswizzles the source's components.
485 */
486 static inline nir_ssa_def *
487 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
488 unsigned num_components, bool use_fmov)
489 {
490 assert(num_components <= NIR_MAX_VEC_COMPONENTS);
491 nir_alu_src alu_src = { NIR_SRC_INIT };
492 alu_src.src = nir_src_for_ssa(src);
493 for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++)
494 alu_src.swizzle[i] = swiz[i];
495
496 return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
497 nir_imov_alu(build, alu_src, num_components);
498 }
499
500 /* Selects the right fdot given the number of components in each source. */
501 static inline nir_ssa_def *
502 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
503 {
504 assert(src0->num_components == src1->num_components);
505 switch (src0->num_components) {
506 case 1: return nir_fmul(build, src0, src1);
507 case 2: return nir_fdot2(build, src0, src1);
508 case 3: return nir_fdot3(build, src0, src1);
509 case 4: return nir_fdot4(build, src0, src1);
510 default:
511 unreachable("bad component size");
512 }
513
514 return NULL;
515 }
516
517 static inline nir_ssa_def *
518 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
519 {
520 switch (src0->num_components) {
521 case 1: return nir_ine(b, src0, src1);
522 case 2: return nir_bany_inequal2(b, src0, src1);
523 case 3: return nir_bany_inequal3(b, src0, src1);
524 case 4: return nir_bany_inequal4(b, src0, src1);
525 default:
526 unreachable("bad component size");
527 }
528 }
529
530 static inline nir_ssa_def *
531 nir_bany(nir_builder *b, nir_ssa_def *src)
532 {
533 return nir_bany_inequal(b, src, nir_imm_false(b));
534 }
535
536 static inline nir_ssa_def *
537 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
538 {
539 return nir_swizzle(b, def, &c, 1, false);
540 }
541
542 static inline nir_ssa_def *
543 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
544 {
545 unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
546
547 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
548 if ((mask & (1 << i)) == 0)
549 continue;
550 swizzle[num_channels++] = i;
551 }
552
553 return nir_swizzle(b, def, swizzle, num_channels, false);
554 }
555
556 static inline nir_ssa_def *
557 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
558 {
559 return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
560 }
561
562 static inline nir_ssa_def *
563 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
564 {
565 return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
566 }
567
568 static inline nir_ssa_def *
569 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
570 {
571 assert(src->num_components * src->bit_size == dest_bit_size);
572
573 switch (dest_bit_size) {
574 case 64:
575 switch (src->bit_size) {
576 case 32: return nir_pack_64_2x32(b, src);
577 case 16: return nir_pack_64_4x16(b, src);
578 default: break;
579 }
580 break;
581
582 case 32:
583 if (src->bit_size == 16)
584 return nir_pack_32_2x16(b, src);
585 break;
586
587 default:
588 break;
589 }
590
591 /* If we got here, we have no dedicated unpack opcode. */
592 nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
593 for (unsigned i = 0; i < src->num_components; i++) {
594 nir_ssa_def *val;
595 switch (dest_bit_size) {
596 case 64: val = nir_u2u64(b, nir_channel(b, src, i)); break;
597 case 32: val = nir_u2u32(b, nir_channel(b, src, i)); break;
598 case 16: val = nir_u2u16(b, nir_channel(b, src, i)); break;
599 default: unreachable("Invalid bit size");
600 }
601 val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
602 dest = nir_ior(b, dest, val);
603 }
604 return dest;
605 }
606
607 static inline nir_ssa_def *
608 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
609 {
610 assert(src->num_components == 1);
611 assert(src->bit_size > dest_bit_size);
612 const unsigned dest_num_components = src->bit_size / dest_bit_size;
613 assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
614
615 switch (src->bit_size) {
616 case 64:
617 switch (dest_bit_size) {
618 case 32: return nir_unpack_64_2x32(b, src);
619 case 16: return nir_unpack_64_4x16(b, src);
620 default: break;
621 }
622 break;
623
624 case 32:
625 if (dest_bit_size == 16)
626 return nir_unpack_32_2x16(b, src);
627 break;
628
629 default:
630 break;
631 }
632
633 /* If we got here, we have no dedicated unpack opcode. */
634 nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
635 for (unsigned i = 0; i < dest_num_components; i++) {
636 nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
637 switch (dest_bit_size) {
638 case 32: dest_comps[i] = nir_u2u32(b, val); break;
639 case 16: dest_comps[i] = nir_u2u16(b, val); break;
640 case 8: dest_comps[i] = nir_u2u8(b, val); break;
641 default: unreachable("Invalid bit size");
642 }
643 }
644 return nir_vec(b, dest_comps, dest_num_components);
645 }
646
647 static inline nir_ssa_def *
648 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
649 {
650 assert((src->bit_size * src->num_components) % dest_bit_size == 0);
651 const unsigned dest_num_components =
652 (src->bit_size * src->num_components) / dest_bit_size;
653 assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
654
655 if (src->bit_size > dest_bit_size) {
656 assert(src->bit_size % dest_bit_size == 0);
657 if (src->num_components == 1) {
658 return nir_unpack_bits(b, src, dest_bit_size);
659 } else {
660 const unsigned divisor = src->bit_size / dest_bit_size;
661 assert(src->num_components * divisor == dest_num_components);
662 nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
663 for (unsigned i = 0; i < src->num_components; i++) {
664 nir_ssa_def *unpacked =
665 nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
666 assert(unpacked->num_components == divisor);
667 for (unsigned j = 0; j < divisor; j++)
668 dest[i * divisor + j] = nir_channel(b, unpacked, j);
669 }
670 return nir_vec(b, dest, dest_num_components);
671 }
672 } else if (src->bit_size < dest_bit_size) {
673 assert(dest_bit_size % src->bit_size == 0);
674 if (dest_num_components == 1) {
675 return nir_pack_bits(b, src, dest_bit_size);
676 } else {
677 const unsigned divisor = dest_bit_size / src->bit_size;
678 assert(src->num_components == dest_num_components * divisor);
679 nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
680 for (unsigned i = 0; i < dest_num_components; i++) {
681 nir_component_mask_t src_mask =
682 ((1 << divisor) - 1) << (i * divisor);
683 dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
684 dest_bit_size);
685 }
686 return nir_vec(b, dest, dest_num_components);
687 }
688 } else {
689 assert(src->bit_size == dest_bit_size);
690 return src;
691 }
692 }
693
694 /**
695 * Turns a nir_src into a nir_ssa_def * so it can be passed to
696 * nir_build_alu()-based builder calls.
697 *
698 * See nir_ssa_for_alu_src() for alu instructions.
699 */
700 static inline nir_ssa_def *
701 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
702 {
703 if (src.is_ssa && src.ssa->num_components == num_components)
704 return src.ssa;
705
706 nir_alu_src alu = { NIR_SRC_INIT };
707 alu.src = src;
708 for (int j = 0; j < 4; j++)
709 alu.swizzle[j] = j;
710
711 return nir_imov_alu(build, alu, num_components);
712 }
713
714 /**
715 * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
716 * nir_alu_src's swizzle.
717 */
718 static inline nir_ssa_def *
719 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
720 {
721 static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
722 for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
723 trivial_swizzle[i] = i;
724 nir_alu_src *src = &instr->src[srcn];
725 unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
726
727 if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
728 !src->abs && !src->negate &&
729 (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
730 return src->src.ssa;
731
732 return nir_imov_alu(build, *src, num_components);
733 }
734
735 static inline nir_deref_instr *
736 nir_build_deref_var(nir_builder *build, nir_variable *var)
737 {
738 nir_deref_instr *deref =
739 nir_deref_instr_create(build->shader, nir_deref_type_var);
740
741 deref->mode = var->data.mode;
742 deref->type = var->type;
743 deref->var = var;
744
745 nir_ssa_dest_init(&deref->instr, &deref->dest, 1, 32, NULL);
746
747 nir_builder_instr_insert(build, &deref->instr);
748
749 return deref;
750 }
751
752 static inline nir_deref_instr *
753 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
754 nir_ssa_def *index)
755 {
756 assert(glsl_type_is_array(parent->type) ||
757 glsl_type_is_matrix(parent->type) ||
758 glsl_type_is_vector(parent->type));
759
760 nir_deref_instr *deref =
761 nir_deref_instr_create(build->shader, nir_deref_type_array);
762
763 deref->mode = parent->mode;
764 deref->type = glsl_get_array_element(parent->type);
765 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
766 deref->arr.index = nir_src_for_ssa(index);
767
768 nir_ssa_dest_init(&deref->instr, &deref->dest,
769 parent->dest.ssa.num_components,
770 parent->dest.ssa.bit_size, NULL);
771
772 nir_builder_instr_insert(build, &deref->instr);
773
774 return deref;
775 }
776
777 static inline nir_deref_instr *
778 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
779 {
780 assert(glsl_type_is_array(parent->type) ||
781 glsl_type_is_matrix(parent->type));
782
783 nir_deref_instr *deref =
784 nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
785
786 deref->mode = parent->mode;
787 deref->type = glsl_get_array_element(parent->type);
788 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
789
790 nir_ssa_dest_init(&deref->instr, &deref->dest,
791 parent->dest.ssa.num_components,
792 parent->dest.ssa.bit_size, NULL);
793
794 nir_builder_instr_insert(build, &deref->instr);
795
796 return deref;
797 }
798
799 static inline nir_deref_instr *
800 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
801 unsigned index)
802 {
803 assert(glsl_type_is_struct(parent->type));
804
805 nir_deref_instr *deref =
806 nir_deref_instr_create(build->shader, nir_deref_type_struct);
807
808 deref->mode = parent->mode;
809 deref->type = glsl_get_struct_field(parent->type, index);
810 deref->parent = nir_src_for_ssa(&parent->dest.ssa);
811 deref->strct.index = index;
812
813 nir_ssa_dest_init(&deref->instr, &deref->dest,
814 parent->dest.ssa.num_components,
815 parent->dest.ssa.bit_size, NULL);
816
817 nir_builder_instr_insert(build, &deref->instr);
818
819 return deref;
820 }
821
822 static inline nir_deref_instr *
823 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
824 nir_variable_mode mode, const struct glsl_type *type)
825 {
826 nir_deref_instr *deref =
827 nir_deref_instr_create(build->shader, nir_deref_type_cast);
828
829 deref->mode = mode;
830 deref->type = type;
831 deref->parent = nir_src_for_ssa(parent);
832
833 nir_ssa_dest_init(&deref->instr, &deref->dest,
834 parent->num_components, parent->bit_size, NULL);
835
836 nir_builder_instr_insert(build, &deref->instr);
837
838 return deref;
839 }
840
841 /** Returns a deref that follows another but starting from the given parent
842 *
843 * The new deref will be the same type and take the same array or struct index
844 * as the leader deref but it may have a different parent. This is very
845 * useful for walking deref paths.
846 */
847 static inline nir_deref_instr *
848 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
849 nir_deref_instr *leader)
850 {
851 /* If the derefs would have the same parent, don't make a new one */
852 assert(leader->parent.is_ssa);
853 if (leader->parent.ssa == &parent->dest.ssa)
854 return leader;
855
856 UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
857
858 switch (leader->deref_type) {
859 case nir_deref_type_var:
860 unreachable("A var dereference cannot have a parent");
861 break;
862
863 case nir_deref_type_array:
864 case nir_deref_type_array_wildcard:
865 assert(glsl_type_is_matrix(parent->type) ||
866 glsl_type_is_array(parent->type));
867 assert(glsl_get_length(parent->type) ==
868 glsl_get_length(leader_parent->type));
869
870 if (leader->deref_type == nir_deref_type_array) {
871 assert(leader->arr.index.is_ssa);
872 return nir_build_deref_array(b, parent, leader->arr.index.ssa);
873 } else {
874 return nir_build_deref_array_wildcard(b, parent);
875 }
876
877 case nir_deref_type_struct:
878 assert(glsl_type_is_struct(parent->type));
879 assert(glsl_get_length(parent->type) ==
880 glsl_get_length(leader_parent->type));
881
882 return nir_build_deref_struct(b, parent, leader->strct.index);
883
884 default:
885 unreachable("Invalid deref instruction type");
886 }
887 }
888
889 static inline nir_ssa_def *
890 nir_load_reg(nir_builder *build, nir_register *reg)
891 {
892 return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
893 }
894
895 static inline nir_ssa_def *
896 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
897 {
898 nir_intrinsic_instr *load =
899 nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
900 load->num_components = glsl_get_vector_elements(deref->type);
901 load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
902 nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
903 glsl_get_bit_size(deref->type), NULL);
904 nir_builder_instr_insert(build, &load->instr);
905 return &load->dest.ssa;
906 }
907
908 static inline void
909 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
910 nir_ssa_def *value, unsigned writemask)
911 {
912 nir_intrinsic_instr *store =
913 nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
914 store->num_components = glsl_get_vector_elements(deref->type);
915 store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
916 store->src[1] = nir_src_for_ssa(value);
917 nir_intrinsic_set_write_mask(store,
918 writemask & ((1 << store->num_components) - 1));
919 nir_builder_instr_insert(build, &store->instr);
920 }
921
922 static inline void
923 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
924 {
925 nir_intrinsic_instr *copy =
926 nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
927 copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
928 copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
929 nir_builder_instr_insert(build, &copy->instr);
930 }
931
932 static inline nir_ssa_def *
933 nir_load_var(nir_builder *build, nir_variable *var)
934 {
935 return nir_load_deref(build, nir_build_deref_var(build, var));
936 }
937
938 static inline void
939 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
940 unsigned writemask)
941 {
942 nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
943 }
944
945 static inline void
946 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
947 {
948 nir_copy_deref(build, nir_build_deref_var(build, dest),
949 nir_build_deref_var(build, src));
950 }
951
952 static inline nir_ssa_def *
953 nir_load_param(nir_builder *build, uint32_t param_idx)
954 {
955 assert(param_idx < build->impl->function->num_params);
956 nir_parameter *param = &build->impl->function->params[param_idx];
957
958 nir_intrinsic_instr *load =
959 nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
960 nir_intrinsic_set_param_idx(load, param_idx);
961 load->num_components = param->num_components;
962 nir_ssa_dest_init(&load->instr, &load->dest,
963 param->num_components, param->bit_size, NULL);
964 nir_builder_instr_insert(build, &load->instr);
965 return &load->dest.ssa;
966 }
967
968 #include "nir_builder_opcodes.h"
969
970 static inline nir_ssa_def *
971 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
972 unsigned interp_mode)
973 {
974 nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
975 nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
976 nir_intrinsic_set_interp_mode(bary, interp_mode);
977 nir_builder_instr_insert(build, &bary->instr);
978 return &bary->dest.ssa;
979 }
980
981 static inline void
982 nir_jump(nir_builder *build, nir_jump_type jump_type)
983 {
984 nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
985 nir_builder_instr_insert(build, &jump->instr);
986 }
987
988 static inline nir_ssa_def *
989 nir_compare_func(nir_builder *b, enum compare_func func,
990 nir_ssa_def *src0, nir_ssa_def *src1)
991 {
992 switch (func) {
993 case COMPARE_FUNC_NEVER:
994 return nir_imm_int(b, 0);
995 case COMPARE_FUNC_ALWAYS:
996 return nir_imm_int(b, ~0);
997 case COMPARE_FUNC_EQUAL:
998 return nir_feq(b, src0, src1);
999 case COMPARE_FUNC_NOTEQUAL:
1000 return nir_fne(b, src0, src1);
1001 case COMPARE_FUNC_GREATER:
1002 return nir_flt(b, src1, src0);
1003 case COMPARE_FUNC_GEQUAL:
1004 return nir_fge(b, src0, src1);
1005 case COMPARE_FUNC_LESS:
1006 return nir_flt(b, src0, src1);
1007 case COMPARE_FUNC_LEQUAL:
1008 return nir_fge(b, src1, src0);
1009 }
1010 unreachable("bad compare func");
1011 }
1012
1013 #endif /* NIR_BUILDER_H */