2 * Copyright © 2018 Valve Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 /* This pass computes for each ssa definition if it is uniform.
28 * That is, the variable has the same value for all invocations
31 * This divergence analysis pass expects the shader to be in LCSSA-form.
33 * This algorithm implements "The Simple Divergence Analysis" from
34 * Diogo Sampaio, Rafael De Souza, Sylvain Collange, Fernando Magno Quintão Pereira.
35 * Divergence Analysis. ACM Transactions on Programming Languages and Systems (TOPLAS),
36 * ACM, 2013, 35 (4), pp.13:1-13:36. <10.1145/2523815>. <hal-00909072v2>
40 visit_cf_list(bool *divergent
, struct exec_list
*list
,
41 nir_divergence_options options
, gl_shader_stage stage
);
44 visit_alu(bool *divergent
, nir_alu_instr
*instr
)
46 if (divergent
[instr
->dest
.dest
.ssa
.index
])
49 unsigned num_src
= nir_op_infos
[instr
->op
].num_inputs
;
51 for (unsigned i
= 0; i
< num_src
; i
++) {
52 if (divergent
[instr
->src
[i
].src
.ssa
->index
]) {
53 divergent
[instr
->dest
.dest
.ssa
.index
] = true;
62 visit_intrinsic(bool *divergent
, nir_intrinsic_instr
*instr
,
63 nir_divergence_options options
, gl_shader_stage stage
)
65 if (!nir_intrinsic_infos
[instr
->intrinsic
].has_dest
)
68 if (divergent
[instr
->dest
.ssa
.index
])
71 bool is_divergent
= false;
72 switch (instr
->intrinsic
) {
73 /* Intrinsics which are always uniform */
74 case nir_intrinsic_shader_clock
:
75 case nir_intrinsic_ballot
:
76 case nir_intrinsic_read_invocation
:
77 case nir_intrinsic_read_first_invocation
:
78 case nir_intrinsic_vote_any
:
79 case nir_intrinsic_vote_all
:
80 case nir_intrinsic_vote_feq
:
81 case nir_intrinsic_vote_ieq
:
82 case nir_intrinsic_load_work_dim
:
83 case nir_intrinsic_load_work_group_id
:
84 case nir_intrinsic_load_num_work_groups
:
85 case nir_intrinsic_load_local_group_size
:
86 case nir_intrinsic_load_subgroup_id
:
87 case nir_intrinsic_load_num_subgroups
:
88 case nir_intrinsic_load_subgroup_size
:
89 case nir_intrinsic_load_subgroup_eq_mask
:
90 case nir_intrinsic_load_subgroup_ge_mask
:
91 case nir_intrinsic_load_subgroup_gt_mask
:
92 case nir_intrinsic_load_subgroup_le_mask
:
93 case nir_intrinsic_load_subgroup_lt_mask
:
94 case nir_intrinsic_first_invocation
:
95 case nir_intrinsic_load_base_instance
:
96 case nir_intrinsic_load_base_vertex
:
97 case nir_intrinsic_load_first_vertex
:
98 case nir_intrinsic_load_draw_id
:
99 case nir_intrinsic_load_is_indexed_draw
:
100 case nir_intrinsic_load_viewport_scale
:
101 case nir_intrinsic_load_alpha_ref_float
:
102 case nir_intrinsic_load_user_clip_plane
:
103 case nir_intrinsic_load_viewport_x_scale
:
104 case nir_intrinsic_load_viewport_y_scale
:
105 case nir_intrinsic_load_viewport_z_scale
:
106 case nir_intrinsic_load_viewport_offset
:
107 case nir_intrinsic_load_viewport_z_offset
:
108 case nir_intrinsic_load_blend_const_color_a_float
:
109 case nir_intrinsic_load_blend_const_color_b_float
:
110 case nir_intrinsic_load_blend_const_color_g_float
:
111 case nir_intrinsic_load_blend_const_color_r_float
:
112 case nir_intrinsic_load_blend_const_color_rgba
:
113 case nir_intrinsic_load_blend_const_color_aaaa8888_unorm
:
114 case nir_intrinsic_load_blend_const_color_rgba8888_unorm
:
115 is_divergent
= false;
118 /* Intrinsics with divergence depending on shader stage and hardware */
119 case nir_intrinsic_load_input
:
120 is_divergent
= divergent
[instr
->src
[0].ssa
->index
];
121 if (stage
== MESA_SHADER_FRAGMENT
)
122 is_divergent
|= !(options
& nir_divergence_single_prim_per_subgroup
);
123 else if (stage
== MESA_SHADER_TESS_EVAL
)
124 is_divergent
|= !(options
& nir_divergence_single_patch_per_tes_subgroup
);
128 case nir_intrinsic_load_output
:
129 assert(stage
== MESA_SHADER_TESS_CTRL
|| stage
== MESA_SHADER_FRAGMENT
);
130 is_divergent
= divergent
[instr
->src
[0].ssa
->index
];
131 if (stage
== MESA_SHADER_TESS_CTRL
)
132 is_divergent
|= !(options
& nir_divergence_single_patch_per_tcs_subgroup
);
136 case nir_intrinsic_load_layer_id
:
137 case nir_intrinsic_load_front_face
:
138 assert(stage
== MESA_SHADER_FRAGMENT
);
139 is_divergent
= !(options
& nir_divergence_single_prim_per_subgroup
);
141 case nir_intrinsic_load_view_index
:
142 assert(stage
!= MESA_SHADER_COMPUTE
&& stage
!= MESA_SHADER_KERNEL
);
143 if (options
& nir_divergence_view_index_uniform
)
144 is_divergent
= false;
145 else if (stage
== MESA_SHADER_FRAGMENT
)
146 is_divergent
= !(options
& nir_divergence_single_prim_per_subgroup
);
148 case nir_intrinsic_load_fs_input_interp_deltas
:
149 assert(stage
== MESA_SHADER_FRAGMENT
);
150 is_divergent
= divergent
[instr
->src
[0].ssa
->index
];
151 is_divergent
|= !(options
& nir_divergence_single_prim_per_subgroup
);
153 case nir_intrinsic_load_primitive_id
:
154 if (stage
== MESA_SHADER_FRAGMENT
)
155 is_divergent
= !(options
& nir_divergence_single_prim_per_subgroup
);
156 else if (stage
== MESA_SHADER_TESS_CTRL
)
157 is_divergent
= !(options
& nir_divergence_single_patch_per_tcs_subgroup
);
158 else if (stage
== MESA_SHADER_TESS_EVAL
)
159 is_divergent
= !(options
& nir_divergence_single_patch_per_tes_subgroup
);
161 unreachable("Invalid stage for load_primitive_id");
163 case nir_intrinsic_load_tess_level_inner
:
164 case nir_intrinsic_load_tess_level_outer
:
165 if (stage
== MESA_SHADER_TESS_CTRL
)
166 is_divergent
= !(options
& nir_divergence_single_patch_per_tcs_subgroup
);
167 else if (stage
== MESA_SHADER_TESS_EVAL
)
168 is_divergent
= !(options
& nir_divergence_single_patch_per_tes_subgroup
);
170 unreachable("Invalid stage for load_primitive_tess_level_*");
172 case nir_intrinsic_load_patch_vertices_in
:
173 if (stage
== MESA_SHADER_TESS_EVAL
)
174 is_divergent
= !(options
& nir_divergence_single_patch_per_tes_subgroup
);
176 assert(stage
== MESA_SHADER_TESS_CTRL
);
179 /* Clustered reductions are uniform if cluster_size == subgroup_size or
180 * the source is uniform and the operation is invariant.
181 * Inclusive scans are uniform if
182 * the source is uniform and the operation is invariant
184 case nir_intrinsic_reduce
:
185 if (nir_intrinsic_cluster_size(instr
) == 0)
188 case nir_intrinsic_inclusive_scan
: {
189 nir_op op
= nir_intrinsic_reduction_op(instr
);
190 is_divergent
= divergent
[instr
->src
[0].ssa
->index
];
191 if (op
!= nir_op_umin
&& op
!= nir_op_imin
&& op
!= nir_op_fmin
&&
192 op
!= nir_op_umax
&& op
!= nir_op_imax
&& op
!= nir_op_fmax
&&
193 op
!= nir_op_iand
&& op
!= nir_op_ior
)
198 /* Intrinsics with divergence depending on sources */
199 case nir_intrinsic_ballot_bitfield_extract
:
200 case nir_intrinsic_ballot_find_lsb
:
201 case nir_intrinsic_ballot_find_msb
:
202 case nir_intrinsic_ballot_bit_count_reduce
:
203 case nir_intrinsic_shuffle
:
204 case nir_intrinsic_shuffle_xor
:
205 case nir_intrinsic_shuffle_up
:
206 case nir_intrinsic_shuffle_down
:
207 case nir_intrinsic_quad_broadcast
:
208 case nir_intrinsic_quad_swap_horizontal
:
209 case nir_intrinsic_quad_swap_vertical
:
210 case nir_intrinsic_quad_swap_diagonal
:
211 case nir_intrinsic_load_deref
:
212 case nir_intrinsic_load_ubo
:
213 case nir_intrinsic_load_ssbo
:
214 case nir_intrinsic_load_shared
:
215 case nir_intrinsic_load_global
:
216 case nir_intrinsic_load_uniform
:
217 case nir_intrinsic_load_push_constant
:
218 case nir_intrinsic_load_constant
:
219 case nir_intrinsic_load_sample_pos_from_id
:
220 case nir_intrinsic_load_kernel_input
:
221 case nir_intrinsic_image_load
:
222 case nir_intrinsic_image_deref_load
:
223 case nir_intrinsic_bindless_image_load
:
224 case nir_intrinsic_image_samples
:
225 case nir_intrinsic_image_deref_samples
:
226 case nir_intrinsic_bindless_image_samples
:
227 case nir_intrinsic_get_buffer_size
:
228 case nir_intrinsic_image_size
:
229 case nir_intrinsic_image_deref_size
:
230 case nir_intrinsic_bindless_image_size
:
231 case nir_intrinsic_copy_deref
:
232 case nir_intrinsic_deref_buffer_array_length
:
233 case nir_intrinsic_vulkan_resource_index
:
234 case nir_intrinsic_vulkan_resource_reindex
:
235 case nir_intrinsic_load_vulkan_descriptor
:
236 case nir_intrinsic_atomic_counter_read
:
237 case nir_intrinsic_atomic_counter_read_deref
:
238 case nir_intrinsic_quad_swizzle_amd
:
239 case nir_intrinsic_masked_swizzle_amd
: {
240 unsigned num_srcs
= nir_intrinsic_infos
[instr
->intrinsic
].num_srcs
;
241 for (unsigned i
= 0; i
< num_srcs
; i
++) {
242 if (divergent
[instr
->src
[i
].ssa
->index
]) {
250 /* Intrinsics which are always divergent */
251 case nir_intrinsic_load_color0
:
252 case nir_intrinsic_load_color1
:
253 case nir_intrinsic_load_param
:
254 case nir_intrinsic_load_sample_id
:
255 case nir_intrinsic_load_sample_id_no_per_sample
:
256 case nir_intrinsic_load_sample_mask_in
:
257 case nir_intrinsic_load_interpolated_input
:
258 case nir_intrinsic_load_barycentric_pixel
:
259 case nir_intrinsic_load_barycentric_centroid
:
260 case nir_intrinsic_load_barycentric_sample
:
261 case nir_intrinsic_load_barycentric_at_sample
:
262 case nir_intrinsic_load_barycentric_at_offset
:
263 case nir_intrinsic_interp_deref_at_offset
:
264 case nir_intrinsic_interp_deref_at_sample
:
265 case nir_intrinsic_interp_deref_at_centroid
:
266 case nir_intrinsic_load_tess_coord
:
267 case nir_intrinsic_load_point_coord
:
268 case nir_intrinsic_load_frag_coord
:
269 case nir_intrinsic_load_sample_pos
:
270 case nir_intrinsic_load_vertex_id_zero_base
:
271 case nir_intrinsic_load_vertex_id
:
272 case nir_intrinsic_load_per_vertex_input
:
273 case nir_intrinsic_load_per_vertex_output
:
274 case nir_intrinsic_load_instance_id
:
275 case nir_intrinsic_load_invocation_id
:
276 case nir_intrinsic_load_local_invocation_id
:
277 case nir_intrinsic_load_local_invocation_index
:
278 case nir_intrinsic_load_global_invocation_id
:
279 case nir_intrinsic_load_global_invocation_index
:
280 case nir_intrinsic_load_subgroup_invocation
:
281 case nir_intrinsic_load_helper_invocation
:
282 case nir_intrinsic_is_helper_invocation
:
283 case nir_intrinsic_load_scratch
:
284 case nir_intrinsic_deref_atomic_add
:
285 case nir_intrinsic_deref_atomic_imin
:
286 case nir_intrinsic_deref_atomic_umin
:
287 case nir_intrinsic_deref_atomic_imax
:
288 case nir_intrinsic_deref_atomic_umax
:
289 case nir_intrinsic_deref_atomic_and
:
290 case nir_intrinsic_deref_atomic_or
:
291 case nir_intrinsic_deref_atomic_xor
:
292 case nir_intrinsic_deref_atomic_exchange
:
293 case nir_intrinsic_deref_atomic_comp_swap
:
294 case nir_intrinsic_deref_atomic_fadd
:
295 case nir_intrinsic_deref_atomic_fmin
:
296 case nir_intrinsic_deref_atomic_fmax
:
297 case nir_intrinsic_deref_atomic_fcomp_swap
:
298 case nir_intrinsic_ssbo_atomic_add
:
299 case nir_intrinsic_ssbo_atomic_imin
:
300 case nir_intrinsic_ssbo_atomic_umin
:
301 case nir_intrinsic_ssbo_atomic_imax
:
302 case nir_intrinsic_ssbo_atomic_umax
:
303 case nir_intrinsic_ssbo_atomic_and
:
304 case nir_intrinsic_ssbo_atomic_or
:
305 case nir_intrinsic_ssbo_atomic_xor
:
306 case nir_intrinsic_ssbo_atomic_exchange
:
307 case nir_intrinsic_ssbo_atomic_comp_swap
:
308 case nir_intrinsic_ssbo_atomic_fadd
:
309 case nir_intrinsic_ssbo_atomic_fmax
:
310 case nir_intrinsic_ssbo_atomic_fmin
:
311 case nir_intrinsic_ssbo_atomic_fcomp_swap
:
312 case nir_intrinsic_image_deref_atomic_add
:
313 case nir_intrinsic_image_deref_atomic_min
:
314 case nir_intrinsic_image_deref_atomic_max
:
315 case nir_intrinsic_image_deref_atomic_and
:
316 case nir_intrinsic_image_deref_atomic_or
:
317 case nir_intrinsic_image_deref_atomic_xor
:
318 case nir_intrinsic_image_deref_atomic_exchange
:
319 case nir_intrinsic_image_deref_atomic_comp_swap
:
320 case nir_intrinsic_image_deref_atomic_fadd
:
321 case nir_intrinsic_image_atomic_add
:
322 case nir_intrinsic_image_atomic_min
:
323 case nir_intrinsic_image_atomic_max
:
324 case nir_intrinsic_image_atomic_and
:
325 case nir_intrinsic_image_atomic_or
:
326 case nir_intrinsic_image_atomic_xor
:
327 case nir_intrinsic_image_atomic_exchange
:
328 case nir_intrinsic_image_atomic_comp_swap
:
329 case nir_intrinsic_image_atomic_fadd
:
330 case nir_intrinsic_bindless_image_atomic_add
:
331 case nir_intrinsic_bindless_image_atomic_min
:
332 case nir_intrinsic_bindless_image_atomic_max
:
333 case nir_intrinsic_bindless_image_atomic_and
:
334 case nir_intrinsic_bindless_image_atomic_or
:
335 case nir_intrinsic_bindless_image_atomic_xor
:
336 case nir_intrinsic_bindless_image_atomic_exchange
:
337 case nir_intrinsic_bindless_image_atomic_comp_swap
:
338 case nir_intrinsic_bindless_image_atomic_fadd
:
339 case nir_intrinsic_shared_atomic_add
:
340 case nir_intrinsic_shared_atomic_imin
:
341 case nir_intrinsic_shared_atomic_umin
:
342 case nir_intrinsic_shared_atomic_imax
:
343 case nir_intrinsic_shared_atomic_umax
:
344 case nir_intrinsic_shared_atomic_and
:
345 case nir_intrinsic_shared_atomic_or
:
346 case nir_intrinsic_shared_atomic_xor
:
347 case nir_intrinsic_shared_atomic_exchange
:
348 case nir_intrinsic_shared_atomic_comp_swap
:
349 case nir_intrinsic_shared_atomic_fadd
:
350 case nir_intrinsic_shared_atomic_fmin
:
351 case nir_intrinsic_shared_atomic_fmax
:
352 case nir_intrinsic_shared_atomic_fcomp_swap
:
353 case nir_intrinsic_global_atomic_add
:
354 case nir_intrinsic_global_atomic_imin
:
355 case nir_intrinsic_global_atomic_umin
:
356 case nir_intrinsic_global_atomic_imax
:
357 case nir_intrinsic_global_atomic_umax
:
358 case nir_intrinsic_global_atomic_and
:
359 case nir_intrinsic_global_atomic_or
:
360 case nir_intrinsic_global_atomic_xor
:
361 case nir_intrinsic_global_atomic_exchange
:
362 case nir_intrinsic_global_atomic_comp_swap
:
363 case nir_intrinsic_global_atomic_fadd
:
364 case nir_intrinsic_global_atomic_fmin
:
365 case nir_intrinsic_global_atomic_fmax
:
366 case nir_intrinsic_global_atomic_fcomp_swap
:
367 case nir_intrinsic_atomic_counter_add
:
368 case nir_intrinsic_atomic_counter_min
:
369 case nir_intrinsic_atomic_counter_max
:
370 case nir_intrinsic_atomic_counter_and
:
371 case nir_intrinsic_atomic_counter_or
:
372 case nir_intrinsic_atomic_counter_xor
:
373 case nir_intrinsic_atomic_counter_inc
:
374 case nir_intrinsic_atomic_counter_pre_dec
:
375 case nir_intrinsic_atomic_counter_post_dec
:
376 case nir_intrinsic_atomic_counter_exchange
:
377 case nir_intrinsic_atomic_counter_comp_swap
:
378 case nir_intrinsic_atomic_counter_add_deref
:
379 case nir_intrinsic_atomic_counter_min_deref
:
380 case nir_intrinsic_atomic_counter_max_deref
:
381 case nir_intrinsic_atomic_counter_and_deref
:
382 case nir_intrinsic_atomic_counter_or_deref
:
383 case nir_intrinsic_atomic_counter_xor_deref
:
384 case nir_intrinsic_atomic_counter_inc_deref
:
385 case nir_intrinsic_atomic_counter_pre_dec_deref
:
386 case nir_intrinsic_atomic_counter_post_dec_deref
:
387 case nir_intrinsic_atomic_counter_exchange_deref
:
388 case nir_intrinsic_atomic_counter_comp_swap_deref
:
389 case nir_intrinsic_exclusive_scan
:
390 case nir_intrinsic_ballot_bit_count_exclusive
:
391 case nir_intrinsic_ballot_bit_count_inclusive
:
392 case nir_intrinsic_write_invocation_amd
:
393 case nir_intrinsic_mbcnt_amd
:
402 nir_print_instr(&instr
->instr
, stderr
);
403 unreachable("\nNIR divergence analysis: Unhandled intrinsic.");
407 divergent
[instr
->dest
.ssa
.index
] = is_divergent
;
412 visit_tex(bool *divergent
, nir_tex_instr
*instr
)
414 if (divergent
[instr
->dest
.ssa
.index
])
417 bool is_divergent
= false;
419 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
420 switch (instr
->src
[i
].src_type
) {
421 case nir_tex_src_sampler_deref
:
422 case nir_tex_src_sampler_handle
:
423 case nir_tex_src_sampler_offset
:
424 is_divergent
|= divergent
[instr
->src
[i
].src
.ssa
->index
] &&
425 instr
->sampler_non_uniform
;
427 case nir_tex_src_texture_deref
:
428 case nir_tex_src_texture_handle
:
429 case nir_tex_src_texture_offset
:
430 is_divergent
|= divergent
[instr
->src
[i
].src
.ssa
->index
] &&
431 instr
->texture_non_uniform
;
434 is_divergent
|= divergent
[instr
->src
[i
].src
.ssa
->index
];
439 divergent
[instr
->dest
.ssa
.index
] = is_divergent
;
444 visit_phi(bool *divergent
, nir_phi_instr
*instr
)
446 /* There are 3 types of phi instructions:
447 * (1) gamma: represent the joining point of different paths
448 * created by an “if-then-else” branch.
449 * The resulting value is divergent if the branch condition
450 * or any of the source values is divergent.
452 * (2) mu: which only exist at loop headers,
453 * merge initial and loop-carried values.
454 * The resulting value is divergent if any source value
455 * is divergent or a divergent loop continue condition
456 * is associated with a different ssa-def.
458 * (3) eta: represent values that leave a loop.
459 * The resulting value is divergent if the source value is divergent
460 * or any loop exit condition is divergent for a value which is
461 * not loop-invariant.
462 * (note: there should be no phi for loop-invariant variables.)
465 if (divergent
[instr
->dest
.ssa
.index
])
468 nir_foreach_phi_src(src
, instr
) {
469 /* if any source value is divergent, the resulting value is divergent */
470 if (divergent
[src
->src
.ssa
->index
]) {
471 divergent
[instr
->dest
.ssa
.index
] = true;
476 nir_cf_node
*prev
= nir_cf_node_prev(&instr
->instr
.block
->cf_node
);
479 /* mu: if no predecessor node exists, the phi must be at a loop header */
480 nir_loop
*loop
= nir_cf_node_as_loop(instr
->instr
.block
->cf_node
.parent
);
481 prev
= nir_cf_node_prev(&loop
->cf_node
);
482 nir_ssa_def
* same
= NULL
;
483 bool all_same
= true;
485 /* first, check if all loop-carried values are from the same ssa-def */
486 nir_foreach_phi_src(src
, instr
) {
487 if (src
->pred
== nir_cf_node_as_block(prev
))
489 if (src
->src
.ssa
->parent_instr
->type
== nir_instr_type_ssa_undef
)
493 else if (same
!= src
->src
.ssa
)
497 /* if all loop-carried values are the same, the resulting value is uniform */
501 /* check if the loop-carried values come from different ssa-defs
502 * and the corresponding condition is divergent. */
503 nir_foreach_phi_src(src
, instr
) {
504 /* skip the loop preheader */
505 if (src
->pred
== nir_cf_node_as_block(prev
))
508 /* skip the unconditional back-edge */
509 if (src
->pred
== nir_loop_last_block(loop
))
512 /* if the value is undef, we don't need to check the condition */
513 if (src
->src
.ssa
->parent_instr
->type
== nir_instr_type_ssa_undef
)
516 nir_cf_node
*current
= src
->pred
->cf_node
.parent
;
517 /* check recursively the conditions if any is divergent */
518 while (current
->type
!= nir_cf_node_loop
) {
519 assert (current
->type
== nir_cf_node_if
);
520 nir_if
*if_node
= nir_cf_node_as_if(current
);
521 if (divergent
[if_node
->condition
.ssa
->index
]) {
522 divergent
[instr
->dest
.ssa
.index
] = true;
525 current
= current
->parent
;
527 assert(current
== &loop
->cf_node
);
530 } else if (prev
->type
== nir_cf_node_if
) {
531 /* if only one of the incoming values is defined, the resulting value is uniform */
532 unsigned defined_srcs
= 0;
533 nir_foreach_phi_src(src
, instr
) {
534 if (src
->src
.ssa
->parent_instr
->type
!= nir_instr_type_ssa_undef
)
537 if (defined_srcs
<= 1)
540 /* gamma: check if the condition is divergent */
541 nir_if
*if_node
= nir_cf_node_as_if(prev
);
542 if (divergent
[if_node
->condition
.ssa
->index
]) {
543 divergent
[instr
->dest
.ssa
.index
] = true;
548 /* eta: the predecessor must be a loop */
549 assert(prev
->type
== nir_cf_node_loop
);
551 /* Check if any loop exit condition is divergent:
552 * That is any break happens under divergent condition or
553 * a break is preceeded by a divergent continue
555 nir_foreach_phi_src(src
, instr
) {
556 nir_cf_node
*current
= src
->pred
->cf_node
.parent
;
558 /* check recursively the conditions if any is divergent */
559 while (current
->type
!= nir_cf_node_loop
) {
560 assert(current
->type
== nir_cf_node_if
);
561 nir_if
*if_node
= nir_cf_node_as_if(current
);
562 if (divergent
[if_node
->condition
.ssa
->index
]) {
563 divergent
[instr
->dest
.ssa
.index
] = true;
566 current
= current
->parent
;
568 assert(current
== prev
);
570 /* check if any divergent continue happened before the break */
571 nir_foreach_block_in_cf_node(block
, prev
) {
572 if (block
== src
->pred
)
574 if (!nir_block_ends_in_jump(block
))
577 nir_jump_instr
*jump
= nir_instr_as_jump(nir_block_last_instr(block
));
578 if (jump
->type
!= nir_jump_continue
)
581 current
= block
->cf_node
.parent
;
582 bool is_divergent
= false;
583 while (current
!= prev
) {
584 /* the continue belongs to an inner loop */
585 if (current
->type
== nir_cf_node_loop
) {
586 is_divergent
= false;
589 assert(current
->type
== nir_cf_node_if
);
590 nir_if
*if_node
= nir_cf_node_as_if(current
);
591 is_divergent
|= divergent
[if_node
->condition
.ssa
->index
];
592 current
= current
->parent
;
596 divergent
[instr
->dest
.ssa
.index
] = true;
607 visit_load_const(bool *divergent
, nir_load_const_instr
*instr
)
613 visit_ssa_undef(bool *divergent
, nir_ssa_undef_instr
*instr
)
619 nir_variable_mode_is_uniform(nir_variable_mode mode
) {
621 case nir_var_uniform
:
622 case nir_var_mem_ubo
:
623 case nir_var_mem_ssbo
:
624 case nir_var_mem_shared
:
625 case nir_var_mem_global
:
633 nir_variable_is_uniform(nir_variable
*var
, nir_divergence_options options
,
634 gl_shader_stage stage
)
636 if (nir_variable_mode_is_uniform(var
->data
.mode
))
639 if (stage
== MESA_SHADER_FRAGMENT
&&
640 (options
& nir_divergence_single_prim_per_subgroup
) &&
641 var
->data
.mode
== nir_var_shader_in
&&
642 var
->data
.interpolation
== INTERP_MODE_FLAT
)
645 if (stage
== MESA_SHADER_TESS_CTRL
&&
646 (options
& nir_divergence_single_patch_per_tcs_subgroup
) &&
647 var
->data
.mode
== nir_var_shader_out
&& var
->data
.patch
)
650 if (stage
== MESA_SHADER_TESS_EVAL
&&
651 (options
& nir_divergence_single_patch_per_tes_subgroup
) &&
652 var
->data
.mode
== nir_var_shader_in
&& var
->data
.patch
)
659 visit_deref(bool *divergent
, nir_deref_instr
*deref
,
660 nir_divergence_options options
, gl_shader_stage stage
)
662 if (divergent
[deref
->dest
.ssa
.index
])
665 bool is_divergent
= false;
666 switch (deref
->deref_type
) {
667 case nir_deref_type_var
:
668 is_divergent
= !nir_variable_is_uniform(deref
->var
, options
, stage
);
670 case nir_deref_type_array
:
671 case nir_deref_type_ptr_as_array
:
672 is_divergent
= divergent
[deref
->arr
.index
.ssa
->index
];
674 case nir_deref_type_struct
:
675 case nir_deref_type_array_wildcard
:
676 is_divergent
|= divergent
[deref
->parent
.ssa
->index
];
678 case nir_deref_type_cast
:
679 is_divergent
= !nir_variable_mode_is_uniform(deref
->var
->data
.mode
) ||
680 divergent
[deref
->parent
.ssa
->index
];
684 divergent
[deref
->dest
.ssa
.index
] = is_divergent
;
689 visit_block(bool *divergent
, nir_block
*block
, nir_divergence_options options
,
690 gl_shader_stage stage
)
692 bool has_changed
= false;
694 nir_foreach_instr(instr
, block
) {
695 switch (instr
->type
) {
696 case nir_instr_type_alu
:
697 has_changed
|= visit_alu(divergent
, nir_instr_as_alu(instr
));
699 case nir_instr_type_intrinsic
:
700 has_changed
|= visit_intrinsic(divergent
, nir_instr_as_intrinsic(instr
),
703 case nir_instr_type_tex
:
704 has_changed
|= visit_tex(divergent
, nir_instr_as_tex(instr
));
706 case nir_instr_type_phi
:
707 has_changed
|= visit_phi(divergent
, nir_instr_as_phi(instr
));
709 case nir_instr_type_load_const
:
710 has_changed
|= visit_load_const(divergent
, nir_instr_as_load_const(instr
));
712 case nir_instr_type_ssa_undef
:
713 has_changed
|= visit_ssa_undef(divergent
, nir_instr_as_ssa_undef(instr
));
715 case nir_instr_type_deref
:
716 has_changed
|= visit_deref(divergent
, nir_instr_as_deref(instr
),
719 case nir_instr_type_jump
:
721 case nir_instr_type_call
:
722 case nir_instr_type_parallel_copy
:
723 unreachable("NIR divergence analysis: Unsupported instruction type.");
731 visit_if(bool *divergent
, nir_if
*if_stmt
, nir_divergence_options options
, gl_shader_stage stage
)
733 return visit_cf_list(divergent
, &if_stmt
->then_list
, options
, stage
) |
734 visit_cf_list(divergent
, &if_stmt
->else_list
, options
, stage
);
738 visit_loop(bool *divergent
, nir_loop
*loop
, nir_divergence_options options
, gl_shader_stage stage
)
740 bool has_changed
= false;
743 /* TODO: restructure this and the phi handling more efficiently */
745 repeat
= visit_cf_list(divergent
, &loop
->body
, options
, stage
);
746 has_changed
|= repeat
;
753 visit_cf_list(bool *divergent
, struct exec_list
*list
,
754 nir_divergence_options options
, gl_shader_stage stage
)
756 bool has_changed
= false;
758 foreach_list_typed(nir_cf_node
, node
, node
, list
) {
759 switch (node
->type
) {
760 case nir_cf_node_block
:
761 has_changed
|= visit_block(divergent
, nir_cf_node_as_block(node
),
765 has_changed
|= visit_if(divergent
, nir_cf_node_as_if(node
),
768 case nir_cf_node_loop
:
769 has_changed
|= visit_loop(divergent
, nir_cf_node_as_loop(node
),
772 case nir_cf_node_function
:
773 unreachable("NIR divergence analysis: Unsupported cf_node type.");
782 nir_divergence_analysis(nir_shader
*shader
, nir_divergence_options options
)
784 nir_function_impl
*impl
= nir_shader_get_entrypoint(shader
);
785 bool *t
= rzalloc_array(shader
, bool, impl
->ssa_alloc
);
787 visit_cf_list(t
, &impl
->body
, options
, shader
->info
.stage
);