nir: drop unused alpha_ref_float
[mesa.git] / src / compiler / nir / nir_divergence_analysis.c
1 /*
2 * Copyright © 2018 Valve Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25 #include "nir.h"
26
27 /* This pass computes for each ssa definition if it is uniform.
28 * That is, the variable has the same value for all invocations
29 * of the group.
30 *
31 * This divergence analysis pass expects the shader to be in LCSSA-form.
32 *
33 * This algorithm implements "The Simple Divergence Analysis" from
34 * Diogo Sampaio, Rafael De Souza, Sylvain Collange, Fernando Magno Quintão Pereira.
35 * Divergence Analysis. ACM Transactions on Programming Languages and Systems (TOPLAS),
36 * ACM, 2013, 35 (4), pp.13:1-13:36. <10.1145/2523815>. <hal-00909072v2>
37 */
38
39 static bool
40 visit_cf_list(bool *divergent, struct exec_list *list,
41 nir_divergence_options options, gl_shader_stage stage);
42
43 static bool
44 visit_alu(bool *divergent, nir_alu_instr *instr)
45 {
46 if (divergent[instr->dest.dest.ssa.index])
47 return false;
48
49 unsigned num_src = nir_op_infos[instr->op].num_inputs;
50
51 for (unsigned i = 0; i < num_src; i++) {
52 if (divergent[instr->src[i].src.ssa->index]) {
53 divergent[instr->dest.dest.ssa.index] = true;
54 return true;
55 }
56 }
57
58 return false;
59 }
60
61 static bool
62 visit_intrinsic(bool *divergent, nir_intrinsic_instr *instr,
63 nir_divergence_options options, gl_shader_stage stage)
64 {
65 if (!nir_intrinsic_infos[instr->intrinsic].has_dest)
66 return false;
67
68 if (divergent[instr->dest.ssa.index])
69 return false;
70
71 bool is_divergent = false;
72 switch (instr->intrinsic) {
73 /* Intrinsics which are always uniform */
74 case nir_intrinsic_shader_clock:
75 case nir_intrinsic_ballot:
76 case nir_intrinsic_read_invocation:
77 case nir_intrinsic_read_first_invocation:
78 case nir_intrinsic_vote_any:
79 case nir_intrinsic_vote_all:
80 case nir_intrinsic_vote_feq:
81 case nir_intrinsic_vote_ieq:
82 case nir_intrinsic_load_work_dim:
83 case nir_intrinsic_load_work_group_id:
84 case nir_intrinsic_load_num_work_groups:
85 case nir_intrinsic_load_local_group_size:
86 case nir_intrinsic_load_subgroup_id:
87 case nir_intrinsic_load_num_subgroups:
88 case nir_intrinsic_load_subgroup_size:
89 case nir_intrinsic_load_subgroup_eq_mask:
90 case nir_intrinsic_load_subgroup_ge_mask:
91 case nir_intrinsic_load_subgroup_gt_mask:
92 case nir_intrinsic_load_subgroup_le_mask:
93 case nir_intrinsic_load_subgroup_lt_mask:
94 case nir_intrinsic_first_invocation:
95 case nir_intrinsic_load_base_instance:
96 case nir_intrinsic_load_base_vertex:
97 case nir_intrinsic_load_first_vertex:
98 case nir_intrinsic_load_draw_id:
99 case nir_intrinsic_load_is_indexed_draw:
100 case nir_intrinsic_load_viewport_scale:
101 case nir_intrinsic_load_user_clip_plane:
102 case nir_intrinsic_load_viewport_x_scale:
103 case nir_intrinsic_load_viewport_y_scale:
104 case nir_intrinsic_load_viewport_z_scale:
105 case nir_intrinsic_load_viewport_offset:
106 case nir_intrinsic_load_viewport_z_offset:
107 case nir_intrinsic_load_blend_const_color_a_float:
108 case nir_intrinsic_load_blend_const_color_b_float:
109 case nir_intrinsic_load_blend_const_color_g_float:
110 case nir_intrinsic_load_blend_const_color_r_float:
111 case nir_intrinsic_load_blend_const_color_rgba:
112 case nir_intrinsic_load_blend_const_color_aaaa8888_unorm:
113 case nir_intrinsic_load_blend_const_color_rgba8888_unorm:
114 is_divergent = false;
115 break;
116
117 /* Intrinsics with divergence depending on shader stage and hardware */
118 case nir_intrinsic_load_input:
119 is_divergent = divergent[instr->src[0].ssa->index];
120 if (stage == MESA_SHADER_FRAGMENT)
121 is_divergent |= !(options & nir_divergence_single_prim_per_subgroup);
122 else if (stage == MESA_SHADER_TESS_EVAL)
123 is_divergent |= !(options & nir_divergence_single_patch_per_tes_subgroup);
124 else
125 is_divergent = true;
126 break;
127 case nir_intrinsic_load_output:
128 assert(stage == MESA_SHADER_TESS_CTRL || stage == MESA_SHADER_FRAGMENT);
129 is_divergent = divergent[instr->src[0].ssa->index];
130 if (stage == MESA_SHADER_TESS_CTRL)
131 is_divergent |= !(options & nir_divergence_single_patch_per_tcs_subgroup);
132 else
133 is_divergent = true;
134 break;
135 case nir_intrinsic_load_layer_id:
136 case nir_intrinsic_load_front_face:
137 assert(stage == MESA_SHADER_FRAGMENT);
138 is_divergent = !(options & nir_divergence_single_prim_per_subgroup);
139 break;
140 case nir_intrinsic_load_view_index:
141 assert(stage != MESA_SHADER_COMPUTE && stage != MESA_SHADER_KERNEL);
142 if (options & nir_divergence_view_index_uniform)
143 is_divergent = false;
144 else if (stage == MESA_SHADER_FRAGMENT)
145 is_divergent = !(options & nir_divergence_single_prim_per_subgroup);
146 break;
147 case nir_intrinsic_load_fs_input_interp_deltas:
148 assert(stage == MESA_SHADER_FRAGMENT);
149 is_divergent = divergent[instr->src[0].ssa->index];
150 is_divergent |= !(options & nir_divergence_single_prim_per_subgroup);
151 break;
152 case nir_intrinsic_load_primitive_id:
153 if (stage == MESA_SHADER_FRAGMENT)
154 is_divergent = !(options & nir_divergence_single_prim_per_subgroup);
155 else if (stage == MESA_SHADER_TESS_CTRL)
156 is_divergent = !(options & nir_divergence_single_patch_per_tcs_subgroup);
157 else if (stage == MESA_SHADER_TESS_EVAL)
158 is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
159 else
160 unreachable("Invalid stage for load_primitive_id");
161 break;
162 case nir_intrinsic_load_tess_level_inner:
163 case nir_intrinsic_load_tess_level_outer:
164 if (stage == MESA_SHADER_TESS_CTRL)
165 is_divergent = !(options & nir_divergence_single_patch_per_tcs_subgroup);
166 else if (stage == MESA_SHADER_TESS_EVAL)
167 is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
168 else
169 unreachable("Invalid stage for load_primitive_tess_level_*");
170 break;
171 case nir_intrinsic_load_patch_vertices_in:
172 if (stage == MESA_SHADER_TESS_EVAL)
173 is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
174 else
175 assert(stage == MESA_SHADER_TESS_CTRL);
176 break;
177
178 /* Clustered reductions are uniform if cluster_size == subgroup_size or
179 * the source is uniform and the operation is invariant.
180 * Inclusive scans are uniform if
181 * the source is uniform and the operation is invariant
182 */
183 case nir_intrinsic_reduce:
184 if (nir_intrinsic_cluster_size(instr) == 0)
185 return false;
186 /* fallthrough */
187 case nir_intrinsic_inclusive_scan: {
188 nir_op op = nir_intrinsic_reduction_op(instr);
189 is_divergent = divergent[instr->src[0].ssa->index];
190 if (op != nir_op_umin && op != nir_op_imin && op != nir_op_fmin &&
191 op != nir_op_umax && op != nir_op_imax && op != nir_op_fmax &&
192 op != nir_op_iand && op != nir_op_ior)
193 is_divergent = true;
194 break;
195 }
196
197 /* Intrinsics with divergence depending on sources */
198 case nir_intrinsic_ballot_bitfield_extract:
199 case nir_intrinsic_ballot_find_lsb:
200 case nir_intrinsic_ballot_find_msb:
201 case nir_intrinsic_ballot_bit_count_reduce:
202 case nir_intrinsic_shuffle:
203 case nir_intrinsic_shuffle_xor:
204 case nir_intrinsic_shuffle_up:
205 case nir_intrinsic_shuffle_down:
206 case nir_intrinsic_quad_broadcast:
207 case nir_intrinsic_quad_swap_horizontal:
208 case nir_intrinsic_quad_swap_vertical:
209 case nir_intrinsic_quad_swap_diagonal:
210 case nir_intrinsic_load_deref:
211 case nir_intrinsic_load_ubo:
212 case nir_intrinsic_load_ssbo:
213 case nir_intrinsic_load_shared:
214 case nir_intrinsic_load_global:
215 case nir_intrinsic_load_uniform:
216 case nir_intrinsic_load_push_constant:
217 case nir_intrinsic_load_constant:
218 case nir_intrinsic_load_sample_pos_from_id:
219 case nir_intrinsic_load_kernel_input:
220 case nir_intrinsic_image_load:
221 case nir_intrinsic_image_deref_load:
222 case nir_intrinsic_bindless_image_load:
223 case nir_intrinsic_image_samples:
224 case nir_intrinsic_image_deref_samples:
225 case nir_intrinsic_bindless_image_samples:
226 case nir_intrinsic_get_buffer_size:
227 case nir_intrinsic_image_size:
228 case nir_intrinsic_image_deref_size:
229 case nir_intrinsic_bindless_image_size:
230 case nir_intrinsic_copy_deref:
231 case nir_intrinsic_deref_buffer_array_length:
232 case nir_intrinsic_vulkan_resource_index:
233 case nir_intrinsic_vulkan_resource_reindex:
234 case nir_intrinsic_load_vulkan_descriptor:
235 case nir_intrinsic_atomic_counter_read:
236 case nir_intrinsic_atomic_counter_read_deref:
237 case nir_intrinsic_quad_swizzle_amd:
238 case nir_intrinsic_masked_swizzle_amd: {
239 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
240 for (unsigned i = 0; i < num_srcs; i++) {
241 if (divergent[instr->src[i].ssa->index]) {
242 is_divergent = true;
243 break;
244 }
245 }
246 break;
247 }
248
249 /* Intrinsics which are always divergent */
250 case nir_intrinsic_load_color0:
251 case nir_intrinsic_load_color1:
252 case nir_intrinsic_load_param:
253 case nir_intrinsic_load_sample_id:
254 case nir_intrinsic_load_sample_id_no_per_sample:
255 case nir_intrinsic_load_sample_mask_in:
256 case nir_intrinsic_load_interpolated_input:
257 case nir_intrinsic_load_barycentric_pixel:
258 case nir_intrinsic_load_barycentric_centroid:
259 case nir_intrinsic_load_barycentric_sample:
260 case nir_intrinsic_load_barycentric_at_sample:
261 case nir_intrinsic_load_barycentric_at_offset:
262 case nir_intrinsic_interp_deref_at_offset:
263 case nir_intrinsic_interp_deref_at_sample:
264 case nir_intrinsic_interp_deref_at_centroid:
265 case nir_intrinsic_load_tess_coord:
266 case nir_intrinsic_load_point_coord:
267 case nir_intrinsic_load_frag_coord:
268 case nir_intrinsic_load_sample_pos:
269 case nir_intrinsic_load_vertex_id_zero_base:
270 case nir_intrinsic_load_vertex_id:
271 case nir_intrinsic_load_per_vertex_input:
272 case nir_intrinsic_load_per_vertex_output:
273 case nir_intrinsic_load_instance_id:
274 case nir_intrinsic_load_invocation_id:
275 case nir_intrinsic_load_local_invocation_id:
276 case nir_intrinsic_load_local_invocation_index:
277 case nir_intrinsic_load_global_invocation_id:
278 case nir_intrinsic_load_global_invocation_index:
279 case nir_intrinsic_load_subgroup_invocation:
280 case nir_intrinsic_load_helper_invocation:
281 case nir_intrinsic_is_helper_invocation:
282 case nir_intrinsic_load_scratch:
283 case nir_intrinsic_deref_atomic_add:
284 case nir_intrinsic_deref_atomic_imin:
285 case nir_intrinsic_deref_atomic_umin:
286 case nir_intrinsic_deref_atomic_imax:
287 case nir_intrinsic_deref_atomic_umax:
288 case nir_intrinsic_deref_atomic_and:
289 case nir_intrinsic_deref_atomic_or:
290 case nir_intrinsic_deref_atomic_xor:
291 case nir_intrinsic_deref_atomic_exchange:
292 case nir_intrinsic_deref_atomic_comp_swap:
293 case nir_intrinsic_deref_atomic_fadd:
294 case nir_intrinsic_deref_atomic_fmin:
295 case nir_intrinsic_deref_atomic_fmax:
296 case nir_intrinsic_deref_atomic_fcomp_swap:
297 case nir_intrinsic_ssbo_atomic_add:
298 case nir_intrinsic_ssbo_atomic_imin:
299 case nir_intrinsic_ssbo_atomic_umin:
300 case nir_intrinsic_ssbo_atomic_imax:
301 case nir_intrinsic_ssbo_atomic_umax:
302 case nir_intrinsic_ssbo_atomic_and:
303 case nir_intrinsic_ssbo_atomic_or:
304 case nir_intrinsic_ssbo_atomic_xor:
305 case nir_intrinsic_ssbo_atomic_exchange:
306 case nir_intrinsic_ssbo_atomic_comp_swap:
307 case nir_intrinsic_ssbo_atomic_fadd:
308 case nir_intrinsic_ssbo_atomic_fmax:
309 case nir_intrinsic_ssbo_atomic_fmin:
310 case nir_intrinsic_ssbo_atomic_fcomp_swap:
311 case nir_intrinsic_image_deref_atomic_add:
312 case nir_intrinsic_image_deref_atomic_imin:
313 case nir_intrinsic_image_deref_atomic_umin:
314 case nir_intrinsic_image_deref_atomic_imax:
315 case nir_intrinsic_image_deref_atomic_umax:
316 case nir_intrinsic_image_deref_atomic_and:
317 case nir_intrinsic_image_deref_atomic_or:
318 case nir_intrinsic_image_deref_atomic_xor:
319 case nir_intrinsic_image_deref_atomic_exchange:
320 case nir_intrinsic_image_deref_atomic_comp_swap:
321 case nir_intrinsic_image_deref_atomic_fadd:
322 case nir_intrinsic_image_atomic_add:
323 case nir_intrinsic_image_atomic_imin:
324 case nir_intrinsic_image_atomic_umin:
325 case nir_intrinsic_image_atomic_imax:
326 case nir_intrinsic_image_atomic_umax:
327 case nir_intrinsic_image_atomic_and:
328 case nir_intrinsic_image_atomic_or:
329 case nir_intrinsic_image_atomic_xor:
330 case nir_intrinsic_image_atomic_exchange:
331 case nir_intrinsic_image_atomic_comp_swap:
332 case nir_intrinsic_image_atomic_fadd:
333 case nir_intrinsic_bindless_image_atomic_add:
334 case nir_intrinsic_bindless_image_atomic_imin:
335 case nir_intrinsic_bindless_image_atomic_umin:
336 case nir_intrinsic_bindless_image_atomic_imax:
337 case nir_intrinsic_bindless_image_atomic_umax:
338 case nir_intrinsic_bindless_image_atomic_and:
339 case nir_intrinsic_bindless_image_atomic_or:
340 case nir_intrinsic_bindless_image_atomic_xor:
341 case nir_intrinsic_bindless_image_atomic_exchange:
342 case nir_intrinsic_bindless_image_atomic_comp_swap:
343 case nir_intrinsic_bindless_image_atomic_fadd:
344 case nir_intrinsic_shared_atomic_add:
345 case nir_intrinsic_shared_atomic_imin:
346 case nir_intrinsic_shared_atomic_umin:
347 case nir_intrinsic_shared_atomic_imax:
348 case nir_intrinsic_shared_atomic_umax:
349 case nir_intrinsic_shared_atomic_and:
350 case nir_intrinsic_shared_atomic_or:
351 case nir_intrinsic_shared_atomic_xor:
352 case nir_intrinsic_shared_atomic_exchange:
353 case nir_intrinsic_shared_atomic_comp_swap:
354 case nir_intrinsic_shared_atomic_fadd:
355 case nir_intrinsic_shared_atomic_fmin:
356 case nir_intrinsic_shared_atomic_fmax:
357 case nir_intrinsic_shared_atomic_fcomp_swap:
358 case nir_intrinsic_global_atomic_add:
359 case nir_intrinsic_global_atomic_imin:
360 case nir_intrinsic_global_atomic_umin:
361 case nir_intrinsic_global_atomic_imax:
362 case nir_intrinsic_global_atomic_umax:
363 case nir_intrinsic_global_atomic_and:
364 case nir_intrinsic_global_atomic_or:
365 case nir_intrinsic_global_atomic_xor:
366 case nir_intrinsic_global_atomic_exchange:
367 case nir_intrinsic_global_atomic_comp_swap:
368 case nir_intrinsic_global_atomic_fadd:
369 case nir_intrinsic_global_atomic_fmin:
370 case nir_intrinsic_global_atomic_fmax:
371 case nir_intrinsic_global_atomic_fcomp_swap:
372 case nir_intrinsic_atomic_counter_add:
373 case nir_intrinsic_atomic_counter_min:
374 case nir_intrinsic_atomic_counter_max:
375 case nir_intrinsic_atomic_counter_and:
376 case nir_intrinsic_atomic_counter_or:
377 case nir_intrinsic_atomic_counter_xor:
378 case nir_intrinsic_atomic_counter_inc:
379 case nir_intrinsic_atomic_counter_pre_dec:
380 case nir_intrinsic_atomic_counter_post_dec:
381 case nir_intrinsic_atomic_counter_exchange:
382 case nir_intrinsic_atomic_counter_comp_swap:
383 case nir_intrinsic_atomic_counter_add_deref:
384 case nir_intrinsic_atomic_counter_min_deref:
385 case nir_intrinsic_atomic_counter_max_deref:
386 case nir_intrinsic_atomic_counter_and_deref:
387 case nir_intrinsic_atomic_counter_or_deref:
388 case nir_intrinsic_atomic_counter_xor_deref:
389 case nir_intrinsic_atomic_counter_inc_deref:
390 case nir_intrinsic_atomic_counter_pre_dec_deref:
391 case nir_intrinsic_atomic_counter_post_dec_deref:
392 case nir_intrinsic_atomic_counter_exchange_deref:
393 case nir_intrinsic_atomic_counter_comp_swap_deref:
394 case nir_intrinsic_exclusive_scan:
395 case nir_intrinsic_ballot_bit_count_exclusive:
396 case nir_intrinsic_ballot_bit_count_inclusive:
397 case nir_intrinsic_write_invocation_amd:
398 case nir_intrinsic_mbcnt_amd:
399 is_divergent = true;
400 break;
401
402 default:
403 #ifdef NDEBUG
404 is_divergent = true;
405 break;
406 #else
407 nir_print_instr(&instr->instr, stderr);
408 unreachable("\nNIR divergence analysis: Unhandled intrinsic.");
409 #endif
410 }
411
412 divergent[instr->dest.ssa.index] = is_divergent;
413 return is_divergent;
414 }
415
416 static bool
417 visit_tex(bool *divergent, nir_tex_instr *instr)
418 {
419 if (divergent[instr->dest.ssa.index])
420 return false;
421
422 bool is_divergent = false;
423
424 for (unsigned i = 0; i < instr->num_srcs; i++) {
425 switch (instr->src[i].src_type) {
426 case nir_tex_src_sampler_deref:
427 case nir_tex_src_sampler_handle:
428 case nir_tex_src_sampler_offset:
429 is_divergent |= divergent[instr->src[i].src.ssa->index] &&
430 instr->sampler_non_uniform;
431 break;
432 case nir_tex_src_texture_deref:
433 case nir_tex_src_texture_handle:
434 case nir_tex_src_texture_offset:
435 is_divergent |= divergent[instr->src[i].src.ssa->index] &&
436 instr->texture_non_uniform;
437 break;
438 default:
439 is_divergent |= divergent[instr->src[i].src.ssa->index];
440 break;
441 }
442 }
443
444 divergent[instr->dest.ssa.index] = is_divergent;
445 return is_divergent;
446 }
447
448 static bool
449 visit_phi(bool *divergent, nir_phi_instr *instr)
450 {
451 /* There are 3 types of phi instructions:
452 * (1) gamma: represent the joining point of different paths
453 * created by an “if-then-else” branch.
454 * The resulting value is divergent if the branch condition
455 * or any of the source values is divergent.
456 *
457 * (2) mu: which only exist at loop headers,
458 * merge initial and loop-carried values.
459 * The resulting value is divergent if any source value
460 * is divergent or a divergent loop continue condition
461 * is associated with a different ssa-def.
462 *
463 * (3) eta: represent values that leave a loop.
464 * The resulting value is divergent if the source value is divergent
465 * or any loop exit condition is divergent for a value which is
466 * not loop-invariant.
467 * (note: there should be no phi for loop-invariant variables.)
468 */
469
470 if (divergent[instr->dest.ssa.index])
471 return false;
472
473 nir_foreach_phi_src(src, instr) {
474 /* if any source value is divergent, the resulting value is divergent */
475 if (divergent[src->src.ssa->index]) {
476 divergent[instr->dest.ssa.index] = true;
477 return true;
478 }
479 }
480
481 nir_cf_node *prev = nir_cf_node_prev(&instr->instr.block->cf_node);
482
483 if (!prev) {
484 /* mu: if no predecessor node exists, the phi must be at a loop header */
485 nir_loop *loop = nir_cf_node_as_loop(instr->instr.block->cf_node.parent);
486 prev = nir_cf_node_prev(&loop->cf_node);
487 nir_ssa_def* same = NULL;
488 bool all_same = true;
489
490 /* first, check if all loop-carried values are from the same ssa-def */
491 nir_foreach_phi_src(src, instr) {
492 if (src->pred == nir_cf_node_as_block(prev))
493 continue;
494 if (src->src.ssa->parent_instr->type == nir_instr_type_ssa_undef)
495 continue;
496 if (!same)
497 same = src->src.ssa;
498 else if (same != src->src.ssa)
499 all_same = false;
500 }
501
502 /* if all loop-carried values are the same, the resulting value is uniform */
503 if (all_same)
504 return false;
505
506 /* check if the loop-carried values come from different ssa-defs
507 * and the corresponding condition is divergent. */
508 nir_foreach_phi_src(src, instr) {
509 /* skip the loop preheader */
510 if (src->pred == nir_cf_node_as_block(prev))
511 continue;
512
513 /* skip the unconditional back-edge */
514 if (src->pred == nir_loop_last_block(loop))
515 continue;
516
517 /* if the value is undef, we don't need to check the condition */
518 if (src->src.ssa->parent_instr->type == nir_instr_type_ssa_undef)
519 continue;
520
521 nir_cf_node *current = src->pred->cf_node.parent;
522 /* check recursively the conditions if any is divergent */
523 while (current->type != nir_cf_node_loop) {
524 assert (current->type == nir_cf_node_if);
525 nir_if *if_node = nir_cf_node_as_if(current);
526 if (divergent[if_node->condition.ssa->index]) {
527 divergent[instr->dest.ssa.index] = true;
528 return true;
529 }
530 current = current->parent;
531 }
532 assert(current == &loop->cf_node);
533 }
534
535 } else if (prev->type == nir_cf_node_if) {
536 /* if only one of the incoming values is defined, the resulting value is uniform */
537 unsigned defined_srcs = 0;
538 nir_foreach_phi_src(src, instr) {
539 if (src->src.ssa->parent_instr->type != nir_instr_type_ssa_undef)
540 defined_srcs++;
541 }
542 if (defined_srcs <= 1)
543 return false;
544
545 /* gamma: check if the condition is divergent */
546 nir_if *if_node = nir_cf_node_as_if(prev);
547 if (divergent[if_node->condition.ssa->index]) {
548 divergent[instr->dest.ssa.index] = true;
549 return true;
550 }
551
552 } else {
553 /* eta: the predecessor must be a loop */
554 assert(prev->type == nir_cf_node_loop);
555
556 /* Check if any loop exit condition is divergent:
557 * That is any break happens under divergent condition or
558 * a break is preceeded by a divergent continue
559 */
560 nir_foreach_phi_src(src, instr) {
561 nir_cf_node *current = src->pred->cf_node.parent;
562
563 /* check recursively the conditions if any is divergent */
564 while (current->type != nir_cf_node_loop) {
565 assert(current->type == nir_cf_node_if);
566 nir_if *if_node = nir_cf_node_as_if(current);
567 if (divergent[if_node->condition.ssa->index]) {
568 divergent[instr->dest.ssa.index] = true;
569 return true;
570 }
571 current = current->parent;
572 }
573 assert(current == prev);
574
575 /* check if any divergent continue happened before the break */
576 nir_foreach_block_in_cf_node(block, prev) {
577 if (block == src->pred)
578 break;
579 if (!nir_block_ends_in_jump(block))
580 continue;
581
582 nir_jump_instr *jump = nir_instr_as_jump(nir_block_last_instr(block));
583 if (jump->type != nir_jump_continue)
584 continue;
585
586 current = block->cf_node.parent;
587 bool is_divergent = false;
588 while (current != prev) {
589 /* the continue belongs to an inner loop */
590 if (current->type == nir_cf_node_loop) {
591 is_divergent = false;
592 break;
593 }
594 assert(current->type == nir_cf_node_if);
595 nir_if *if_node = nir_cf_node_as_if(current);
596 is_divergent |= divergent[if_node->condition.ssa->index];
597 current = current->parent;
598 }
599
600 if (is_divergent) {
601 divergent[instr->dest.ssa.index] = true;
602 return true;
603 }
604 }
605 }
606 }
607
608 return false;
609 }
610
611 static bool
612 visit_load_const(bool *divergent, nir_load_const_instr *instr)
613 {
614 return false;
615 }
616
617 static bool
618 visit_ssa_undef(bool *divergent, nir_ssa_undef_instr *instr)
619 {
620 return false;
621 }
622
623 static bool
624 nir_variable_mode_is_uniform(nir_variable_mode mode) {
625 switch (mode) {
626 case nir_var_uniform:
627 case nir_var_mem_ubo:
628 case nir_var_mem_ssbo:
629 case nir_var_mem_shared:
630 case nir_var_mem_global:
631 return true;
632 default:
633 return false;
634 }
635 }
636
637 static bool
638 nir_variable_is_uniform(nir_variable *var, nir_divergence_options options,
639 gl_shader_stage stage)
640 {
641 if (nir_variable_mode_is_uniform(var->data.mode))
642 return true;
643
644 if (stage == MESA_SHADER_FRAGMENT &&
645 (options & nir_divergence_single_prim_per_subgroup) &&
646 var->data.mode == nir_var_shader_in &&
647 var->data.interpolation == INTERP_MODE_FLAT)
648 return true;
649
650 if (stage == MESA_SHADER_TESS_CTRL &&
651 (options & nir_divergence_single_patch_per_tcs_subgroup) &&
652 var->data.mode == nir_var_shader_out && var->data.patch)
653 return true;
654
655 if (stage == MESA_SHADER_TESS_EVAL &&
656 (options & nir_divergence_single_patch_per_tes_subgroup) &&
657 var->data.mode == nir_var_shader_in && var->data.patch)
658 return true;
659
660 return false;
661 }
662
663 static bool
664 visit_deref(bool *divergent, nir_deref_instr *deref,
665 nir_divergence_options options, gl_shader_stage stage)
666 {
667 if (divergent[deref->dest.ssa.index])
668 return false;
669
670 bool is_divergent = false;
671 switch (deref->deref_type) {
672 case nir_deref_type_var:
673 is_divergent = !nir_variable_is_uniform(deref->var, options, stage);
674 break;
675 case nir_deref_type_array:
676 case nir_deref_type_ptr_as_array:
677 is_divergent = divergent[deref->arr.index.ssa->index];
678 /* fallthrough */
679 case nir_deref_type_struct:
680 case nir_deref_type_array_wildcard:
681 is_divergent |= divergent[deref->parent.ssa->index];
682 break;
683 case nir_deref_type_cast:
684 is_divergent = !nir_variable_mode_is_uniform(deref->var->data.mode) ||
685 divergent[deref->parent.ssa->index];
686 break;
687 }
688
689 divergent[deref->dest.ssa.index] = is_divergent;
690 return is_divergent;
691 }
692
693 static bool
694 visit_block(bool *divergent, nir_block *block, nir_divergence_options options,
695 gl_shader_stage stage)
696 {
697 bool has_changed = false;
698
699 nir_foreach_instr(instr, block) {
700 switch (instr->type) {
701 case nir_instr_type_alu:
702 has_changed |= visit_alu(divergent, nir_instr_as_alu(instr));
703 break;
704 case nir_instr_type_intrinsic:
705 has_changed |= visit_intrinsic(divergent, nir_instr_as_intrinsic(instr),
706 options, stage);
707 break;
708 case nir_instr_type_tex:
709 has_changed |= visit_tex(divergent, nir_instr_as_tex(instr));
710 break;
711 case nir_instr_type_phi:
712 has_changed |= visit_phi(divergent, nir_instr_as_phi(instr));
713 break;
714 case nir_instr_type_load_const:
715 has_changed |= visit_load_const(divergent, nir_instr_as_load_const(instr));
716 break;
717 case nir_instr_type_ssa_undef:
718 has_changed |= visit_ssa_undef(divergent, nir_instr_as_ssa_undef(instr));
719 break;
720 case nir_instr_type_deref:
721 has_changed |= visit_deref(divergent, nir_instr_as_deref(instr),
722 options, stage);
723 break;
724 case nir_instr_type_jump:
725 break;
726 case nir_instr_type_call:
727 case nir_instr_type_parallel_copy:
728 unreachable("NIR divergence analysis: Unsupported instruction type.");
729 }
730 }
731
732 return has_changed;
733 }
734
735 static bool
736 visit_if(bool *divergent, nir_if *if_stmt, nir_divergence_options options, gl_shader_stage stage)
737 {
738 return visit_cf_list(divergent, &if_stmt->then_list, options, stage) |
739 visit_cf_list(divergent, &if_stmt->else_list, options, stage);
740 }
741
742 static bool
743 visit_loop(bool *divergent, nir_loop *loop, nir_divergence_options options, gl_shader_stage stage)
744 {
745 bool has_changed = false;
746 bool repeat = true;
747
748 /* TODO: restructure this and the phi handling more efficiently */
749 while (repeat) {
750 repeat = visit_cf_list(divergent, &loop->body, options, stage);
751 has_changed |= repeat;
752 }
753
754 return has_changed;
755 }
756
757 static bool
758 visit_cf_list(bool *divergent, struct exec_list *list,
759 nir_divergence_options options, gl_shader_stage stage)
760 {
761 bool has_changed = false;
762
763 foreach_list_typed(nir_cf_node, node, node, list) {
764 switch (node->type) {
765 case nir_cf_node_block:
766 has_changed |= visit_block(divergent, nir_cf_node_as_block(node),
767 options, stage);
768 break;
769 case nir_cf_node_if:
770 has_changed |= visit_if(divergent, nir_cf_node_as_if(node),
771 options, stage);
772 break;
773 case nir_cf_node_loop:
774 has_changed |= visit_loop(divergent, nir_cf_node_as_loop(node),
775 options, stage);
776 break;
777 case nir_cf_node_function:
778 unreachable("NIR divergence analysis: Unsupported cf_node type.");
779 }
780 }
781
782 return has_changed;
783 }
784
785
786 bool*
787 nir_divergence_analysis(nir_shader *shader, nir_divergence_options options)
788 {
789 nir_function_impl *impl = nir_shader_get_entrypoint(shader);
790 bool *t = rzalloc_array(shader, bool, impl->ssa_alloc);
791
792 visit_cf_list(t, &impl->body, options, shader->info.stage);
793
794 return t;
795 }