python: Don't abuse hex()
[mesa.git] / src / compiler / nir / nir_gather_info.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "nir.h"
25 #include "main/menums.h"
26
27 static void
28 set_io_mask(nir_shader *shader, nir_variable *var, int offset, int len,
29 bool is_output_read)
30 {
31 for (int i = 0; i < len; i++) {
32 assert(var->data.location != -1);
33
34 int idx = var->data.location + offset + i;
35 bool is_patch_generic = var->data.patch &&
36 idx != VARYING_SLOT_TESS_LEVEL_INNER &&
37 idx != VARYING_SLOT_TESS_LEVEL_OUTER &&
38 idx != VARYING_SLOT_BOUNDING_BOX0 &&
39 idx != VARYING_SLOT_BOUNDING_BOX1;
40 uint64_t bitfield;
41
42 if (is_patch_generic) {
43 assert(idx >= VARYING_SLOT_PATCH0 && idx < VARYING_SLOT_TESS_MAX);
44 bitfield = BITFIELD64_BIT(idx - VARYING_SLOT_PATCH0);
45 }
46 else {
47 assert(idx < VARYING_SLOT_MAX);
48 bitfield = BITFIELD64_BIT(idx);
49 }
50
51 if (var->data.mode == nir_var_shader_in) {
52 if (is_patch_generic)
53 shader->info.patch_inputs_read |= bitfield;
54 else
55 shader->info.inputs_read |= bitfield;
56
57 /* double inputs read is only for vertex inputs */
58 if (shader->info.stage == MESA_SHADER_VERTEX &&
59 glsl_type_is_dual_slot(glsl_without_array(var->type)))
60 shader->info.vs.double_inputs_read |= bitfield;
61
62 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
63 shader->info.fs.uses_sample_qualifier |= var->data.sample;
64 }
65 } else {
66 assert(var->data.mode == nir_var_shader_out);
67 if (is_output_read) {
68 if (is_patch_generic) {
69 shader->info.patch_outputs_read |= bitfield;
70 } else {
71 shader->info.outputs_read |= bitfield;
72 }
73 } else {
74 if (is_patch_generic) {
75 shader->info.patch_outputs_written |= bitfield;
76 } else if (!var->data.read_only) {
77 shader->info.outputs_written |= bitfield;
78 }
79 }
80
81
82 if (var->data.fb_fetch_output)
83 shader->info.outputs_read |= bitfield;
84 }
85 }
86 }
87
88 /**
89 * Mark an entire variable as used. Caller must ensure that the variable
90 * represents a shader input or output.
91 */
92 static void
93 mark_whole_variable(nir_shader *shader, nir_variable *var, bool is_output_read)
94 {
95 const struct glsl_type *type = var->type;
96 bool is_vertex_input = false;
97
98 if (nir_is_per_vertex_io(var, shader->info.stage)) {
99 assert(glsl_type_is_array(type));
100 type = glsl_get_array_element(type);
101 }
102
103 if (!shader->options->vs_inputs_dual_locations &&
104 shader->info.stage == MESA_SHADER_VERTEX &&
105 var->data.mode == nir_var_shader_in)
106 is_vertex_input = true;
107
108 const unsigned slots =
109 var->data.compact ? DIV_ROUND_UP(glsl_get_length(type), 4)
110 : glsl_count_attribute_slots(type, is_vertex_input);
111
112 set_io_mask(shader, var, 0, slots, is_output_read);
113 }
114
115 static unsigned
116 get_io_offset(nir_deref_instr *deref, bool is_vertex_input)
117 {
118 unsigned offset = 0;
119
120 for (nir_deref_instr *d = deref; d; d = nir_deref_instr_parent(d)) {
121 if (d->deref_type == nir_deref_type_array) {
122 nir_const_value *const_index = nir_src_as_const_value(d->arr.index);
123
124 if (!const_index)
125 return -1;
126
127 offset += glsl_count_attribute_slots(d->type, is_vertex_input) *
128 const_index->u32[0];
129 }
130 /* TODO: we can get the offset for structs here see nir_lower_io() */
131 }
132
133 return offset;
134 }
135
136 /**
137 * Try to mark a portion of the given varying as used. Caller must ensure
138 * that the variable represents a shader input or output.
139 *
140 * If the index can't be interpreted as a constant, or some other problem
141 * occurs, then nothing will be marked and false will be returned.
142 */
143 static bool
144 try_mask_partial_io(nir_shader *shader, nir_variable *var,
145 nir_deref_instr *deref, bool is_output_read)
146 {
147 const struct glsl_type *type = var->type;
148
149 if (nir_is_per_vertex_io(var, shader->info.stage)) {
150 assert(glsl_type_is_array(type));
151 type = glsl_get_array_element(type);
152 }
153
154 /* The code below only handles:
155 *
156 * - Indexing into matrices
157 * - Indexing into arrays of (arrays, matrices, vectors, or scalars)
158 *
159 * For now, we just give up if we see varying structs and arrays of structs
160 * here marking the entire variable as used.
161 */
162 if (!(glsl_type_is_matrix(type) ||
163 (glsl_type_is_array(type) && !var->data.compact &&
164 (glsl_type_is_numeric(glsl_without_array(type)) ||
165 glsl_type_is_boolean(glsl_without_array(type)))))) {
166
167 /* If we don't know how to handle this case, give up and let the
168 * caller mark the whole variable as used.
169 */
170 return false;
171 }
172
173 bool is_vertex_input = false;
174 if (!shader->options->vs_inputs_dual_locations &&
175 shader->info.stage == MESA_SHADER_VERTEX &&
176 var->data.mode == nir_var_shader_in)
177 is_vertex_input = true;
178
179 unsigned offset = get_io_offset(deref, is_vertex_input);
180 if (offset == -1)
181 return false;
182
183 unsigned num_elems;
184 unsigned elem_width = 1;
185 unsigned mat_cols = 1;
186 if (glsl_type_is_array(type)) {
187 num_elems = glsl_get_aoa_size(type);
188 if (glsl_type_is_matrix(glsl_without_array(type)))
189 mat_cols = glsl_get_matrix_columns(glsl_without_array(type));
190 } else {
191 num_elems = glsl_get_matrix_columns(type);
192 }
193
194 /* double element width for double types that takes two slots */
195 if (!is_vertex_input &&
196 glsl_type_is_dual_slot(glsl_without_array(type))) {
197 elem_width *= 2;
198 }
199
200 if (offset >= num_elems * elem_width * mat_cols) {
201 /* Constant index outside the bounds of the matrix/array. This could
202 * arise as a result of constant folding of a legal GLSL program.
203 *
204 * Even though the spec says that indexing outside the bounds of a
205 * matrix/array results in undefined behaviour, we don't want to pass
206 * out-of-range values to set_io_mask() (since this could result in
207 * slots that don't exist being marked as used), so just let the caller
208 * mark the whole variable as used.
209 */
210 return false;
211 }
212
213 set_io_mask(shader, var, offset, elem_width, is_output_read);
214 return true;
215 }
216
217 static void
218 gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
219 void *dead_ctx)
220 {
221 switch (instr->intrinsic) {
222 case nir_intrinsic_discard:
223 case nir_intrinsic_discard_if:
224 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
225 shader->info.fs.uses_discard = true;
226 break;
227
228 case nir_intrinsic_interp_deref_at_centroid:
229 case nir_intrinsic_interp_deref_at_sample:
230 case nir_intrinsic_interp_deref_at_offset:
231 case nir_intrinsic_load_deref:
232 case nir_intrinsic_store_deref:{
233 nir_deref_instr *deref = nir_src_as_deref(instr->src[0]);
234 nir_variable *var = nir_deref_instr_get_variable(deref);
235
236 if (var->data.mode == nir_var_shader_in ||
237 var->data.mode == nir_var_shader_out) {
238 bool is_output_read = false;
239 if (var->data.mode == nir_var_shader_out &&
240 instr->intrinsic == nir_intrinsic_load_deref)
241 is_output_read = true;
242
243 if (!try_mask_partial_io(shader, var, deref, is_output_read))
244 mark_whole_variable(shader, var, is_output_read);
245
246 /* We need to track which input_reads bits correspond to a
247 * dvec3/dvec4 input attribute */
248 if (shader->info.stage == MESA_SHADER_VERTEX &&
249 var->data.mode == nir_var_shader_in &&
250 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
251 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, false); i++) {
252 int idx = var->data.location + i;
253 shader->info.vs.double_inputs |= BITFIELD64_BIT(idx);
254 }
255 }
256 }
257 break;
258 }
259
260 case nir_intrinsic_load_draw_id:
261 case nir_intrinsic_load_frag_coord:
262 case nir_intrinsic_load_front_face:
263 case nir_intrinsic_load_vertex_id:
264 case nir_intrinsic_load_vertex_id_zero_base:
265 case nir_intrinsic_load_base_vertex:
266 case nir_intrinsic_load_first_vertex:
267 case nir_intrinsic_load_is_indexed_draw:
268 case nir_intrinsic_load_base_instance:
269 case nir_intrinsic_load_instance_id:
270 case nir_intrinsic_load_sample_id:
271 case nir_intrinsic_load_sample_pos:
272 case nir_intrinsic_load_sample_mask_in:
273 case nir_intrinsic_load_primitive_id:
274 case nir_intrinsic_load_invocation_id:
275 case nir_intrinsic_load_local_invocation_id:
276 case nir_intrinsic_load_local_invocation_index:
277 case nir_intrinsic_load_work_group_id:
278 case nir_intrinsic_load_num_work_groups:
279 case nir_intrinsic_load_tess_coord:
280 case nir_intrinsic_load_tess_level_outer:
281 case nir_intrinsic_load_tess_level_inner:
282 case nir_intrinsic_load_patch_vertices_in:
283 shader->info.system_values_read |=
284 (1ull << nir_system_value_from_intrinsic(instr->intrinsic));
285 break;
286
287 case nir_intrinsic_end_primitive:
288 case nir_intrinsic_end_primitive_with_counter:
289 assert(shader->info.stage == MESA_SHADER_GEOMETRY);
290 shader->info.gs.uses_end_primitive = 1;
291
292 case nir_intrinsic_emit_vertex:
293 if (nir_intrinsic_stream_id(instr) > 0)
294 shader->info.gs.uses_streams = true;
295
296 break;
297
298 default:
299 break;
300 }
301 }
302
303 static void
304 gather_tex_info(nir_tex_instr *instr, nir_shader *shader)
305 {
306 switch (instr->op) {
307 case nir_texop_tg4:
308 shader->info.uses_texture_gather = true;
309 break;
310 case nir_texop_txf:
311 case nir_texop_txf_ms:
312 case nir_texop_txf_ms_mcs:
313 shader->info.textures_used_by_txf |=
314 ((1 << MAX2(instr->texture_array_size, 1)) - 1) <<
315 instr->texture_index;
316 break;
317 default:
318 break;
319 }
320 }
321
322 static void
323 gather_alu_info(nir_alu_instr *instr, nir_shader *shader)
324 {
325 switch (instr->op) {
326 case nir_op_fddx:
327 case nir_op_fddy:
328 shader->info.uses_fddx_fddy = true;
329 break;
330 default:
331 break;
332 }
333 }
334
335 static void
336 gather_info_block(nir_block *block, nir_shader *shader, void *dead_ctx)
337 {
338 nir_foreach_instr(instr, block) {
339 switch (instr->type) {
340 case nir_instr_type_alu:
341 gather_alu_info(nir_instr_as_alu(instr), shader);
342 break;
343 case nir_instr_type_intrinsic:
344 gather_intrinsic_info(nir_instr_as_intrinsic(instr), shader, dead_ctx);
345 break;
346 case nir_instr_type_tex:
347 gather_tex_info(nir_instr_as_tex(instr), shader);
348 break;
349 case nir_instr_type_call:
350 assert(!"nir_shader_gather_info only works if functions are inlined");
351 break;
352 default:
353 break;
354 }
355 }
356 }
357
358 static unsigned
359 glsl_type_get_sampler_count(const struct glsl_type *type)
360 {
361 if (glsl_type_is_array(type)) {
362 return (glsl_get_aoa_size(type) *
363 glsl_type_get_sampler_count(glsl_without_array(type)));
364 }
365
366 if (glsl_type_is_struct(type)) {
367 unsigned count = 0;
368 for (int i = 0; i < glsl_get_length(type); i++)
369 count += glsl_type_get_sampler_count(glsl_get_struct_field(type, i));
370 return count;
371 }
372
373 if (glsl_type_is_sampler(type))
374 return 1;
375
376 return 0;
377 }
378
379 static unsigned
380 glsl_type_get_image_count(const struct glsl_type *type)
381 {
382 if (glsl_type_is_array(type)) {
383 return (glsl_get_aoa_size(type) *
384 glsl_type_get_image_count(glsl_without_array(type)));
385 }
386
387 if (glsl_type_is_struct(type)) {
388 unsigned count = 0;
389 for (int i = 0; i < glsl_get_length(type); i++)
390 count += glsl_type_get_image_count(glsl_get_struct_field(type, i));
391 return count;
392 }
393
394 if (glsl_type_is_image(type))
395 return 1;
396
397 return 0;
398 }
399
400 void
401 nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint)
402 {
403 shader->info.num_textures = 0;
404 shader->info.num_images = 0;
405 nir_foreach_variable(var, &shader->uniforms) {
406 shader->info.num_textures += glsl_type_get_sampler_count(var->type);
407 shader->info.num_images += glsl_type_get_image_count(var->type);
408 }
409
410 shader->info.inputs_read = 0;
411 shader->info.outputs_written = 0;
412 shader->info.outputs_read = 0;
413 shader->info.patch_outputs_read = 0;
414 shader->info.patch_inputs_read = 0;
415 shader->info.patch_outputs_written = 0;
416 shader->info.system_values_read = 0;
417 if (shader->info.stage == MESA_SHADER_VERTEX) {
418 shader->info.vs.double_inputs = 0;
419 shader->info.vs.double_inputs_read = 0;
420 }
421 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
422 shader->info.fs.uses_sample_qualifier = false;
423 }
424
425 void *dead_ctx = ralloc_context(NULL);
426 nir_foreach_block(block, entrypoint) {
427 gather_info_block(block, shader, dead_ctx);
428 }
429 ralloc_free(dead_ctx);
430 }