src/compiler/nir/nir_instr_set.c

   1 /*
   2  * Copyright © 2014 Connor Abbott
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "nir_instr_set.h"
  25 #include "nir_vla.h"
  26
  27 #define HASH(hash, data) _mesa_fnv32_1a_accumulate((hash), (data))
  28
  29 static uint32_t
  30 hash_src(uint32_t hash, const nir_src *src)
  31 {
  32    assert(src->is_ssa);
  33    hash = HASH(hash, src->ssa);
  34    return hash;
  35 }
  36
  37 static uint32_t
  38 hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
  39 {
  40    hash = HASH(hash, src->abs);
  41    hash = HASH(hash, src->negate);
  42
  43    for (unsigned i = 0; i < num_components; i++)
  44       hash = HASH(hash, src->swizzle[i]);
  45
  46    hash = hash_src(hash, &src->src);
  47    return hash;
  48 }
  49
  50 static uint32_t
  51 hash_alu(uint32_t hash, const nir_alu_instr *instr)
  52 {
  53    hash = HASH(hash, instr->op);
  54    hash = HASH(hash, instr->dest.dest.ssa.num_components);
  55    hash = HASH(hash, instr->dest.dest.ssa.bit_size);
  56    /* We explicitly don't hash instr->dest.dest.exact */
  57
  58    if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_COMMUTATIVE) {
  59       assert(nir_op_infos[instr->op].num_inputs == 2);
  60       uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
  61                                     nir_ssa_alu_instr_src_components(instr, 0));
  62       uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
  63                                     nir_ssa_alu_instr_src_components(instr, 1));
  64       /* For commutative operations, we need some commutative way of
  65        * combining the hashes.  One option would be to XOR them but that
  66        * means that anything with two identical sources will hash to 0 and
  67        * that's common enough we probably don't want the guaranteed
  68        * collision.  Either addition or multiplication will also work.
  69        */
  70       hash = hash0 * hash1;
  71    } else {
  72       for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
  73          hash = hash_alu_src(hash, &instr->src[i],
  74                              nir_ssa_alu_instr_src_components(instr, i));
  75       }
  76    }
  77
  78    return hash;
  79 }
  80
  81 static uint32_t
  82 hash_deref(uint32_t hash, const nir_deref_instr *instr)
  83 {
  84    hash = HASH(hash, instr->deref_type);
  85    hash = HASH(hash, instr->mode);
  86    hash = HASH(hash, instr->type);
  87
  88    if (instr->deref_type == nir_deref_type_var)
  89       return HASH(hash, instr->var);
  90
  91    hash = hash_src(hash, &instr->parent);
  92
  93    switch (instr->deref_type) {
  94    case nir_deref_type_struct:
  95       hash = HASH(hash, instr->strct.index);
  96       break;
  97
  98    case nir_deref_type_array:
  99       hash = hash_src(hash, &instr->arr.index);
 100       break;
 101
 102    case nir_deref_type_var:
 103    case nir_deref_type_array_wildcard:
 104    case nir_deref_type_cast:
 105       /* Nothing to do */
 106       break;
 107
 108    default:
 109       unreachable("Invalid instruction deref type");
 110    }
 111
 112    return hash;
 113 }
 114
 115 static uint32_t
 116 hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
 117 {
 118    hash = HASH(hash, instr->def.num_components);
 119
 120    unsigned size = instr->def.num_components * (instr->def.bit_size / 8);
 121    hash = _mesa_fnv32_1a_accumulate_block(hash, instr->value.f32, size);
 122
 123    return hash;
 124 }
 125
 126 static int
 127 cmp_phi_src(const void *data1, const void *data2)
 128 {
 129    nir_phi_src *src1 = *(nir_phi_src **)data1;
 130    nir_phi_src *src2 = *(nir_phi_src **)data2;
 131    return src1->pred - src2->pred;
 132 }
 133
 134 static uint32_t
 135 hash_phi(uint32_t hash, const nir_phi_instr *instr)
 136 {
 137    hash = HASH(hash, instr->instr.block);
 138
 139    /* sort sources by predecessor, since the order shouldn't matter */
 140    unsigned num_preds = instr->instr.block->predecessors->entries;
 141    NIR_VLA(nir_phi_src *, srcs, num_preds);
 142    unsigned i = 0;
 143    nir_foreach_phi_src(src, instr) {
 144       srcs[i++] = src;
 145    }
 146
 147    qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
 148
 149    for (i = 0; i < num_preds; i++) {
 150       hash = hash_src(hash, &srcs[i]->src);
 151       hash = HASH(hash, srcs[i]->pred);
 152    }
 153
 154    return hash;
 155 }
 156
 157 static uint32_t
 158 hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
 159 {
 160    const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
 161    hash = HASH(hash, instr->intrinsic);
 162
 163    if (info->has_dest) {
 164       hash = HASH(hash, instr->dest.ssa.num_components);
 165       hash = HASH(hash, instr->dest.ssa.bit_size);
 166    }
 167
 168    hash = _mesa_fnv32_1a_accumulate_block(hash, instr->const_index,
 169                                           info->num_indices
 170                                              * sizeof(instr->const_index[0]));
 171    return hash;
 172 }
 173
 174 static uint32_t
 175 hash_tex(uint32_t hash, const nir_tex_instr *instr)
 176 {
 177    hash = HASH(hash, instr->op);
 178    hash = HASH(hash, instr->num_srcs);
 179
 180    for (unsigned i = 0; i < instr->num_srcs; i++) {
 181       hash = HASH(hash, instr->src[i].src_type);
 182       hash = hash_src(hash, &instr->src[i].src);
 183    }
 184
 185    hash = HASH(hash, instr->coord_components);
 186    hash = HASH(hash, instr->sampler_dim);
 187    hash = HASH(hash, instr->is_array);
 188    hash = HASH(hash, instr->is_shadow);
 189    hash = HASH(hash, instr->is_new_style_shadow);
 190    unsigned component = instr->component;
 191    hash = HASH(hash, component);
 192    hash = HASH(hash, instr->texture_index);
 193    hash = HASH(hash, instr->texture_array_size);
 194    hash = HASH(hash, instr->sampler_index);
 195
 196    return hash;
 197 }
 198
 199 /* Computes a hash of an instruction for use in a hash table. Note that this
 200  * will only work for instructions where instr_can_rewrite() returns true, and
 201  * it should return identical hashes for two instructions that are the same
 202  * according nir_instrs_equal().
 203  */
 204
 205 static uint32_t
 206 hash_instr(const void *data)
 207 {
 208    const nir_instr *instr = data;
 209    uint32_t hash = _mesa_fnv32_1a_offset_bias;
 210
 211    switch (instr->type) {
 212    case nir_instr_type_alu:
 213       hash = hash_alu(hash, nir_instr_as_alu(instr));
 214       break;
 215    case nir_instr_type_deref:
 216       hash = hash_deref(hash, nir_instr_as_deref(instr));
 217       break;
 218    case nir_instr_type_load_const:
 219       hash = hash_load_const(hash, nir_instr_as_load_const(instr));
 220       break;
 221    case nir_instr_type_phi:
 222       hash = hash_phi(hash, nir_instr_as_phi(instr));
 223       break;
 224    case nir_instr_type_intrinsic:
 225       hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
 226       break;
 227    case nir_instr_type_tex:
 228       hash = hash_tex(hash, nir_instr_as_tex(instr));
 229       break;
 230    default:
 231       unreachable("Invalid instruction type");
 232    }
 233
 234    return hash;
 235 }
 236
 237 bool
 238 nir_srcs_equal(nir_src src1, nir_src src2)
 239 {
 240    if (src1.is_ssa) {
 241       if (src2.is_ssa) {
 242          return src1.ssa == src2.ssa;
 243       } else {
 244          return false;
 245       }
 246    } else {
 247       if (src2.is_ssa) {
 248          return false;
 249       } else {
 250          if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
 251             return false;
 252
 253          if (src1.reg.indirect) {
 254             if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
 255                return false;
 256          }
 257
 258          return src1.reg.reg == src2.reg.reg &&
 259                 src1.reg.base_offset == src2.reg.base_offset;
 260       }
 261    }
 262 }
 263
 264 bool
 265 nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
 266                    unsigned src1, unsigned src2)
 267 {
 268    if (alu1->src[src1].abs != alu2->src[src2].abs ||
 269        alu1->src[src1].negate != alu2->src[src2].negate)
 270       return false;
 271
 272    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
 273       if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
 274          return false;
 275    }
 276
 277    return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
 278 }
 279
 280 /* Returns "true" if two instructions are equal. Note that this will only
 281  * work for the subset of instructions defined by instr_can_rewrite(). Also,
 282  * it should only return "true" for instructions that hash_instr() will return
 283  * the same hash for (ignoring collisions, of course).
 284  */
 285
 286 static bool
 287 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
 288 {
 289    if (instr1->type != instr2->type)
 290       return false;
 291
 292    switch (instr1->type) {
 293    case nir_instr_type_alu: {
 294       nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
 295       nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
 296
 297       if (alu1->op != alu2->op)
 298          return false;
 299
 300       /* TODO: We can probably acutally do something more inteligent such
 301        * as allowing different numbers and taking a maximum or something
 302        * here */
 303       if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
 304          return false;
 305
 306       if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
 307          return false;
 308
 309       /* We explicitly don't hash instr->dest.dest.exact */
 310
 311       if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_COMMUTATIVE) {
 312          assert(nir_op_infos[alu1->op].num_inputs == 2);
 313          return (nir_alu_srcs_equal(alu1, alu2, 0, 0) &&
 314                  nir_alu_srcs_equal(alu1, alu2, 1, 1)) ||
 315                 (nir_alu_srcs_equal(alu1, alu2, 0, 1) &&
 316                  nir_alu_srcs_equal(alu1, alu2, 1, 0));
 317       } else {
 318          for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
 319             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
 320                return false;
 321          }
 322       }
 323       return true;
 324    }
 325    case nir_instr_type_deref: {
 326       nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
 327       nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
 328
 329       if (deref1->deref_type != deref2->deref_type ||
 330           deref1->mode != deref2->mode ||
 331           deref1->type != deref2->type)
 332          return false;
 333
 334       if (deref1->deref_type == nir_deref_type_var)
 335          return deref1->var == deref2->var;
 336
 337       if (!nir_srcs_equal(deref1->parent, deref2->parent))
 338          return false;
 339
 340       switch (deref1->deref_type) {
 341       case nir_deref_type_struct:
 342          if (deref1->strct.index != deref2->strct.index)
 343             return false;
 344          break;
 345
 346       case nir_deref_type_array:
 347          if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
 348             return false;
 349          break;
 350
 351       case nir_deref_type_var:
 352       case nir_deref_type_array_wildcard:
 353       case nir_deref_type_cast:
 354          /* Nothing to do */
 355          break;
 356
 357       default:
 358          unreachable("Invalid instruction deref type");
 359       }
 360       return true;
 361    }
 362    case nir_instr_type_tex: {
 363       nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
 364       nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
 365
 366       if (tex1->op != tex2->op)
 367          return false;
 368
 369       if (tex1->num_srcs != tex2->num_srcs)
 370          return false;
 371       for (unsigned i = 0; i < tex1->num_srcs; i++) {
 372          if (tex1->src[i].src_type != tex2->src[i].src_type ||
 373              !nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
 374             return false;
 375          }
 376       }
 377
 378       if (tex1->coord_components != tex2->coord_components ||
 379           tex1->sampler_dim != tex2->sampler_dim ||
 380           tex1->is_array != tex2->is_array ||
 381           tex1->is_shadow != tex2->is_shadow ||
 382           tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
 383           tex1->component != tex2->component ||
 384          tex1->texture_index != tex2->texture_index ||
 385          tex1->texture_array_size != tex2->texture_array_size ||
 386          tex1->sampler_index != tex2->sampler_index) {
 387          return false;
 388       }
 389
 390       return true;
 391    }
 392    case nir_instr_type_load_const: {
 393       nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
 394       nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
 395
 396       if (load1->def.num_components != load2->def.num_components)
 397          return false;
 398
 399       if (load1->def.bit_size != load2->def.bit_size)
 400          return false;
 401
 402       return memcmp(load1->value.f32, load2->value.f32,
 403                     load1->def.num_components * (load1->def.bit_size / 8u)) == 0;
 404    }
 405    case nir_instr_type_phi: {
 406       nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
 407       nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
 408
 409       if (phi1->instr.block != phi2->instr.block)
 410          return false;
 411
 412       nir_foreach_phi_src(src1, phi1) {
 413          nir_foreach_phi_src(src2, phi2) {
 414             if (src1->pred == src2->pred) {
 415                if (!nir_srcs_equal(src1->src, src2->src))
 416                   return false;
 417
 418                break;
 419             }
 420          }
 421       }
 422
 423       return true;
 424    }
 425    case nir_instr_type_intrinsic: {
 426       nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
 427       nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
 428       const nir_intrinsic_info *info =
 429          &nir_intrinsic_infos[intrinsic1->intrinsic];
 430
 431       if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
 432           intrinsic1->num_components != intrinsic2->num_components)
 433          return false;
 434
 435       if (info->has_dest && intrinsic1->dest.ssa.num_components !=
 436                             intrinsic2->dest.ssa.num_components)
 437          return false;
 438
 439       if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
 440                             intrinsic2->dest.ssa.bit_size)
 441          return false;
 442
 443       for (unsigned i = 0; i < info->num_srcs; i++) {
 444          if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
 445             return false;
 446       }
 447
 448       for (unsigned i = 0; i < info->num_indices; i++) {
 449          if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
 450             return false;
 451       }
 452
 453       return true;
 454    }
 455    case nir_instr_type_call:
 456    case nir_instr_type_jump:
 457    case nir_instr_type_ssa_undef:
 458    case nir_instr_type_parallel_copy:
 459    default:
 460       unreachable("Invalid instruction type");
 461    }
 462
 463    unreachable("All cases in the above switch should return");
 464 }
 465
 466 static bool
 467 src_is_ssa(nir_src *src, void *data)
 468 {
 469    (void) data;
 470    return src->is_ssa;
 471 }
 472
 473 static bool
 474 dest_is_ssa(nir_dest *dest, void *data)
 475 {
 476    (void) data;
 477    return dest->is_ssa;
 478 }
 479
 480 /* This function determines if uses of an instruction can safely be rewritten
 481  * to use another identical instruction instead. Note that this function must
 482  * be kept in sync with hash_instr() and nir_instrs_equal() -- only
 483  * instructions that pass this test will be handed on to those functions, and
 484  * conversely they must handle everything that this function returns true for.
 485  */
 486
 487 static bool
 488 instr_can_rewrite(nir_instr *instr)
 489 {
 490    /* We only handle SSA. */
 491    if (!nir_foreach_dest(instr, dest_is_ssa, NULL) ||
 492        !nir_foreach_src(instr, src_is_ssa, NULL))
 493       return false;
 494
 495    switch (instr->type) {
 496    case nir_instr_type_alu:
 497    case nir_instr_type_deref:
 498    case nir_instr_type_tex:
 499    case nir_instr_type_load_const:
 500    case nir_instr_type_phi:
 501       return true;
 502    case nir_instr_type_intrinsic: {
 503       const nir_intrinsic_info *info =
 504          &nir_intrinsic_infos[nir_instr_as_intrinsic(instr)->intrinsic];
 505       return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
 506              (info->flags & NIR_INTRINSIC_CAN_REORDER);
 507    }
 508    case nir_instr_type_call:
 509    case nir_instr_type_jump:
 510    case nir_instr_type_ssa_undef:
 511       return false;
 512    case nir_instr_type_parallel_copy:
 513    default:
 514       unreachable("Invalid instruction type");
 515    }
 516
 517    return false;
 518 }
 519
 520 static nir_ssa_def *
 521 nir_instr_get_dest_ssa_def(nir_instr *instr)
 522 {
 523    switch (instr->type) {
 524    case nir_instr_type_alu:
 525       assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
 526       return &nir_instr_as_alu(instr)->dest.dest.ssa;
 527    case nir_instr_type_deref:
 528       assert(nir_instr_as_deref(instr)->dest.is_ssa);
 529       return &nir_instr_as_deref(instr)->dest.ssa;
 530    case nir_instr_type_load_const:
 531       return &nir_instr_as_load_const(instr)->def;
 532    case nir_instr_type_phi:
 533       assert(nir_instr_as_phi(instr)->dest.is_ssa);
 534       return &nir_instr_as_phi(instr)->dest.ssa;
 535    case nir_instr_type_intrinsic:
 536       assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
 537       return &nir_instr_as_intrinsic(instr)->dest.ssa;
 538    case nir_instr_type_tex:
 539       assert(nir_instr_as_tex(instr)->dest.is_ssa);
 540       return &nir_instr_as_tex(instr)->dest.ssa;
 541    default:
 542       unreachable("We never ask for any of these");
 543    }
 544 }
 545
 546 static bool
 547 cmp_func(const void *data1, const void *data2)
 548 {
 549    return nir_instrs_equal(data1, data2);
 550 }
 551
 552 struct set *
 553 nir_instr_set_create(void *mem_ctx)
 554 {
 555    return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
 556 }
 557
 558 void
 559 nir_instr_set_destroy(struct set *instr_set)
 560 {
 561    _mesa_set_destroy(instr_set, NULL);
 562 }
 563
 564 bool
 565 nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr)
 566 {
 567    if (!instr_can_rewrite(instr))
 568       return false;
 569
 570    struct set_entry *entry = _mesa_set_search(instr_set, instr);
 571    if (entry) {
 572       nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
 573       nir_instr *match = (nir_instr *) entry->key;
 574       nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
 575
 576       /* It's safe to replace an exact instruction with an inexact one as
 577        * long as we make it exact.  If we got here, the two instructions are
 578        * exactly identical in every other way so, once we've set the exact
 579        * bit, they are the same.
 580        */
 581       if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
 582          nir_instr_as_alu(match)->exact = true;
 583
 584       nir_ssa_def_rewrite_uses(def, nir_src_for_ssa(new_def));
 585       return true;
 586    }
 587
 588    _mesa_set_add(instr_set, instr);
 589    return false;
 590 }
 591
 592 void
 593 nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
 594 {
 595    if (!instr_can_rewrite(instr))
 596       return;
 597
 598    struct set_entry *entry = _mesa_set_search(instr_set, instr);
 599    if (entry)
 600       _mesa_set_remove(instr_set, entry);
 601 }
 602