src/compiler/nir/nir_instr_set.c

   1 /*
   2  * Copyright © 2014 Connor Abbott
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "nir_instr_set.h"
  25 #include "nir_vla.h"
  26
  27 #define HASH(hash, data) _mesa_fnv32_1a_accumulate((hash), (data))
  28
  29 static uint32_t
  30 hash_src(uint32_t hash, const nir_src *src)
  31 {
  32    assert(src->is_ssa);
  33    hash = HASH(hash, src->ssa);
  34    return hash;
  35 }
  36
  37 static uint32_t
  38 hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
  39 {
  40    hash = HASH(hash, src->abs);
  41    hash = HASH(hash, src->negate);
  42
  43    for (unsigned i = 0; i < num_components; i++)
  44       hash = HASH(hash, src->swizzle[i]);
  45
  46    hash = hash_src(hash, &src->src);
  47    return hash;
  48 }
  49
  50 static uint32_t
  51 hash_alu(uint32_t hash, const nir_alu_instr *instr)
  52 {
  53    hash = HASH(hash, instr->op);
  54    hash = HASH(hash, instr->dest.dest.ssa.num_components);
  55    hash = HASH(hash, instr->dest.dest.ssa.bit_size);
  56    /* We explicitly don't hash instr->dest.dest.exact */
  57
  58    if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_COMMUTATIVE) {
  59       assert(nir_op_infos[instr->op].num_inputs == 2);
  60       uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
  61                                     nir_ssa_alu_instr_src_components(instr, 0));
  62       uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
  63                                     nir_ssa_alu_instr_src_components(instr, 1));
  64       /* For commutative operations, we need some commutative way of
  65        * combining the hashes.  One option would be to XOR them but that
  66        * means that anything with two identical sources will hash to 0 and
  67        * that's common enough we probably don't want the guaranteed
  68        * collision.  Either addition or multiplication will also work.
  69        */
  70       hash = hash0 * hash1;
  71    } else {
  72       for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
  73          hash = hash_alu_src(hash, &instr->src[i],
  74                              nir_ssa_alu_instr_src_components(instr, i));
  75       }
  76    }
  77
  78    return hash;
  79 }
  80
  81 static uint32_t
  82 hash_deref(uint32_t hash, const nir_deref_instr *instr)
  83 {
  84    hash = HASH(hash, instr->deref_type);
  85    hash = HASH(hash, instr->mode);
  86    hash = HASH(hash, instr->type);
  87
  88    if (instr->deref_type == nir_deref_type_var)
  89       return HASH(hash, instr->var);
  90
  91    hash = hash_src(hash, &instr->parent);
  92
  93    switch (instr->deref_type) {
  94    case nir_deref_type_struct:
  95       hash = HASH(hash, instr->strct.index);
  96       break;
  97
  98    case nir_deref_type_array:
  99    case nir_deref_type_ptr_as_array:
 100       hash = hash_src(hash, &instr->arr.index);
 101       break;
 102
 103    case nir_deref_type_cast:
 104       hash = HASH(hash, instr->cast.ptr_stride);
 105       break;
 106
 107    case nir_deref_type_var:
 108    case nir_deref_type_array_wildcard:
 109       /* Nothing to do */
 110       break;
 111
 112    default:
 113       unreachable("Invalid instruction deref type");
 114    }
 115
 116    return hash;
 117 }
 118
 119 static uint32_t
 120 hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
 121 {
 122    hash = HASH(hash, instr->def.num_components);
 123
 124    if (instr->def.bit_size == 1) {
 125       for (unsigned i = 0; i < instr->def.num_components; i++) {
 126          uint8_t b = instr->value.b[i];
 127          hash = HASH(hash, b);
 128       }
 129    } else {
 130       unsigned size = instr->def.num_components * (instr->def.bit_size / 8);
 131       hash = _mesa_fnv32_1a_accumulate_block(hash, instr->value.f32, size);
 132    }
 133
 134    return hash;
 135 }
 136
 137 static int
 138 cmp_phi_src(const void *data1, const void *data2)
 139 {
 140    nir_phi_src *src1 = *(nir_phi_src **)data1;
 141    nir_phi_src *src2 = *(nir_phi_src **)data2;
 142    return src1->pred - src2->pred;
 143 }
 144
 145 static uint32_t
 146 hash_phi(uint32_t hash, const nir_phi_instr *instr)
 147 {
 148    hash = HASH(hash, instr->instr.block);
 149
 150    /* sort sources by predecessor, since the order shouldn't matter */
 151    unsigned num_preds = instr->instr.block->predecessors->entries;
 152    NIR_VLA(nir_phi_src *, srcs, num_preds);
 153    unsigned i = 0;
 154    nir_foreach_phi_src(src, instr) {
 155       srcs[i++] = src;
 156    }
 157
 158    qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
 159
 160    for (i = 0; i < num_preds; i++) {
 161       hash = hash_src(hash, &srcs[i]->src);
 162       hash = HASH(hash, srcs[i]->pred);
 163    }
 164
 165    return hash;
 166 }
 167
 168 static uint32_t
 169 hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
 170 {
 171    const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
 172    hash = HASH(hash, instr->intrinsic);
 173
 174    if (info->has_dest) {
 175       hash = HASH(hash, instr->dest.ssa.num_components);
 176       hash = HASH(hash, instr->dest.ssa.bit_size);
 177    }
 178
 179    hash = _mesa_fnv32_1a_accumulate_block(hash, instr->const_index,
 180                                           info->num_indices
 181                                              * sizeof(instr->const_index[0]));
 182    return hash;
 183 }
 184
 185 static uint32_t
 186 hash_tex(uint32_t hash, const nir_tex_instr *instr)
 187 {
 188    hash = HASH(hash, instr->op);
 189    hash = HASH(hash, instr->num_srcs);
 190
 191    for (unsigned i = 0; i < instr->num_srcs; i++) {
 192       hash = HASH(hash, instr->src[i].src_type);
 193       hash = hash_src(hash, &instr->src[i].src);
 194    }
 195
 196    hash = HASH(hash, instr->coord_components);
 197    hash = HASH(hash, instr->sampler_dim);
 198    hash = HASH(hash, instr->is_array);
 199    hash = HASH(hash, instr->is_shadow);
 200    hash = HASH(hash, instr->is_new_style_shadow);
 201    unsigned component = instr->component;
 202    hash = HASH(hash, component);
 203    for (unsigned i = 0; i < 4; ++i)
 204       for (unsigned j = 0; j < 2; ++j)
 205          hash = HASH(hash, instr->tg4_offsets[i][j]);
 206    hash = HASH(hash, instr->texture_index);
 207    hash = HASH(hash, instr->texture_array_size);
 208    hash = HASH(hash, instr->sampler_index);
 209
 210    return hash;
 211 }
 212
 213 /* Computes a hash of an instruction for use in a hash table. Note that this
 214  * will only work for instructions where instr_can_rewrite() returns true, and
 215  * it should return identical hashes for two instructions that are the same
 216  * according nir_instrs_equal().
 217  */
 218
 219 static uint32_t
 220 hash_instr(const void *data)
 221 {
 222    const nir_instr *instr = data;
 223    uint32_t hash = _mesa_fnv32_1a_offset_bias;
 224
 225    switch (instr->type) {
 226    case nir_instr_type_alu:
 227       hash = hash_alu(hash, nir_instr_as_alu(instr));
 228       break;
 229    case nir_instr_type_deref:
 230       hash = hash_deref(hash, nir_instr_as_deref(instr));
 231       break;
 232    case nir_instr_type_load_const:
 233       hash = hash_load_const(hash, nir_instr_as_load_const(instr));
 234       break;
 235    case nir_instr_type_phi:
 236       hash = hash_phi(hash, nir_instr_as_phi(instr));
 237       break;
 238    case nir_instr_type_intrinsic:
 239       hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
 240       break;
 241    case nir_instr_type_tex:
 242       hash = hash_tex(hash, nir_instr_as_tex(instr));
 243       break;
 244    default:
 245       unreachable("Invalid instruction type");
 246    }
 247
 248    return hash;
 249 }
 250
 251 bool
 252 nir_srcs_equal(nir_src src1, nir_src src2)
 253 {
 254    if (src1.is_ssa) {
 255       if (src2.is_ssa) {
 256          return src1.ssa == src2.ssa;
 257       } else {
 258          return false;
 259       }
 260    } else {
 261       if (src2.is_ssa) {
 262          return false;
 263       } else {
 264          if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
 265             return false;
 266
 267          if (src1.reg.indirect) {
 268             if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
 269                return false;
 270          }
 271
 272          return src1.reg.reg == src2.reg.reg &&
 273                 src1.reg.base_offset == src2.reg.base_offset;
 274       }
 275    }
 276 }
 277
 278 bool
 279 nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
 280                    unsigned src1, unsigned src2)
 281 {
 282    if (alu1->src[src1].abs != alu2->src[src2].abs ||
 283        alu1->src[src1].negate != alu2->src[src2].negate)
 284       return false;
 285
 286    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
 287       if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
 288          return false;
 289    }
 290
 291    return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
 292 }
 293
 294 /* Returns "true" if two instructions are equal. Note that this will only
 295  * work for the subset of instructions defined by instr_can_rewrite(). Also,
 296  * it should only return "true" for instructions that hash_instr() will return
 297  * the same hash for (ignoring collisions, of course).
 298  */
 299
 300 static bool
 301 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
 302 {
 303    if (instr1->type != instr2->type)
 304       return false;
 305
 306    switch (instr1->type) {
 307    case nir_instr_type_alu: {
 308       nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
 309       nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
 310
 311       if (alu1->op != alu2->op)
 312          return false;
 313
 314       /* TODO: We can probably acutally do something more inteligent such
 315        * as allowing different numbers and taking a maximum or something
 316        * here */
 317       if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
 318          return false;
 319
 320       if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
 321          return false;
 322
 323       /* We explicitly don't hash instr->dest.dest.exact */
 324
 325       if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_COMMUTATIVE) {
 326          assert(nir_op_infos[alu1->op].num_inputs == 2);
 327          return (nir_alu_srcs_equal(alu1, alu2, 0, 0) &&
 328                  nir_alu_srcs_equal(alu1, alu2, 1, 1)) ||
 329                 (nir_alu_srcs_equal(alu1, alu2, 0, 1) &&
 330                  nir_alu_srcs_equal(alu1, alu2, 1, 0));
 331       } else {
 332          for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
 333             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
 334                return false;
 335          }
 336       }
 337       return true;
 338    }
 339    case nir_instr_type_deref: {
 340       nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
 341       nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
 342
 343       if (deref1->deref_type != deref2->deref_type ||
 344           deref1->mode != deref2->mode ||
 345           deref1->type != deref2->type)
 346          return false;
 347
 348       if (deref1->deref_type == nir_deref_type_var)
 349          return deref1->var == deref2->var;
 350
 351       if (!nir_srcs_equal(deref1->parent, deref2->parent))
 352          return false;
 353
 354       switch (deref1->deref_type) {
 355       case nir_deref_type_struct:
 356          if (deref1->strct.index != deref2->strct.index)
 357             return false;
 358          break;
 359
 360       case nir_deref_type_array:
 361       case nir_deref_type_ptr_as_array:
 362          if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
 363             return false;
 364          break;
 365
 366       case nir_deref_type_cast:
 367          if (deref1->cast.ptr_stride != deref2->cast.ptr_stride)
 368             return false;
 369          break;
 370
 371       case nir_deref_type_var:
 372       case nir_deref_type_array_wildcard:
 373          /* Nothing to do */
 374          break;
 375
 376       default:
 377          unreachable("Invalid instruction deref type");
 378       }
 379       return true;
 380    }
 381    case nir_instr_type_tex: {
 382       nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
 383       nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
 384
 385       if (tex1->op != tex2->op)
 386          return false;
 387
 388       if (tex1->num_srcs != tex2->num_srcs)
 389          return false;
 390       for (unsigned i = 0; i < tex1->num_srcs; i++) {
 391          if (tex1->src[i].src_type != tex2->src[i].src_type ||
 392              !nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
 393             return false;
 394          }
 395       }
 396
 397       if (tex1->coord_components != tex2->coord_components ||
 398           tex1->sampler_dim != tex2->sampler_dim ||
 399           tex1->is_array != tex2->is_array ||
 400           tex1->is_shadow != tex2->is_shadow ||
 401           tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
 402           tex1->component != tex2->component ||
 403          tex1->texture_index != tex2->texture_index ||
 404          tex1->texture_array_size != tex2->texture_array_size ||
 405          tex1->sampler_index != tex2->sampler_index) {
 406          return false;
 407       }
 408
 409       if (memcmp(tex1->tg4_offsets, tex2->tg4_offsets,
 410                  sizeof(tex1->tg4_offsets)))
 411          return false;
 412
 413       return true;
 414    }
 415    case nir_instr_type_load_const: {
 416       nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
 417       nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
 418
 419       if (load1->def.num_components != load2->def.num_components)
 420          return false;
 421
 422       if (load1->def.bit_size != load2->def.bit_size)
 423          return false;
 424
 425       if (load1->def.bit_size == 1) {
 426          unsigned size = load1->def.num_components * sizeof(bool);
 427          return memcmp(load1->value.b, load2->value.b, size) == 0;
 428       } else {
 429          unsigned size = load1->def.num_components * (load1->def.bit_size / 8);
 430          return memcmp(load1->value.f32, load2->value.f32, size) == 0;
 431       }
 432    }
 433    case nir_instr_type_phi: {
 434       nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
 435       nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
 436
 437       if (phi1->instr.block != phi2->instr.block)
 438          return false;
 439
 440       nir_foreach_phi_src(src1, phi1) {
 441          nir_foreach_phi_src(src2, phi2) {
 442             if (src1->pred == src2->pred) {
 443                if (!nir_srcs_equal(src1->src, src2->src))
 444                   return false;
 445
 446                break;
 447             }
 448          }
 449       }
 450
 451       return true;
 452    }
 453    case nir_instr_type_intrinsic: {
 454       nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
 455       nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
 456       const nir_intrinsic_info *info =
 457          &nir_intrinsic_infos[intrinsic1->intrinsic];
 458
 459       if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
 460           intrinsic1->num_components != intrinsic2->num_components)
 461          return false;
 462
 463       if (info->has_dest && intrinsic1->dest.ssa.num_components !=
 464                             intrinsic2->dest.ssa.num_components)
 465          return false;
 466
 467       if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
 468                             intrinsic2->dest.ssa.bit_size)
 469          return false;
 470
 471       for (unsigned i = 0; i < info->num_srcs; i++) {
 472          if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
 473             return false;
 474       }
 475
 476       for (unsigned i = 0; i < info->num_indices; i++) {
 477          if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
 478             return false;
 479       }
 480
 481       return true;
 482    }
 483    case nir_instr_type_call:
 484    case nir_instr_type_jump:
 485    case nir_instr_type_ssa_undef:
 486    case nir_instr_type_parallel_copy:
 487    default:
 488       unreachable("Invalid instruction type");
 489    }
 490
 491    unreachable("All cases in the above switch should return");
 492 }
 493
 494 static bool
 495 src_is_ssa(nir_src *src, void *data)
 496 {
 497    (void) data;
 498    return src->is_ssa;
 499 }
 500
 501 static bool
 502 dest_is_ssa(nir_dest *dest, void *data)
 503 {
 504    (void) data;
 505    return dest->is_ssa;
 506 }
 507
 508 static inline bool
 509 instr_each_src_and_dest_is_ssa(nir_instr *instr)
 510 {
 511    if (!nir_foreach_dest(instr, dest_is_ssa, NULL) ||
 512        !nir_foreach_src(instr, src_is_ssa, NULL))
 513       return false;
 514
 515    return true;
 516 }
 517
 518 /* This function determines if uses of an instruction can safely be rewritten
 519  * to use another identical instruction instead. Note that this function must
 520  * be kept in sync with hash_instr() and nir_instrs_equal() -- only
 521  * instructions that pass this test will be handed on to those functions, and
 522  * conversely they must handle everything that this function returns true for.
 523  */
 524
 525 static bool
 526 instr_can_rewrite(nir_instr *instr)
 527 {
 528    /* We only handle SSA. */
 529    assert(instr_each_src_and_dest_is_ssa(instr));
 530
 531    switch (instr->type) {
 532    case nir_instr_type_alu:
 533    case nir_instr_type_deref:
 534    case nir_instr_type_tex:
 535    case nir_instr_type_load_const:
 536    case nir_instr_type_phi:
 537       return true;
 538    case nir_instr_type_intrinsic: {
 539       const nir_intrinsic_info *info =
 540          &nir_intrinsic_infos[nir_instr_as_intrinsic(instr)->intrinsic];
 541       return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
 542              (info->flags & NIR_INTRINSIC_CAN_REORDER);
 543    }
 544    case nir_instr_type_call:
 545    case nir_instr_type_jump:
 546    case nir_instr_type_ssa_undef:
 547       return false;
 548    case nir_instr_type_parallel_copy:
 549    default:
 550       unreachable("Invalid instruction type");
 551    }
 552
 553    return false;
 554 }
 555
 556 static nir_ssa_def *
 557 nir_instr_get_dest_ssa_def(nir_instr *instr)
 558 {
 559    switch (instr->type) {
 560    case nir_instr_type_alu:
 561       assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
 562       return &nir_instr_as_alu(instr)->dest.dest.ssa;
 563    case nir_instr_type_deref:
 564       assert(nir_instr_as_deref(instr)->dest.is_ssa);
 565       return &nir_instr_as_deref(instr)->dest.ssa;
 566    case nir_instr_type_load_const:
 567       return &nir_instr_as_load_const(instr)->def;
 568    case nir_instr_type_phi:
 569       assert(nir_instr_as_phi(instr)->dest.is_ssa);
 570       return &nir_instr_as_phi(instr)->dest.ssa;
 571    case nir_instr_type_intrinsic:
 572       assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
 573       return &nir_instr_as_intrinsic(instr)->dest.ssa;
 574    case nir_instr_type_tex:
 575       assert(nir_instr_as_tex(instr)->dest.is_ssa);
 576       return &nir_instr_as_tex(instr)->dest.ssa;
 577    default:
 578       unreachable("We never ask for any of these");
 579    }
 580 }
 581
 582 static bool
 583 cmp_func(const void *data1, const void *data2)
 584 {
 585    return nir_instrs_equal(data1, data2);
 586 }
 587
 588 struct set *
 589 nir_instr_set_create(void *mem_ctx)
 590 {
 591    return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
 592 }
 593
 594 void
 595 nir_instr_set_destroy(struct set *instr_set)
 596 {
 597    _mesa_set_destroy(instr_set, NULL);
 598 }
 599
 600 bool
 601 nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr)
 602 {
 603    if (!instr_can_rewrite(instr))
 604       return false;
 605
 606    uint32_t hash = hash_instr(instr);
 607    struct set_entry *e = _mesa_set_search_pre_hashed(instr_set, hash, instr);
 608    if (e) {
 609       nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
 610       nir_instr *match = (nir_instr *) e->key;
 611       nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
 612
 613       /* It's safe to replace an exact instruction with an inexact one as
 614        * long as we make it exact.  If we got here, the two instructions are
 615        * exactly identical in every other way so, once we've set the exact
 616        * bit, they are the same.
 617        */
 618       if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
 619          nir_instr_as_alu(match)->exact = true;
 620
 621       nir_ssa_def_rewrite_uses(def, nir_src_for_ssa(new_def));
 622       return true;
 623    }
 624
 625    _mesa_set_add_pre_hashed(instr_set, hash, instr);
 626    return false;
 627 }
 628
 629 void
 630 nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
 631 {
 632    if (!instr_can_rewrite(instr))
 633       return;
 634
 635    struct set_entry *entry = _mesa_set_search(instr_set, instr);
 636    if (entry)
 637       _mesa_set_remove(instr_set, entry);
 638 }
 639