src/compiler/nir/nir_instr_set.c

   1 /*
   2  * Copyright © 2014 Connor Abbott
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "nir_instr_set.h"
  25 #include "nir_vla.h"
  26 #include "util/half_float.h"
  27
  28 #define HASH(hash, data) _mesa_fnv32_1a_accumulate((hash), (data))
  29
  30 static uint32_t
  31 hash_src(uint32_t hash, const nir_src *src)
  32 {
  33    assert(src->is_ssa);
  34    hash = HASH(hash, src->ssa);
  35    return hash;
  36 }
  37
  38 static uint32_t
  39 hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
  40 {
  41    hash = HASH(hash, src->abs);
  42    hash = HASH(hash, src->negate);
  43
  44    for (unsigned i = 0; i < num_components; i++)
  45       hash = HASH(hash, src->swizzle[i]);
  46
  47    hash = hash_src(hash, &src->src);
  48    return hash;
  49 }
  50
  51 static uint32_t
  52 hash_alu(uint32_t hash, const nir_alu_instr *instr)
  53 {
  54    hash = HASH(hash, instr->op);
  55
  56    /* We explicitly don't hash instr->exact. */
  57    uint8_t flags = instr->no_signed_wrap |
  58                    instr->no_unsigned_wrap << 1;
  59    hash = HASH(hash, flags);
  60
  61    hash = HASH(hash, instr->dest.dest.ssa.num_components);
  62    hash = HASH(hash, instr->dest.dest.ssa.bit_size);
  63
  64    if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
  65       assert(nir_op_infos[instr->op].num_inputs >= 2);
  66
  67       uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
  68                                     nir_ssa_alu_instr_src_components(instr, 0));
  69       uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
  70                                     nir_ssa_alu_instr_src_components(instr, 1));
  71       /* For commutative operations, we need some commutative way of
  72        * combining the hashes.  One option would be to XOR them but that
  73        * means that anything with two identical sources will hash to 0 and
  74        * that's common enough we probably don't want the guaranteed
  75        * collision.  Either addition or multiplication will also work.
  76        */
  77       hash = hash0 * hash1;
  78
  79       for (unsigned i = 2; i < nir_op_infos[instr->op].num_inputs; i++) {
  80          hash = hash_alu_src(hash, &instr->src[i],
  81                              nir_ssa_alu_instr_src_components(instr, i));
  82       }
  83    } else {
  84       for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
  85          hash = hash_alu_src(hash, &instr->src[i],
  86                              nir_ssa_alu_instr_src_components(instr, i));
  87       }
  88    }
  89
  90    return hash;
  91 }
  92
  93 static uint32_t
  94 hash_deref(uint32_t hash, const nir_deref_instr *instr)
  95 {
  96    hash = HASH(hash, instr->deref_type);
  97    hash = HASH(hash, instr->mode);
  98    hash = HASH(hash, instr->type);
  99
 100    if (instr->deref_type == nir_deref_type_var)
 101       return HASH(hash, instr->var);
 102
 103    hash = hash_src(hash, &instr->parent);
 104
 105    switch (instr->deref_type) {
 106    case nir_deref_type_struct:
 107       hash = HASH(hash, instr->strct.index);
 108       break;
 109
 110    case nir_deref_type_array:
 111    case nir_deref_type_ptr_as_array:
 112       hash = hash_src(hash, &instr->arr.index);
 113       break;
 114
 115    case nir_deref_type_cast:
 116       hash = HASH(hash, instr->cast.ptr_stride);
 117       break;
 118
 119    case nir_deref_type_var:
 120    case nir_deref_type_array_wildcard:
 121       /* Nothing to do */
 122       break;
 123
 124    default:
 125       unreachable("Invalid instruction deref type");
 126    }
 127
 128    return hash;
 129 }
 130
 131 static uint32_t
 132 hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
 133 {
 134    hash = HASH(hash, instr->def.num_components);
 135
 136    if (instr->def.bit_size == 1) {
 137       for (unsigned i = 0; i < instr->def.num_components; i++) {
 138          uint8_t b = instr->value[i].b;
 139          hash = HASH(hash, b);
 140       }
 141    } else {
 142       unsigned size = instr->def.num_components * sizeof(*instr->value);
 143       hash = _mesa_fnv32_1a_accumulate_block(hash, instr->value, size);
 144    }
 145
 146    return hash;
 147 }
 148
 149 static int
 150 cmp_phi_src(const void *data1, const void *data2)
 151 {
 152    nir_phi_src *src1 = *(nir_phi_src **)data1;
 153    nir_phi_src *src2 = *(nir_phi_src **)data2;
 154    return src1->pred - src2->pred;
 155 }
 156
 157 static uint32_t
 158 hash_phi(uint32_t hash, const nir_phi_instr *instr)
 159 {
 160    hash = HASH(hash, instr->instr.block);
 161
 162    /* sort sources by predecessor, since the order shouldn't matter */
 163    unsigned num_preds = instr->instr.block->predecessors->entries;
 164    NIR_VLA(nir_phi_src *, srcs, num_preds);
 165    unsigned i = 0;
 166    nir_foreach_phi_src(src, instr) {
 167       srcs[i++] = src;
 168    }
 169
 170    qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
 171
 172    for (i = 0; i < num_preds; i++) {
 173       hash = hash_src(hash, &srcs[i]->src);
 174       hash = HASH(hash, srcs[i]->pred);
 175    }
 176
 177    return hash;
 178 }
 179
 180 static uint32_t
 181 hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
 182 {
 183    const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
 184    hash = HASH(hash, instr->intrinsic);
 185
 186    if (info->has_dest) {
 187       hash = HASH(hash, instr->dest.ssa.num_components);
 188       hash = HASH(hash, instr->dest.ssa.bit_size);
 189    }
 190
 191    hash = _mesa_fnv32_1a_accumulate_block(hash, instr->const_index,
 192                                           info->num_indices
 193                                              * sizeof(instr->const_index[0]));
 194    return hash;
 195 }
 196
 197 static uint32_t
 198 hash_tex(uint32_t hash, const nir_tex_instr *instr)
 199 {
 200    hash = HASH(hash, instr->op);
 201    hash = HASH(hash, instr->num_srcs);
 202
 203    for (unsigned i = 0; i < instr->num_srcs; i++) {
 204       hash = HASH(hash, instr->src[i].src_type);
 205       hash = hash_src(hash, &instr->src[i].src);
 206    }
 207
 208    hash = HASH(hash, instr->coord_components);
 209    hash = HASH(hash, instr->sampler_dim);
 210    hash = HASH(hash, instr->is_array);
 211    hash = HASH(hash, instr->is_shadow);
 212    hash = HASH(hash, instr->is_new_style_shadow);
 213    unsigned component = instr->component;
 214    hash = HASH(hash, component);
 215    for (unsigned i = 0; i < 4; ++i)
 216       for (unsigned j = 0; j < 2; ++j)
 217          hash = HASH(hash, instr->tg4_offsets[i][j]);
 218    hash = HASH(hash, instr->texture_index);
 219    hash = HASH(hash, instr->texture_array_size);
 220    hash = HASH(hash, instr->sampler_index);
 221
 222    return hash;
 223 }
 224
 225 /* Computes a hash of an instruction for use in a hash table. Note that this
 226  * will only work for instructions where instr_can_rewrite() returns true, and
 227  * it should return identical hashes for two instructions that are the same
 228  * according nir_instrs_equal().
 229  */
 230
 231 static uint32_t
 232 hash_instr(const void *data)
 233 {
 234    const nir_instr *instr = data;
 235    uint32_t hash = _mesa_fnv32_1a_offset_bias;
 236
 237    switch (instr->type) {
 238    case nir_instr_type_alu:
 239       hash = hash_alu(hash, nir_instr_as_alu(instr));
 240       break;
 241    case nir_instr_type_deref:
 242       hash = hash_deref(hash, nir_instr_as_deref(instr));
 243       break;
 244    case nir_instr_type_load_const:
 245       hash = hash_load_const(hash, nir_instr_as_load_const(instr));
 246       break;
 247    case nir_instr_type_phi:
 248       hash = hash_phi(hash, nir_instr_as_phi(instr));
 249       break;
 250    case nir_instr_type_intrinsic:
 251       hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
 252       break;
 253    case nir_instr_type_tex:
 254       hash = hash_tex(hash, nir_instr_as_tex(instr));
 255       break;
 256    default:
 257       unreachable("Invalid instruction type");
 258    }
 259
 260    return hash;
 261 }
 262
 263 bool
 264 nir_srcs_equal(nir_src src1, nir_src src2)
 265 {
 266    if (src1.is_ssa) {
 267       if (src2.is_ssa) {
 268          return src1.ssa == src2.ssa;
 269       } else {
 270          return false;
 271       }
 272    } else {
 273       if (src2.is_ssa) {
 274          return false;
 275       } else {
 276          if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
 277             return false;
 278
 279          if (src1.reg.indirect) {
 280             if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
 281                return false;
 282          }
 283
 284          return src1.reg.reg == src2.reg.reg &&
 285                 src1.reg.base_offset == src2.reg.base_offset;
 286       }
 287    }
 288 }
 289
 290 /**
 291  * If the \p s is an SSA value that was generated by a negation instruction,
 292  * that instruction is returned as a \c nir_alu_instr.  Otherwise \c NULL is
 293  * returned.
 294  */
 295 static nir_alu_instr *
 296 get_neg_instr(nir_src s)
 297 {
 298    nir_alu_instr *alu = nir_src_as_alu_instr(s);
 299
 300    return alu != NULL && (alu->op == nir_op_fneg || alu->op == nir_op_ineg)
 301           ? alu : NULL;
 302 }
 303
 304 bool
 305 nir_const_value_negative_equal(nir_const_value c1,
 306                                nir_const_value c2,
 307                                nir_alu_type full_type)
 308 {
 309    assert(nir_alu_type_get_base_type(full_type) != nir_type_invalid);
 310    assert(nir_alu_type_get_type_size(full_type) != 0);
 311
 312    switch (full_type) {
 313    case nir_type_float16:
 314       return _mesa_half_to_float(c1.u16) == -_mesa_half_to_float(c2.u16);
 315
 316    case nir_type_float32:
 317       return c1.f32 == -c2.f32;
 318
 319    case nir_type_float64:
 320       return c1.f64 == -c2.f64;
 321
 322    case nir_type_int8:
 323    case nir_type_uint8:
 324       return c1.i8 == -c2.i8;
 325
 326    case nir_type_int16:
 327    case nir_type_uint16:
 328       return c1.i16 == -c2.i16;
 329
 330    case nir_type_int32:
 331    case nir_type_uint32:
 332       return c1.i32 == -c2.i32;
 333
 334    case nir_type_int64:
 335    case nir_type_uint64:
 336       return c1.i64 == -c2.i64;
 337
 338    default:
 339       break;
 340    }
 341
 342    return false;
 343 }
 344
 345 /**
 346  * Shallow compare of ALU srcs to determine if one is the negation of the other
 347  *
 348  * This function detects cases where \p alu1 is a constant and \p alu2 is a
 349  * constant that is its negation.  It will also detect cases where \p alu2 is
 350  * an SSA value that is a \c nir_op_fneg applied to \p alu1 (and vice versa).
 351  *
 352  * This function does not detect the general case when \p alu1 and \p alu2 are
 353  * SSA values that are the negations of each other (e.g., \p alu1 represents
 354  * (a * b) and \p alu2 represents (-a * b)).
 355  *
 356  * \warning
 357  * It is the responsibility of the caller to ensure that the component counts,
 358  * write masks, and base types of the sources being compared are compatible.
 359  */
 360 bool
 361 nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
 362                             const nir_alu_instr *alu2,
 363                             unsigned src1, unsigned src2)
 364 {
 365 #ifndef NDEBUG
 366    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 367       assert(nir_alu_instr_channel_used(alu1, src1, i) ==
 368              nir_alu_instr_channel_used(alu2, src2, i));
 369    }
 370
 371    if (nir_op_infos[alu1->op].input_types[src1] == nir_type_float) {
 372       assert(nir_op_infos[alu1->op].input_types[src1] ==
 373              nir_op_infos[alu2->op].input_types[src2]);
 374    } else {
 375       assert(nir_op_infos[alu1->op].input_types[src1] == nir_type_int);
 376       assert(nir_op_infos[alu2->op].input_types[src2] == nir_type_int);
 377    }
 378 #endif
 379
 380    if (alu1->src[src1].abs != alu2->src[src2].abs)
 381       return false;
 382
 383    bool parity = alu1->src[src1].negate != alu2->src[src2].negate;
 384
 385    /* Handling load_const instructions is tricky. */
 386
 387    const nir_const_value *const const1 =
 388       nir_src_as_const_value(alu1->src[src1].src);
 389
 390    if (const1 != NULL) {
 391       /* Assume that constant folding will eliminate source mods and unary
 392        * ops.
 393        */
 394       if (parity)
 395          return false;
 396
 397       const nir_const_value *const const2 =
 398          nir_src_as_const_value(alu2->src[src2].src);
 399
 400       if (const2 == NULL)
 401          return false;
 402
 403       if (nir_src_bit_size(alu1->src[src1].src) !=
 404           nir_src_bit_size(alu2->src[src2].src))
 405          return false;
 406
 407       const nir_alu_type full_type = nir_op_infos[alu1->op].input_types[src1] |
 408                                      nir_src_bit_size(alu1->src[src1].src);
 409       for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 410          if (nir_alu_instr_channel_used(alu1, src1, i) &&
 411              !nir_const_value_negative_equal(const1[alu1->src[src1].swizzle[i]],
 412                                              const2[alu2->src[src2].swizzle[i]],
 413                                              full_type))
 414             return false;
 415       }
 416
 417       return true;
 418    }
 419
 420    uint8_t alu1_swizzle[4] = {0};
 421    nir_src alu1_actual_src;
 422    nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
 423
 424    if (neg1) {
 425       parity = !parity;
 426       alu1_actual_src = neg1->src[0].src;
 427
 428       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg1, 0); i++)
 429          alu1_swizzle[i] = neg1->src[0].swizzle[i];
 430    } else {
 431       alu1_actual_src = alu1->src[src1].src;
 432
 433       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++)
 434          alu1_swizzle[i] = i;
 435    }
 436
 437    uint8_t alu2_swizzle[4] = {0};
 438    nir_src alu2_actual_src;
 439    nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
 440
 441    if (neg2) {
 442       parity = !parity;
 443       alu2_actual_src = neg2->src[0].src;
 444
 445       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg2, 0); i++)
 446          alu2_swizzle[i] = neg2->src[0].swizzle[i];
 447    } else {
 448       alu2_actual_src = alu2->src[src2].src;
 449
 450       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu2, src2); i++)
 451          alu2_swizzle[i] = i;
 452    }
 453
 454    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
 455       if (alu1_swizzle[alu1->src[src1].swizzle[i]] !=
 456           alu2_swizzle[alu2->src[src2].swizzle[i]])
 457          return false;
 458    }
 459
 460    return parity && nir_srcs_equal(alu1_actual_src, alu2_actual_src);
 461 }
 462
 463 bool
 464 nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
 465                    unsigned src1, unsigned src2)
 466 {
 467    if (alu1->src[src1].abs != alu2->src[src2].abs ||
 468        alu1->src[src1].negate != alu2->src[src2].negate)
 469       return false;
 470
 471    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
 472       if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
 473          return false;
 474    }
 475
 476    return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
 477 }
 478
 479 /* Returns "true" if two instructions are equal. Note that this will only
 480  * work for the subset of instructions defined by instr_can_rewrite(). Also,
 481  * it should only return "true" for instructions that hash_instr() will return
 482  * the same hash for (ignoring collisions, of course).
 483  */
 484
 485 static bool
 486 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
 487 {
 488    if (instr1->type != instr2->type)
 489       return false;
 490
 491    switch (instr1->type) {
 492    case nir_instr_type_alu: {
 493       nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
 494       nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
 495
 496       if (alu1->op != alu2->op)
 497          return false;
 498
 499       /* We explicitly don't compare instr->exact. */
 500
 501       if (alu1->no_signed_wrap != alu2->no_signed_wrap)
 502          return false;
 503
 504       if (alu1->no_unsigned_wrap != alu2->no_unsigned_wrap)
 505          return false;
 506
 507       /* TODO: We can probably acutally do something more inteligent such
 508        * as allowing different numbers and taking a maximum or something
 509        * here */
 510       if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
 511          return false;
 512
 513       if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
 514          return false;
 515
 516       if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
 517          if ((!nir_alu_srcs_equal(alu1, alu2, 0, 0) ||
 518               !nir_alu_srcs_equal(alu1, alu2, 1, 1)) &&
 519              (!nir_alu_srcs_equal(alu1, alu2, 0, 1) ||
 520               !nir_alu_srcs_equal(alu1, alu2, 1, 0)))
 521             return false;
 522
 523          for (unsigned i = 2; i < nir_op_infos[alu1->op].num_inputs; i++) {
 524             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
 525                return false;
 526          }
 527       } else {
 528          for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
 529             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
 530                return false;
 531          }
 532       }
 533       return true;
 534    }
 535    case nir_instr_type_deref: {
 536       nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
 537       nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
 538
 539       if (deref1->deref_type != deref2->deref_type ||
 540           deref1->mode != deref2->mode ||
 541           deref1->type != deref2->type)
 542          return false;
 543
 544       if (deref1->deref_type == nir_deref_type_var)
 545          return deref1->var == deref2->var;
 546
 547       if (!nir_srcs_equal(deref1->parent, deref2->parent))
 548          return false;
 549
 550       switch (deref1->deref_type) {
 551       case nir_deref_type_struct:
 552          if (deref1->strct.index != deref2->strct.index)
 553             return false;
 554          break;
 555
 556       case nir_deref_type_array:
 557       case nir_deref_type_ptr_as_array:
 558          if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
 559             return false;
 560          break;
 561
 562       case nir_deref_type_cast:
 563          if (deref1->cast.ptr_stride != deref2->cast.ptr_stride)
 564             return false;
 565          break;
 566
 567       case nir_deref_type_var:
 568       case nir_deref_type_array_wildcard:
 569          /* Nothing to do */
 570          break;
 571
 572       default:
 573          unreachable("Invalid instruction deref type");
 574       }
 575       return true;
 576    }
 577    case nir_instr_type_tex: {
 578       nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
 579       nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
 580
 581       if (tex1->op != tex2->op)
 582          return false;
 583
 584       if (tex1->num_srcs != tex2->num_srcs)
 585          return false;
 586       for (unsigned i = 0; i < tex1->num_srcs; i++) {
 587          if (tex1->src[i].src_type != tex2->src[i].src_type ||
 588              !nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
 589             return false;
 590          }
 591       }
 592
 593       if (tex1->coord_components != tex2->coord_components ||
 594           tex1->sampler_dim != tex2->sampler_dim ||
 595           tex1->is_array != tex2->is_array ||
 596           tex1->is_shadow != tex2->is_shadow ||
 597           tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
 598           tex1->component != tex2->component ||
 599          tex1->texture_index != tex2->texture_index ||
 600          tex1->texture_array_size != tex2->texture_array_size ||
 601          tex1->sampler_index != tex2->sampler_index) {
 602          return false;
 603       }
 604
 605       if (memcmp(tex1->tg4_offsets, tex2->tg4_offsets,
 606                  sizeof(tex1->tg4_offsets)))
 607          return false;
 608
 609       return true;
 610    }
 611    case nir_instr_type_load_const: {
 612       nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
 613       nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
 614
 615       if (load1->def.num_components != load2->def.num_components)
 616          return false;
 617
 618       if (load1->def.bit_size != load2->def.bit_size)
 619          return false;
 620
 621       if (load1->def.bit_size == 1) {
 622          for (unsigned i = 0; i < load1->def.num_components; ++i) {
 623             if (load1->value[i].b != load2->value[i].b)
 624                return false;
 625          }
 626       } else {
 627          unsigned size = load1->def.num_components * sizeof(*load1->value);
 628          if (memcmp(load1->value, load2->value, size) != 0)
 629             return false;
 630       }
 631       return true;
 632    }
 633    case nir_instr_type_phi: {
 634       nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
 635       nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
 636
 637       if (phi1->instr.block != phi2->instr.block)
 638          return false;
 639
 640       nir_foreach_phi_src(src1, phi1) {
 641          nir_foreach_phi_src(src2, phi2) {
 642             if (src1->pred == src2->pred) {
 643                if (!nir_srcs_equal(src1->src, src2->src))
 644                   return false;
 645
 646                break;
 647             }
 648          }
 649       }
 650
 651       return true;
 652    }
 653    case nir_instr_type_intrinsic: {
 654       nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
 655       nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
 656       const nir_intrinsic_info *info =
 657          &nir_intrinsic_infos[intrinsic1->intrinsic];
 658
 659       if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
 660           intrinsic1->num_components != intrinsic2->num_components)
 661          return false;
 662
 663       if (info->has_dest && intrinsic1->dest.ssa.num_components !=
 664                             intrinsic2->dest.ssa.num_components)
 665          return false;
 666
 667       if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
 668                             intrinsic2->dest.ssa.bit_size)
 669          return false;
 670
 671       for (unsigned i = 0; i < info->num_srcs; i++) {
 672          if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
 673             return false;
 674       }
 675
 676       for (unsigned i = 0; i < info->num_indices; i++) {
 677          if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
 678             return false;
 679       }
 680
 681       return true;
 682    }
 683    case nir_instr_type_call:
 684    case nir_instr_type_jump:
 685    case nir_instr_type_ssa_undef:
 686    case nir_instr_type_parallel_copy:
 687    default:
 688       unreachable("Invalid instruction type");
 689    }
 690
 691    unreachable("All cases in the above switch should return");
 692 }
 693
 694 static bool
 695 src_is_ssa(nir_src *src, void *data)
 696 {
 697    (void) data;
 698    return src->is_ssa;
 699 }
 700
 701 static bool
 702 dest_is_ssa(nir_dest *dest, void *data)
 703 {
 704    (void) data;
 705    return dest->is_ssa;
 706 }
 707
 708 static inline bool
 709 instr_each_src_and_dest_is_ssa(nir_instr *instr)
 710 {
 711    if (!nir_foreach_dest(instr, dest_is_ssa, NULL) ||
 712        !nir_foreach_src(instr, src_is_ssa, NULL))
 713       return false;
 714
 715    return true;
 716 }
 717
 718 /* This function determines if uses of an instruction can safely be rewritten
 719  * to use another identical instruction instead. Note that this function must
 720  * be kept in sync with hash_instr() and nir_instrs_equal() -- only
 721  * instructions that pass this test will be handed on to those functions, and
 722  * conversely they must handle everything that this function returns true for.
 723  */
 724
 725 static bool
 726 instr_can_rewrite(nir_instr *instr)
 727 {
 728    /* We only handle SSA. */
 729    assert(instr_each_src_and_dest_is_ssa(instr));
 730
 731    switch (instr->type) {
 732    case nir_instr_type_alu:
 733    case nir_instr_type_deref:
 734    case nir_instr_type_tex:
 735    case nir_instr_type_load_const:
 736    case nir_instr_type_phi:
 737       return true;
 738    case nir_instr_type_intrinsic:
 739       return nir_intrinsic_can_reorder(nir_instr_as_intrinsic(instr));
 740    case nir_instr_type_call:
 741    case nir_instr_type_jump:
 742    case nir_instr_type_ssa_undef:
 743       return false;
 744    case nir_instr_type_parallel_copy:
 745    default:
 746       unreachable("Invalid instruction type");
 747    }
 748
 749    return false;
 750 }
 751
 752 static nir_ssa_def *
 753 nir_instr_get_dest_ssa_def(nir_instr *instr)
 754 {
 755    switch (instr->type) {
 756    case nir_instr_type_alu:
 757       assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
 758       return &nir_instr_as_alu(instr)->dest.dest.ssa;
 759    case nir_instr_type_deref:
 760       assert(nir_instr_as_deref(instr)->dest.is_ssa);
 761       return &nir_instr_as_deref(instr)->dest.ssa;
 762    case nir_instr_type_load_const:
 763       return &nir_instr_as_load_const(instr)->def;
 764    case nir_instr_type_phi:
 765       assert(nir_instr_as_phi(instr)->dest.is_ssa);
 766       return &nir_instr_as_phi(instr)->dest.ssa;
 767    case nir_instr_type_intrinsic:
 768       assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
 769       return &nir_instr_as_intrinsic(instr)->dest.ssa;
 770    case nir_instr_type_tex:
 771       assert(nir_instr_as_tex(instr)->dest.is_ssa);
 772       return &nir_instr_as_tex(instr)->dest.ssa;
 773    default:
 774       unreachable("We never ask for any of these");
 775    }
 776 }
 777
 778 static bool
 779 cmp_func(const void *data1, const void *data2)
 780 {
 781    return nir_instrs_equal(data1, data2);
 782 }
 783
 784 struct set *
 785 nir_instr_set_create(void *mem_ctx)
 786 {
 787    return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
 788 }
 789
 790 void
 791 nir_instr_set_destroy(struct set *instr_set)
 792 {
 793    _mesa_set_destroy(instr_set, NULL);
 794 }
 795
 796 bool
 797 nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr)
 798 {
 799    if (!instr_can_rewrite(instr))
 800       return false;
 801
 802    struct set_entry *e = _mesa_set_search_or_add(instr_set, instr);
 803    nir_instr *match = (nir_instr *) e->key;
 804    if (match != instr) {
 805       nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
 806       nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
 807
 808       /* It's safe to replace an exact instruction with an inexact one as
 809        * long as we make it exact.  If we got here, the two instructions are
 810        * exactly identical in every other way so, once we've set the exact
 811        * bit, they are the same.
 812        */
 813       if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
 814          nir_instr_as_alu(match)->exact = true;
 815
 816       nir_ssa_def_rewrite_uses(def, nir_src_for_ssa(new_def));
 817       return true;
 818    }
 819
 820    return false;
 821 }
 822
 823 void
 824 nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
 825 {
 826    if (!instr_can_rewrite(instr))
 827       return;
 828
 829    struct set_entry *entry = _mesa_set_search(instr_set, instr);
 830    if (entry)
 831       _mesa_set_remove(instr_set, entry);
 832 }
 833