src/compiler/nir/nir_instr_set.c

   1 /*
   2  * Copyright © 2014 Connor Abbott
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "nir_instr_set.h"
  25 #include "nir_vla.h"
  26
  27 #define HASH(hash, data) _mesa_fnv32_1a_accumulate((hash), (data))
  28
  29 static uint32_t
  30 hash_src(uint32_t hash, const nir_src *src)
  31 {
  32    assert(src->is_ssa);
  33    hash = HASH(hash, src->ssa);
  34    return hash;
  35 }
  36
  37 static uint32_t
  38 hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
  39 {
  40    hash = HASH(hash, src->abs);
  41    hash = HASH(hash, src->negate);
  42
  43    for (unsigned i = 0; i < num_components; i++)
  44       hash = HASH(hash, src->swizzle[i]);
  45
  46    hash = hash_src(hash, &src->src);
  47    return hash;
  48 }
  49
  50 static uint32_t
  51 hash_alu(uint32_t hash, const nir_alu_instr *instr)
  52 {
  53    hash = HASH(hash, instr->op);
  54    hash = HASH(hash, instr->dest.dest.ssa.num_components);
  55    hash = HASH(hash, instr->dest.dest.ssa.bit_size);
  56    /* We explicitly don't hash instr->dest.dest.exact */
  57
  58    if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_COMMUTATIVE) {
  59       assert(nir_op_infos[instr->op].num_inputs == 2);
  60       uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
  61                                     nir_ssa_alu_instr_src_components(instr, 0));
  62       uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
  63                                     nir_ssa_alu_instr_src_components(instr, 1));
  64       /* For commutative operations, we need some commutative way of
  65        * combining the hashes.  One option would be to XOR them but that
  66        * means that anything with two identical sources will hash to 0 and
  67        * that's common enough we probably don't want the guaranteed
  68        * collision.  Either addition or multiplication will also work.
  69        */
  70       hash = hash0 * hash1;
  71    } else {
  72       for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
  73          hash = hash_alu_src(hash, &instr->src[i],
  74                              nir_ssa_alu_instr_src_components(instr, i));
  75       }
  76    }
  77
  78    return hash;
  79 }
  80
  81 static uint32_t
  82 hash_deref(uint32_t hash, const nir_deref_instr *instr)
  83 {
  84    hash = HASH(hash, instr->deref_type);
  85    hash = HASH(hash, instr->mode);
  86    hash = HASH(hash, instr->type);
  87
  88    if (instr->deref_type == nir_deref_type_var)
  89       return HASH(hash, instr->var);
  90
  91    hash = hash_src(hash, &instr->parent);
  92
  93    switch (instr->deref_type) {
  94    case nir_deref_type_struct:
  95       hash = HASH(hash, instr->strct.index);
  96       break;
  97
  98    case nir_deref_type_array:
  99       hash = hash_src(hash, &instr->arr.index);
 100       break;
 101
 102    case nir_deref_type_var:
 103    case nir_deref_type_array_wildcard:
 104    case nir_deref_type_cast:
 105       /* Nothing to do */
 106       break;
 107
 108    default:
 109       unreachable("Invalid instruction deref type");
 110    }
 111
 112    return hash;
 113 }
 114
 115 static uint32_t
 116 hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
 117 {
 118    hash = HASH(hash, instr->def.num_components);
 119
 120    unsigned size = instr->def.num_components * (instr->def.bit_size / 8);
 121    hash = _mesa_fnv32_1a_accumulate_block(hash, instr->value.f32, size);
 122
 123    return hash;
 124 }
 125
 126 static int
 127 cmp_phi_src(const void *data1, const void *data2)
 128 {
 129    nir_phi_src *src1 = *(nir_phi_src **)data1;
 130    nir_phi_src *src2 = *(nir_phi_src **)data2;
 131    return src1->pred - src2->pred;
 132 }
 133
 134 static uint32_t
 135 hash_phi(uint32_t hash, const nir_phi_instr *instr)
 136 {
 137    hash = HASH(hash, instr->instr.block);
 138
 139    /* sort sources by predecessor, since the order shouldn't matter */
 140    unsigned num_preds = instr->instr.block->predecessors->entries;
 141    NIR_VLA(nir_phi_src *, srcs, num_preds);
 142    unsigned i = 0;
 143    nir_foreach_phi_src(src, instr) {
 144       srcs[i++] = src;
 145    }
 146
 147    qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
 148
 149    for (i = 0; i < num_preds; i++) {
 150       hash = hash_src(hash, &srcs[i]->src);
 151       hash = HASH(hash, srcs[i]->pred);
 152    }
 153
 154    return hash;
 155 }
 156
 157 static uint32_t
 158 hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
 159 {
 160    const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
 161    hash = HASH(hash, instr->intrinsic);
 162
 163    if (info->has_dest) {
 164       hash = HASH(hash, instr->dest.ssa.num_components);
 165       hash = HASH(hash, instr->dest.ssa.bit_size);
 166    }
 167
 168    assert(info->num_variables == 0);
 169
 170    hash = _mesa_fnv32_1a_accumulate_block(hash, instr->const_index,
 171                                           info->num_indices
 172                                              * sizeof(instr->const_index[0]));
 173    return hash;
 174 }
 175
 176 static uint32_t
 177 hash_tex(uint32_t hash, const nir_tex_instr *instr)
 178 {
 179    hash = HASH(hash, instr->op);
 180    hash = HASH(hash, instr->num_srcs);
 181
 182    for (unsigned i = 0; i < instr->num_srcs; i++) {
 183       hash = HASH(hash, instr->src[i].src_type);
 184       hash = hash_src(hash, &instr->src[i].src);
 185    }
 186
 187    hash = HASH(hash, instr->coord_components);
 188    hash = HASH(hash, instr->sampler_dim);
 189    hash = HASH(hash, instr->is_array);
 190    hash = HASH(hash, instr->is_shadow);
 191    hash = HASH(hash, instr->is_new_style_shadow);
 192    unsigned component = instr->component;
 193    hash = HASH(hash, component);
 194    hash = HASH(hash, instr->texture_index);
 195    hash = HASH(hash, instr->texture_array_size);
 196    hash = HASH(hash, instr->sampler_index);
 197
 198    assert(!instr->texture && !instr->sampler);
 199
 200    return hash;
 201 }
 202
 203 /* Computes a hash of an instruction for use in a hash table. Note that this
 204  * will only work for instructions where instr_can_rewrite() returns true, and
 205  * it should return identical hashes for two instructions that are the same
 206  * according nir_instrs_equal().
 207  */
 208
 209 static uint32_t
 210 hash_instr(const void *data)
 211 {
 212    const nir_instr *instr = data;
 213    uint32_t hash = _mesa_fnv32_1a_offset_bias;
 214
 215    switch (instr->type) {
 216    case nir_instr_type_alu:
 217       hash = hash_alu(hash, nir_instr_as_alu(instr));
 218       break;
 219    case nir_instr_type_deref:
 220       hash = hash_deref(hash, nir_instr_as_deref(instr));
 221       break;
 222    case nir_instr_type_load_const:
 223       hash = hash_load_const(hash, nir_instr_as_load_const(instr));
 224       break;
 225    case nir_instr_type_phi:
 226       hash = hash_phi(hash, nir_instr_as_phi(instr));
 227       break;
 228    case nir_instr_type_intrinsic:
 229       hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
 230       break;
 231    case nir_instr_type_tex:
 232       hash = hash_tex(hash, nir_instr_as_tex(instr));
 233       break;
 234    default:
 235       unreachable("Invalid instruction type");
 236    }
 237
 238    return hash;
 239 }
 240
 241 bool
 242 nir_srcs_equal(nir_src src1, nir_src src2)
 243 {
 244    if (src1.is_ssa) {
 245       if (src2.is_ssa) {
 246          return src1.ssa == src2.ssa;
 247       } else {
 248          return false;
 249       }
 250    } else {
 251       if (src2.is_ssa) {
 252          return false;
 253       } else {
 254          if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
 255             return false;
 256
 257          if (src1.reg.indirect) {
 258             if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
 259                return false;
 260          }
 261
 262          return src1.reg.reg == src2.reg.reg &&
 263                 src1.reg.base_offset == src2.reg.base_offset;
 264       }
 265    }
 266 }
 267
 268 bool
 269 nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
 270                    unsigned src1, unsigned src2)
 271 {
 272    if (alu1->src[src1].abs != alu2->src[src2].abs ||
 273        alu1->src[src1].negate != alu2->src[src2].negate)
 274       return false;
 275
 276    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
 277       if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
 278          return false;
 279    }
 280
 281    return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
 282 }
 283
 284 /* Returns "true" if two instructions are equal. Note that this will only
 285  * work for the subset of instructions defined by instr_can_rewrite(). Also,
 286  * it should only return "true" for instructions that hash_instr() will return
 287  * the same hash for (ignoring collisions, of course).
 288  */
 289
 290 static bool
 291 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
 292 {
 293    if (instr1->type != instr2->type)
 294       return false;
 295
 296    switch (instr1->type) {
 297    case nir_instr_type_alu: {
 298       nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
 299       nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
 300
 301       if (alu1->op != alu2->op)
 302          return false;
 303
 304       /* TODO: We can probably acutally do something more inteligent such
 305        * as allowing different numbers and taking a maximum or something
 306        * here */
 307       if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
 308          return false;
 309
 310       if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
 311          return false;
 312
 313       /* We explicitly don't hash instr->dest.dest.exact */
 314
 315       if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_COMMUTATIVE) {
 316          assert(nir_op_infos[alu1->op].num_inputs == 2);
 317          return (nir_alu_srcs_equal(alu1, alu2, 0, 0) &&
 318                  nir_alu_srcs_equal(alu1, alu2, 1, 1)) ||
 319                 (nir_alu_srcs_equal(alu1, alu2, 0, 1) &&
 320                  nir_alu_srcs_equal(alu1, alu2, 1, 0));
 321       } else {
 322          for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
 323             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
 324                return false;
 325          }
 326       }
 327       return true;
 328    }
 329    case nir_instr_type_deref: {
 330       nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
 331       nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
 332
 333       if (deref1->deref_type != deref2->deref_type ||
 334           deref1->mode != deref2->mode ||
 335           deref1->type != deref2->type)
 336          return false;
 337
 338       if (deref1->deref_type == nir_deref_type_var)
 339          return deref1->var == deref2->var;
 340
 341       if (!nir_srcs_equal(deref1->parent, deref2->parent))
 342          return false;
 343
 344       switch (deref1->deref_type) {
 345       case nir_deref_type_struct:
 346          if (deref1->strct.index != deref2->strct.index)
 347             return false;
 348          break;
 349
 350       case nir_deref_type_array:
 351          if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
 352             return false;
 353          break;
 354
 355       case nir_deref_type_var:
 356       case nir_deref_type_array_wildcard:
 357       case nir_deref_type_cast:
 358          /* Nothing to do */
 359          break;
 360
 361       default:
 362          unreachable("Invalid instruction deref type");
 363       }
 364       break;
 365    }
 366    case nir_instr_type_tex: {
 367       nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
 368       nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
 369
 370       if (tex1->op != tex2->op)
 371          return false;
 372
 373       if (tex1->num_srcs != tex2->num_srcs)
 374          return false;
 375       for (unsigned i = 0; i < tex1->num_srcs; i++) {
 376          if (tex1->src[i].src_type != tex2->src[i].src_type ||
 377              !nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
 378             return false;
 379          }
 380       }
 381
 382       if (tex1->coord_components != tex2->coord_components ||
 383           tex1->sampler_dim != tex2->sampler_dim ||
 384           tex1->is_array != tex2->is_array ||
 385           tex1->is_shadow != tex2->is_shadow ||
 386           tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
 387           tex1->component != tex2->component ||
 388          tex1->texture_index != tex2->texture_index ||
 389          tex1->texture_array_size != tex2->texture_array_size ||
 390          tex1->sampler_index != tex2->sampler_index) {
 391          return false;
 392       }
 393
 394       /* Don't support un-lowered sampler derefs currently. */
 395       assert(!tex1->texture && !tex1->sampler &&
 396              !tex2->texture && !tex2->sampler);
 397
 398       return true;
 399    }
 400    case nir_instr_type_load_const: {
 401       nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
 402       nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
 403
 404       if (load1->def.num_components != load2->def.num_components)
 405          return false;
 406
 407       if (load1->def.bit_size != load2->def.bit_size)
 408          return false;
 409
 410       return memcmp(load1->value.f32, load2->value.f32,
 411                     load1->def.num_components * (load1->def.bit_size / 8u)) == 0;
 412    }
 413    case nir_instr_type_phi: {
 414       nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
 415       nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
 416
 417       if (phi1->instr.block != phi2->instr.block)
 418          return false;
 419
 420       nir_foreach_phi_src(src1, phi1) {
 421          nir_foreach_phi_src(src2, phi2) {
 422             if (src1->pred == src2->pred) {
 423                if (!nir_srcs_equal(src1->src, src2->src))
 424                   return false;
 425
 426                break;
 427             }
 428          }
 429       }
 430
 431       return true;
 432    }
 433    case nir_instr_type_intrinsic: {
 434       nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
 435       nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
 436       const nir_intrinsic_info *info =
 437          &nir_intrinsic_infos[intrinsic1->intrinsic];
 438
 439       if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
 440           intrinsic1->num_components != intrinsic2->num_components)
 441          return false;
 442
 443       if (info->has_dest && intrinsic1->dest.ssa.num_components !=
 444                             intrinsic2->dest.ssa.num_components)
 445          return false;
 446
 447       if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
 448                             intrinsic2->dest.ssa.bit_size)
 449          return false;
 450
 451       for (unsigned i = 0; i < info->num_srcs; i++) {
 452          if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
 453             return false;
 454       }
 455
 456       assert(info->num_variables == 0);
 457
 458       for (unsigned i = 0; i < info->num_indices; i++) {
 459          if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
 460             return false;
 461       }
 462
 463       return true;
 464    }
 465    case nir_instr_type_call:
 466    case nir_instr_type_jump:
 467    case nir_instr_type_ssa_undef:
 468    case nir_instr_type_parallel_copy:
 469    default:
 470       unreachable("Invalid instruction type");
 471    }
 472
 473    return false;
 474 }
 475
 476 static bool
 477 src_is_ssa(nir_src *src, void *data)
 478 {
 479    (void) data;
 480    return src->is_ssa;
 481 }
 482
 483 static bool
 484 dest_is_ssa(nir_dest *dest, void *data)
 485 {
 486    (void) data;
 487    return dest->is_ssa;
 488 }
 489
 490 /* This function determines if uses of an instruction can safely be rewritten
 491  * to use another identical instruction instead. Note that this function must
 492  * be kept in sync with hash_instr() and nir_instrs_equal() -- only
 493  * instructions that pass this test will be handed on to those functions, and
 494  * conversely they must handle everything that this function returns true for.
 495  */
 496
 497 static bool
 498 instr_can_rewrite(nir_instr *instr)
 499 {
 500    /* We only handle SSA. */
 501    if (!nir_foreach_dest(instr, dest_is_ssa, NULL) ||
 502        !nir_foreach_src(instr, src_is_ssa, NULL))
 503       return false;
 504
 505    switch (instr->type) {
 506    case nir_instr_type_alu:
 507    case nir_instr_type_deref:
 508    case nir_instr_type_load_const:
 509    case nir_instr_type_phi:
 510       return true;
 511    case nir_instr_type_tex: {
 512       nir_tex_instr *tex = nir_instr_as_tex(instr);
 513
 514       /* Don't support un-lowered sampler derefs currently. */
 515       if (tex->texture || tex->sampler)
 516          return false;
 517
 518       return true;
 519    }
 520    case nir_instr_type_intrinsic: {
 521       const nir_intrinsic_info *info =
 522          &nir_intrinsic_infos[nir_instr_as_intrinsic(instr)->intrinsic];
 523       return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
 524              (info->flags & NIR_INTRINSIC_CAN_REORDER) &&
 525              info->num_variables == 0; /* not implemented yet */
 526    }
 527    case nir_instr_type_call:
 528    case nir_instr_type_jump:
 529    case nir_instr_type_ssa_undef:
 530       return false;
 531    case nir_instr_type_parallel_copy:
 532    default:
 533       unreachable("Invalid instruction type");
 534    }
 535
 536    return false;
 537 }
 538
 539 static nir_ssa_def *
 540 nir_instr_get_dest_ssa_def(nir_instr *instr)
 541 {
 542    switch (instr->type) {
 543    case nir_instr_type_alu:
 544       assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
 545       return &nir_instr_as_alu(instr)->dest.dest.ssa;
 546    case nir_instr_type_deref:
 547       assert(nir_instr_as_deref(instr)->dest.is_ssa);
 548       return &nir_instr_as_deref(instr)->dest.ssa;
 549    case nir_instr_type_load_const:
 550       return &nir_instr_as_load_const(instr)->def;
 551    case nir_instr_type_phi:
 552       assert(nir_instr_as_phi(instr)->dest.is_ssa);
 553       return &nir_instr_as_phi(instr)->dest.ssa;
 554    case nir_instr_type_intrinsic:
 555       assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
 556       return &nir_instr_as_intrinsic(instr)->dest.ssa;
 557    case nir_instr_type_tex:
 558       assert(nir_instr_as_tex(instr)->dest.is_ssa);
 559       return &nir_instr_as_tex(instr)->dest.ssa;
 560    default:
 561       unreachable("We never ask for any of these");
 562    }
 563 }
 564
 565 static bool
 566 cmp_func(const void *data1, const void *data2)
 567 {
 568    return nir_instrs_equal(data1, data2);
 569 }
 570
 571 struct set *
 572 nir_instr_set_create(void *mem_ctx)
 573 {
 574    return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
 575 }
 576
 577 void
 578 nir_instr_set_destroy(struct set *instr_set)
 579 {
 580    _mesa_set_destroy(instr_set, NULL);
 581 }
 582
 583 bool
 584 nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr)
 585 {
 586    if (!instr_can_rewrite(instr))
 587       return false;
 588
 589    struct set_entry *entry = _mesa_set_search(instr_set, instr);
 590    if (entry) {
 591       nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
 592       nir_instr *match = (nir_instr *) entry->key;
 593       nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
 594
 595       /* It's safe to replace an exact instruction with an inexact one as
 596        * long as we make it exact.  If we got here, the two instructions are
 597        * exactly identical in every other way so, once we've set the exact
 598        * bit, they are the same.
 599        */
 600       if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
 601          nir_instr_as_alu(match)->exact = true;
 602
 603       nir_ssa_def_rewrite_uses(def, nir_src_for_ssa(new_def));
 604       return true;
 605    }
 606
 607    _mesa_set_add(instr_set, instr);
 608    return false;
 609 }
 610
 611 void
 612 nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
 613 {
 614    if (!instr_can_rewrite(instr))
 615       return;
 616
 617    struct set_entry *entry = _mesa_set_search(instr_set, instr);
 618    if (entry)
 619       _mesa_set_remove(instr_set, entry);
 620 }
 621