2 # Copyright (C) 2018 Red Hat
3 # Copyright (C) 2014 Intel Corporation
5 # Permission is hereby granted, free of charge, to any person obtaining a
6 # copy of this software and associated documentation files (the "Software"),
7 # to deal in the Software without restriction, including without limitation
8 # the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 # and/or sell copies of the Software, and to permit persons to whom the
10 # Software is furnished to do so, subject to the following conditions:
12 # The above copyright notice and this permission notice (including the next
13 # paragraph) shall be included in all copies or substantial portions of the
16 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 # This file defines all the available intrinsics in one place.
27 # The Intrinsic class corresponds one-to-one with nir_intrinsic_info
30 class Intrinsic(object):
31 """Class that represents all the information about an intrinsic opcode.
32 NOTE: this must be kept in sync with nir_intrinsic_info.
34 def __init__(self
, name
, src_components
, dest_components
,
35 indices
, flags
, sysval
, bit_sizes
):
38 - name: the intrinsic name
39 - src_components: list of the number of components per src, 0 means
40 vectorized instruction with number of components given in the
41 num_components field in nir_intrinsic_instr.
42 - dest_components: number of destination components, -1 means no
43 dest, 0 means number of components given in num_components field
44 in nir_intrinsic_instr.
45 - indices: list of constant indicies
46 - flags: list of semantic flags
47 - sysval: is this a system-value intrinsic
48 - bit_sizes: allowed dest bit_sizes
50 assert isinstance(name
, str)
51 assert isinstance(src_components
, list)
53 assert isinstance(src_components
[0], int)
54 assert isinstance(dest_components
, int)
55 assert isinstance(indices
, list)
57 assert isinstance(indices
[0], str)
58 assert isinstance(flags
, list)
60 assert isinstance(flags
[0], str)
61 assert isinstance(sysval
, bool)
63 assert isinstance(bit_sizes
[0], int)
66 self
.num_srcs
= len(src_components
)
67 self
.src_components
= src_components
68 self
.has_dest
= (dest_components
>= 0)
69 self
.dest_components
= dest_components
70 self
.num_indices
= len(indices
)
71 self
.indices
= indices
74 self
.bit_sizes
= bit_sizes
80 # A constant 'base' value that is added to an offset src:
81 BASE
= "NIR_INTRINSIC_BASE"
82 # For store instructions, a writemask:
83 WRMASK
= "NIR_INTRINSIC_WRMASK"
84 # The stream-id for GS emit_vertex/end_primitive intrinsics:
85 STREAM_ID
= "NIR_INTRINSIC_STREAM_ID"
86 # The clip-plane id for load_user_clip_plane intrinsics:
87 UCP_ID
= "NIR_INTRINSIC_UCP_ID"
88 # The amount of data, starting from BASE, that this instruction
89 # may access. This is used to provide bounds if the offset is
91 RANGE
= "NIR_INTRINSIC_RANGE"
92 # The vulkan descriptor set binding for vulkan_resource_index
94 DESC_SET
= "NIR_INTRINSIC_DESC_SET"
95 # The vulkan descriptor set binding for vulkan_resource_index
97 BINDING
= "NIR_INTRINSIC_BINDING"
99 COMPONENT
= "NIR_INTRINSIC_COMPONENT"
100 # Interpolation mode (only meaningful for FS inputs)
101 INTERP_MODE
= "NIR_INTRINSIC_INTERP_MODE"
102 # A binary nir_op to use when performing a reduction or scan operation
103 REDUCTION_OP
= "NIR_INTRINSIC_REDUCTION_OP"
104 # Cluster size for reduction operations
105 CLUSTER_SIZE
= "NIR_INTRINSIC_CLUSTER_SIZE"
106 # Parameter index for a load_param intrinsic
107 PARAM_IDX
= "NIR_INTRINSIC_PARAM_IDX"
108 # Image dimensionality for image intrinsics
109 IMAGE_DIM
= "NIR_INTRINSIC_IMAGE_DIM"
110 # Non-zero if we are accessing an array image
111 IMAGE_ARRAY
= "NIR_INTRINSIC_IMAGE_ARRAY"
112 # Access qualifiers for image and memory access intrinsics
113 ACCESS
= "NIR_INTRINSIC_ACCESS"
114 DST_ACCESS
= "NIR_INTRINSIC_DST_ACCESS"
115 SRC_ACCESS
= "NIR_INTRINSIC_SRC_ACCESS"
116 # Image format for image intrinsics
117 FORMAT
= "NIR_INTRINSIC_FORMAT"
118 # Offset or address alignment
119 ALIGN_MUL
= "NIR_INTRINSIC_ALIGN_MUL"
120 ALIGN_OFFSET
= "NIR_INTRINSIC_ALIGN_OFFSET"
121 # The vulkan descriptor type for vulkan_resource_index
122 DESC_TYPE
= "NIR_INTRINSIC_DESC_TYPE"
123 # The nir_alu_type of a uniform/input/output
124 TYPE
= "NIR_INTRINSIC_TYPE"
125 # The swizzle mask for quad_swizzle_amd & masked_swizzle_amd
126 SWIZZLE_MASK
= "NIR_INTRINSIC_SWIZZLE_MASK"
127 # Driver location of attribute
128 DRIVER_LOCATION
= "NIR_INTRINSIC_DRIVER_LOCATION"
129 # Ordering and visibility of a memory operation
130 MEMORY_SEMANTICS
= "NIR_INTRINSIC_MEMORY_SEMANTICS"
131 # Modes affected by a memory operation
132 MEMORY_MODES
= "NIR_INTRINSIC_MEMORY_MODES"
133 # Scope of a memory operation
134 MEMORY_SCOPE
= "NIR_INTRINSIC_MEMORY_SCOPE"
135 # Scope of a control barrier
136 EXECUTION_SCOPE
= "NIR_INTRINSIC_EXECUTION_SCOPE"
142 CAN_ELIMINATE
= "NIR_INTRINSIC_CAN_ELIMINATE"
143 CAN_REORDER
= "NIR_INTRINSIC_CAN_REORDER"
147 # Defines a new NIR intrinsic. By default, the intrinsic will have no sources
148 # and no destination.
150 # You can set dest_comp=n to enable a destination for the intrinsic, in which
151 # case it will have that many components, or =0 for "as many components as the
152 # NIR destination value."
154 # Set src_comp=n to enable sources for the intruction. It can be an array of
155 # component counts, or (for convenience) a scalar component count if there's
156 # only one source. If a component count is 0, it will be as many components as
157 # the intrinsic has based on the dest_comp.
158 def intrinsic(name
, src_comp
=[], dest_comp
=-1, indices
=[],
159 flags
=[], sysval
=False, bit_sizes
=[]):
160 assert name
not in INTR_OPCODES
161 INTR_OPCODES
[name
] = Intrinsic(name
, src_comp
, dest_comp
,
162 indices
, flags
, sysval
, bit_sizes
)
164 intrinsic("nop", flags
=[CAN_ELIMINATE
])
166 intrinsic("load_param", dest_comp
=0, indices
=[PARAM_IDX
], flags
=[CAN_ELIMINATE
])
168 intrinsic("load_deref", dest_comp
=0, src_comp
=[-1],
169 indices
=[ACCESS
], flags
=[CAN_ELIMINATE
])
170 intrinsic("store_deref", src_comp
=[-1, 0], indices
=[WRMASK
, ACCESS
])
171 intrinsic("copy_deref", src_comp
=[-1, -1], indices
=[DST_ACCESS
, SRC_ACCESS
])
173 # Interpolation of input. The interp_deref_at* intrinsics are similar to the
174 # load_var intrinsic acting on a shader input except that they interpolate the
175 # input differently. The at_sample, at_offset and at_vertex intrinsics take an
176 # additional source that is an integer sample id, a vec2 position offset, or a
177 # vertex ID respectively.
179 intrinsic("interp_deref_at_centroid", dest_comp
=0, src_comp
=[1],
180 flags
=[ CAN_ELIMINATE
, CAN_REORDER
])
181 intrinsic("interp_deref_at_sample", src_comp
=[1, 1], dest_comp
=0,
182 flags
=[CAN_ELIMINATE
, CAN_REORDER
])
183 intrinsic("interp_deref_at_offset", src_comp
=[1, 2], dest_comp
=0,
184 flags
=[CAN_ELIMINATE
, CAN_REORDER
])
185 intrinsic("interp_deref_at_vertex", src_comp
=[1, 1], dest_comp
=0,
186 flags
=[CAN_ELIMINATE
, CAN_REORDER
])
188 # Gets the length of an unsized array at the end of a buffer
189 intrinsic("deref_buffer_array_length", src_comp
=[-1], dest_comp
=1,
190 flags
=[CAN_ELIMINATE
, CAN_REORDER
])
192 # Ask the driver for the size of a given buffer. It takes the buffer index
194 intrinsic("get_buffer_size", src_comp
=[-1], dest_comp
=1,
195 flags
=[CAN_ELIMINATE
, CAN_REORDER
])
197 # a barrier is an intrinsic with no inputs/outputs but which can't be moved
198 # around/optimized in general
204 # Demote fragment shader invocation to a helper invocation. Any stores to
205 # memory after this instruction are suppressed and the fragment does not write
206 # outputs to the framebuffer. Unlike discard, demote needs to ensure that
207 # derivatives will still work for invocations that were not demoted.
209 # As specified by SPV_EXT_demote_to_helper_invocation.
211 intrinsic("is_helper_invocation", dest_comp
=1, flags
=[CAN_ELIMINATE
])
213 # A workgroup-level control barrier. Any thread which hits this barrier will
214 # pause until all threads within the current workgroup have also hit the
215 # barrier. For compute shaders, the workgroup is defined as the local group.
216 # For tessellation control shaders, the workgroup is defined as the current
217 # patch. This intrinsic does not imply any sort of memory barrier.
218 barrier("control_barrier")
220 # Memory barrier with semantics analogous to the memoryBarrier() GLSL
222 barrier("memory_barrier")
224 # Control/Memory barrier with explicit scope. Follows the semantics of SPIR-V
225 # OpMemoryBarrier and OpControlBarrier, used to implement Vulkan Memory Model.
226 # Storage that the barrier applies is represented using NIR variable modes.
227 # For an OpMemoryBarrier, set EXECUTION_SCOPE to NIR_SCOPE_NONE.
228 intrinsic("scoped_barrier",
229 indices
=[EXECUTION_SCOPE
, MEMORY_SEMANTICS
, MEMORY_MODES
, MEMORY_SCOPE
])
231 # Shader clock intrinsic with semantics analogous to the clock2x32ARB()
233 # The latter can be used as code motion barrier, which is currently not
235 intrinsic("shader_clock", dest_comp
=2, flags
=[CAN_ELIMINATE
],
236 indices
=[MEMORY_SCOPE
])
238 # Shader ballot intrinsics with semantics analogous to the
241 # readInvocationARB()
242 # readFirstInvocationARB()
244 # GLSL functions from ARB_shader_ballot.
245 intrinsic("ballot", src_comp
=[1], dest_comp
=0, flags
=[CAN_ELIMINATE
])
246 intrinsic("read_invocation", src_comp
=[0, 1], dest_comp
=0, flags
=[CAN_ELIMINATE
])
247 intrinsic("read_first_invocation", src_comp
=[0], dest_comp
=0, flags
=[CAN_ELIMINATE
])
249 # Additional SPIR-V ballot intrinsics
251 # These correspond to the SPIR-V opcodes
253 # OpGroupUniformElect
254 # OpSubgroupFirstInvocationKHR
255 intrinsic("elect", dest_comp
=1, flags
=[CAN_ELIMINATE
])
256 intrinsic("first_invocation", dest_comp
=1, flags
=[CAN_ELIMINATE
])
258 # Memory barrier with semantics analogous to the compute shader
259 # groupMemoryBarrier(), memoryBarrierAtomicCounter(), memoryBarrierBuffer(),
260 # memoryBarrierImage() and memoryBarrierShared() GLSL intrinsics.
261 barrier("group_memory_barrier")
262 barrier("memory_barrier_atomic_counter")
263 barrier("memory_barrier_buffer")
264 barrier("memory_barrier_image")
265 barrier("memory_barrier_shared")
266 barrier("begin_invocation_interlock")
267 barrier("end_invocation_interlock")
269 # Memory barrier for synchronizing TCS patch outputs
270 barrier("memory_barrier_tcs_patch")
272 # A conditional discard/demote, with a single boolean source.
273 intrinsic("discard_if", src_comp
=[1])
274 intrinsic("demote_if", src_comp
=[1])
276 # ARB_shader_group_vote intrinsics
277 intrinsic("vote_any", src_comp
=[1], dest_comp
=1, flags
=[CAN_ELIMINATE
])
278 intrinsic("vote_all", src_comp
=[1], dest_comp
=1, flags
=[CAN_ELIMINATE
])
279 intrinsic("vote_feq", src_comp
=[0], dest_comp
=1, flags
=[CAN_ELIMINATE
])
280 intrinsic("vote_ieq", src_comp
=[0], dest_comp
=1, flags
=[CAN_ELIMINATE
])
282 # Ballot ALU operations from SPIR-V.
284 # These operations work like their ALU counterparts except that the operate
285 # on a uvec4 which is treated as a 128bit integer. Also, they are, in
286 # general, free to ignore any bits which are above the subgroup size.
287 intrinsic("ballot_bitfield_extract", src_comp
=[4, 1], dest_comp
=1, flags
=[CAN_ELIMINATE
])
288 intrinsic("ballot_bit_count_reduce", src_comp
=[4], dest_comp
=1, flags
=[CAN_ELIMINATE
])
289 intrinsic("ballot_bit_count_inclusive", src_comp
=[4], dest_comp
=1, flags
=[CAN_ELIMINATE
])
290 intrinsic("ballot_bit_count_exclusive", src_comp
=[4], dest_comp
=1, flags
=[CAN_ELIMINATE
])
291 intrinsic("ballot_find_lsb", src_comp
=[4], dest_comp
=1, flags
=[CAN_ELIMINATE
])
292 intrinsic("ballot_find_msb", src_comp
=[4], dest_comp
=1, flags
=[CAN_ELIMINATE
])
294 # Shuffle operations from SPIR-V.
295 intrinsic("shuffle", src_comp
=[0, 1], dest_comp
=0, flags
=[CAN_ELIMINATE
])
296 intrinsic("shuffle_xor", src_comp
=[0, 1], dest_comp
=0, flags
=[CAN_ELIMINATE
])
297 intrinsic("shuffle_up", src_comp
=[0, 1], dest_comp
=0, flags
=[CAN_ELIMINATE
])
298 intrinsic("shuffle_down", src_comp
=[0, 1], dest_comp
=0, flags
=[CAN_ELIMINATE
])
300 # Quad operations from SPIR-V.
301 intrinsic("quad_broadcast", src_comp
=[0, 1], dest_comp
=0, flags
=[CAN_ELIMINATE
])
302 intrinsic("quad_swap_horizontal", src_comp
=[0], dest_comp
=0, flags
=[CAN_ELIMINATE
])
303 intrinsic("quad_swap_vertical", src_comp
=[0], dest_comp
=0, flags
=[CAN_ELIMINATE
])
304 intrinsic("quad_swap_diagonal", src_comp
=[0], dest_comp
=0, flags
=[CAN_ELIMINATE
])
306 intrinsic("reduce", src_comp
=[0], dest_comp
=0, indices
=[REDUCTION_OP
, CLUSTER_SIZE
],
307 flags
=[CAN_ELIMINATE
])
308 intrinsic("inclusive_scan", src_comp
=[0], dest_comp
=0, indices
=[REDUCTION_OP
],
309 flags
=[CAN_ELIMINATE
])
310 intrinsic("exclusive_scan", src_comp
=[0], dest_comp
=0, indices
=[REDUCTION_OP
],
311 flags
=[CAN_ELIMINATE
])
313 # AMD shader ballot operations
314 intrinsic("quad_swizzle_amd", src_comp
=[0], dest_comp
=0, indices
=[SWIZZLE_MASK
],
315 flags
=[CAN_ELIMINATE
])
316 intrinsic("masked_swizzle_amd", src_comp
=[0], dest_comp
=0, indices
=[SWIZZLE_MASK
],
317 flags
=[CAN_ELIMINATE
])
318 intrinsic("write_invocation_amd", src_comp
=[0, 0, 1], dest_comp
=0, flags
=[CAN_ELIMINATE
])
319 intrinsic("mbcnt_amd", src_comp
=[1], dest_comp
=1, flags
=[CAN_ELIMINATE
])
321 # Basic Geometry Shader intrinsics.
323 # emit_vertex implements GLSL's EmitStreamVertex() built-in. It takes a single
324 # index, which is the stream ID to write to.
326 # end_primitive implements GLSL's EndPrimitive() built-in.
327 intrinsic("emit_vertex", indices
=[STREAM_ID
])
328 intrinsic("end_primitive", indices
=[STREAM_ID
])
330 # Geometry Shader intrinsics with a vertex count.
332 # Alternatively, drivers may implement these intrinsics, and use
333 # nir_lower_gs_intrinsics() to convert from the basic intrinsics.
335 # These maintain a count of the number of vertices emitted, as an additional
336 # unsigned integer source.
337 intrinsic("emit_vertex_with_counter", src_comp
=[1], indices
=[STREAM_ID
])
338 intrinsic("end_primitive_with_counter", src_comp
=[1], indices
=[STREAM_ID
])
339 intrinsic("set_vertex_count", src_comp
=[1])
343 # The *_var variants take an atomic_uint nir_variable, while the other,
344 # lowered, variants take a constant buffer index and register offset.
346 def atomic(name
, flags
=[]):
347 intrinsic(name
+ "_deref", src_comp
=[-1], dest_comp
=1, flags
=flags
)
348 intrinsic(name
, src_comp
=[1], dest_comp
=1, indices
=[BASE
], flags
=flags
)
351 intrinsic(name
+ "_deref", src_comp
=[-1, 1], dest_comp
=1)
352 intrinsic(name
, src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
355 intrinsic(name
+ "_deref", src_comp
=[-1, 1, 1], dest_comp
=1)
356 intrinsic(name
, src_comp
=[1, 1, 1], dest_comp
=1, indices
=[BASE
])
358 atomic("atomic_counter_inc")
359 atomic("atomic_counter_pre_dec")
360 atomic("atomic_counter_post_dec")
361 atomic("atomic_counter_read", flags
=[CAN_ELIMINATE
])
362 atomic2("atomic_counter_add")
363 atomic2("atomic_counter_min")
364 atomic2("atomic_counter_max")
365 atomic2("atomic_counter_and")
366 atomic2("atomic_counter_or")
367 atomic2("atomic_counter_xor")
368 atomic2("atomic_counter_exchange")
369 atomic3("atomic_counter_comp_swap")
371 # Image load, store and atomic intrinsics.
373 # All image intrinsics come in three versions. One which take an image target
374 # passed as a deref chain as the first source, one which takes an index as the
375 # first source, and one which takes a bindless handle as the first source.
376 # In the first version, the image variable contains the memory and layout
377 # qualifiers that influence the semantics of the intrinsic. In the second and
378 # third, the image format and access qualifiers are provided as constant
381 # All image intrinsics take a four-coordinate vector and a sample index as
382 # 2nd and 3rd sources, determining the location within the image that will be
383 # accessed by the intrinsic. Components not applicable to the image target
384 # in use are undefined. Image store takes an additional four-component
385 # argument with the value to be written, and image atomic operations take
386 # either one or two additional scalar arguments with the same meaning as in
387 # the ARB_shader_image_load_store specification.
388 def image(name
, src_comp
=[], **kwargs
):
389 intrinsic("image_deref_" + name
, src_comp
=[1] + src_comp
,
390 indices
=[ACCESS
], **kwargs
)
391 intrinsic("image_" + name
, src_comp
=[1] + src_comp
,
392 indices
=[IMAGE_DIM
, IMAGE_ARRAY
, FORMAT
, ACCESS
], **kwargs
)
393 intrinsic("bindless_image_" + name
, src_comp
=[1] + src_comp
,
394 indices
=[IMAGE_DIM
, IMAGE_ARRAY
, FORMAT
, ACCESS
], **kwargs
)
396 image("load", src_comp
=[4, 1, 1], dest_comp
=0, flags
=[CAN_ELIMINATE
])
397 image("store", src_comp
=[4, 1, 0, 1])
398 image("atomic_add", src_comp
=[4, 1, 1], dest_comp
=1)
399 image("atomic_imin", src_comp
=[4, 1, 1], dest_comp
=1)
400 image("atomic_umin", src_comp
=[4, 1, 1], dest_comp
=1)
401 image("atomic_imax", src_comp
=[4, 1, 1], dest_comp
=1)
402 image("atomic_umax", src_comp
=[4, 1, 1], dest_comp
=1)
403 image("atomic_and", src_comp
=[4, 1, 1], dest_comp
=1)
404 image("atomic_or", src_comp
=[4, 1, 1], dest_comp
=1)
405 image("atomic_xor", src_comp
=[4, 1, 1], dest_comp
=1)
406 image("atomic_exchange", src_comp
=[4, 1, 1], dest_comp
=1)
407 image("atomic_comp_swap", src_comp
=[4, 1, 1, 1], dest_comp
=1)
408 image("atomic_fadd", src_comp
=[4, 1, 1], dest_comp
=1)
409 image("size", dest_comp
=0, flags
=[CAN_ELIMINATE
, CAN_REORDER
])
410 image("samples", dest_comp
=1, flags
=[CAN_ELIMINATE
, CAN_REORDER
])
411 image("atomic_inc_wrap", src_comp
=[4, 1, 1], dest_comp
=1)
412 image("atomic_dec_wrap", src_comp
=[4, 1, 1], dest_comp
=1)
414 # Vulkan descriptor set intrinsics
416 # The Vulkan API uses a different binding model from GL. In the Vulkan
417 # API, all external resources are represented by a tuple:
419 # (descriptor set, binding, array index)
421 # where the array index is the only thing allowed to be indirect. The
422 # vulkan_surface_index intrinsic takes the descriptor set and binding as
423 # its first two indices and the array index as its source. The third
424 # index is a nir_variable_mode in case that's useful to the backend.
426 # The intended usage is that the shader will call vulkan_surface_index to
427 # get an index and then pass that as the buffer index ubo/ssbo calls.
429 # The vulkan_resource_reindex intrinsic takes a resource index in src0
430 # (the result of a vulkan_resource_index or vulkan_resource_reindex) which
431 # corresponds to the tuple (set, binding, index) and computes an index
432 # corresponding to tuple (set, binding, idx + src1).
433 intrinsic("vulkan_resource_index", src_comp
=[1], dest_comp
=0,
434 indices
=[DESC_SET
, BINDING
, DESC_TYPE
],
435 flags
=[CAN_ELIMINATE
, CAN_REORDER
])
436 intrinsic("vulkan_resource_reindex", src_comp
=[0, 1], dest_comp
=0,
437 indices
=[DESC_TYPE
], flags
=[CAN_ELIMINATE
, CAN_REORDER
])
438 intrinsic("load_vulkan_descriptor", src_comp
=[-1], dest_comp
=0,
439 indices
=[DESC_TYPE
], flags
=[CAN_ELIMINATE
, CAN_REORDER
])
441 # variable atomic intrinsics
443 # All of these variable atomic memory operations read a value from memory,
444 # compute a new value using one of the operations below, write the new value
445 # to memory, and return the original value read.
447 # All operations take 2 sources except CompSwap that takes 3. These sources
450 # 0: A deref to the memory on which to perform the atomic
451 # 1: The data parameter to the atomic function (i.e. the value to add
452 # in shared_atomic_add, etc).
453 # 2: For CompSwap only: the second data parameter.
454 intrinsic("deref_atomic_add", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
455 intrinsic("deref_atomic_imin", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
456 intrinsic("deref_atomic_umin", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
457 intrinsic("deref_atomic_imax", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
458 intrinsic("deref_atomic_umax", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
459 intrinsic("deref_atomic_and", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
460 intrinsic("deref_atomic_or", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
461 intrinsic("deref_atomic_xor", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
462 intrinsic("deref_atomic_exchange", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
463 intrinsic("deref_atomic_comp_swap", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
464 intrinsic("deref_atomic_fadd", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
465 intrinsic("deref_atomic_fmin", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
466 intrinsic("deref_atomic_fmax", src_comp
=[-1, 1], dest_comp
=1, indices
=[ACCESS
])
467 intrinsic("deref_atomic_fcomp_swap", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
469 # SSBO atomic intrinsics
471 # All of the SSBO atomic memory operations read a value from memory,
472 # compute a new value using one of the operations below, write the new
473 # value to memory, and return the original value read.
475 # All operations take 3 sources except CompSwap that takes 4. These
478 # 0: The SSBO buffer index.
479 # 1: The offset into the SSBO buffer of the variable that the atomic
480 # operation will operate on.
481 # 2: The data parameter to the atomic function (i.e. the value to add
482 # in ssbo_atomic_add, etc).
483 # 3: For CompSwap only: the second data parameter.
484 intrinsic("ssbo_atomic_add", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
485 intrinsic("ssbo_atomic_imin", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
486 intrinsic("ssbo_atomic_umin", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
487 intrinsic("ssbo_atomic_imax", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
488 intrinsic("ssbo_atomic_umax", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
489 intrinsic("ssbo_atomic_and", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
490 intrinsic("ssbo_atomic_or", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
491 intrinsic("ssbo_atomic_xor", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
492 intrinsic("ssbo_atomic_exchange", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
493 intrinsic("ssbo_atomic_comp_swap", src_comp
=[-1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
494 intrinsic("ssbo_atomic_fadd", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
495 intrinsic("ssbo_atomic_fmin", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
496 intrinsic("ssbo_atomic_fmax", src_comp
=[-1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
497 intrinsic("ssbo_atomic_fcomp_swap", src_comp
=[-1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
499 # CS shared variable atomic intrinsics
501 # All of the shared variable atomic memory operations read a value from
502 # memory, compute a new value using one of the operations below, write the
503 # new value to memory, and return the original value read.
505 # All operations take 2 sources except CompSwap that takes 3. These
508 # 0: The offset into the shared variable storage region that the atomic
509 # operation will operate on.
510 # 1: The data parameter to the atomic function (i.e. the value to add
511 # in shared_atomic_add, etc).
512 # 2: For CompSwap only: the second data parameter.
513 intrinsic("shared_atomic_add", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
514 intrinsic("shared_atomic_imin", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
515 intrinsic("shared_atomic_umin", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
516 intrinsic("shared_atomic_imax", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
517 intrinsic("shared_atomic_umax", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
518 intrinsic("shared_atomic_and", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
519 intrinsic("shared_atomic_or", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
520 intrinsic("shared_atomic_xor", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
521 intrinsic("shared_atomic_exchange", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
522 intrinsic("shared_atomic_comp_swap", src_comp
=[1, 1, 1], dest_comp
=1, indices
=[BASE
])
523 intrinsic("shared_atomic_fadd", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
524 intrinsic("shared_atomic_fmin", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
525 intrinsic("shared_atomic_fmax", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
526 intrinsic("shared_atomic_fcomp_swap", src_comp
=[1, 1, 1], dest_comp
=1, indices
=[BASE
])
528 # Global atomic intrinsics
530 # All of the shared variable atomic memory operations read a value from
531 # memory, compute a new value using one of the operations below, write the
532 # new value to memory, and return the original value read.
534 # All operations take 2 sources except CompSwap that takes 3. These
537 # 0: The memory address that the atomic operation will operate on.
538 # 1: The data parameter to the atomic function (i.e. the value to add
539 # in shared_atomic_add, etc).
540 # 2: For CompSwap only: the second data parameter.
541 intrinsic("global_atomic_add", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
542 intrinsic("global_atomic_imin", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
543 intrinsic("global_atomic_umin", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
544 intrinsic("global_atomic_imax", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
545 intrinsic("global_atomic_umax", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
546 intrinsic("global_atomic_and", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
547 intrinsic("global_atomic_or", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
548 intrinsic("global_atomic_xor", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
549 intrinsic("global_atomic_exchange", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
550 intrinsic("global_atomic_comp_swap", src_comp
=[1, 1, 1], dest_comp
=1, indices
=[BASE
])
551 intrinsic("global_atomic_fadd", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
552 intrinsic("global_atomic_fmin", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
553 intrinsic("global_atomic_fmax", src_comp
=[1, 1], dest_comp
=1, indices
=[BASE
])
554 intrinsic("global_atomic_fcomp_swap", src_comp
=[1, 1, 1], dest_comp
=1, indices
=[BASE
])
556 def system_value(name
, dest_comp
, indices
=[], bit_sizes
=[32]):
557 intrinsic("load_" + name
, [], dest_comp
, indices
,
558 flags
=[CAN_ELIMINATE
, CAN_REORDER
], sysval
=True,
561 system_value("frag_coord", 4)
562 system_value("point_coord", 2)
563 system_value("line_coord", 1)
564 system_value("front_face", 1, bit_sizes
=[1, 32])
565 system_value("vertex_id", 1)
566 system_value("vertex_id_zero_base", 1)
567 system_value("first_vertex", 1)
568 system_value("is_indexed_draw", 1)
569 system_value("base_vertex", 1)
570 system_value("instance_id", 1)
571 system_value("base_instance", 1)
572 system_value("draw_id", 1)
573 system_value("sample_id", 1)
574 # sample_id_no_per_sample is like sample_id but does not imply per-
575 # sample shading. See the lower_helper_invocation option.
576 system_value("sample_id_no_per_sample", 1)
577 system_value("sample_pos", 2)
578 system_value("sample_mask_in", 1)
579 system_value("primitive_id", 1)
580 system_value("invocation_id", 1)
581 system_value("tess_coord", 3)
582 system_value("tess_level_outer", 4)
583 system_value("tess_level_inner", 2)
584 system_value("tess_level_outer_default", 4)
585 system_value("tess_level_inner_default", 2)
586 system_value("patch_vertices_in", 1)
587 system_value("local_invocation_id", 3)
588 system_value("local_invocation_index", 1)
589 system_value("work_group_id", 3)
590 system_value("user_clip_plane", 4, indices
=[UCP_ID
])
591 system_value("num_work_groups", 3)
592 system_value("helper_invocation", 1, bit_sizes
=[1, 32])
593 system_value("alpha_ref_float", 1)
594 system_value("layer_id", 1)
595 system_value("view_index", 1)
596 system_value("subgroup_size", 1)
597 system_value("subgroup_invocation", 1)
598 system_value("subgroup_eq_mask", 0, bit_sizes
=[32, 64])
599 system_value("subgroup_ge_mask", 0, bit_sizes
=[32, 64])
600 system_value("subgroup_gt_mask", 0, bit_sizes
=[32, 64])
601 system_value("subgroup_le_mask", 0, bit_sizes
=[32, 64])
602 system_value("subgroup_lt_mask", 0, bit_sizes
=[32, 64])
603 system_value("num_subgroups", 1)
604 system_value("subgroup_id", 1)
605 system_value("local_group_size", 3)
606 system_value("global_invocation_id", 3, bit_sizes
=[32, 64])
607 system_value("global_invocation_index", 1, bit_sizes
=[32, 64])
608 system_value("work_dim", 1)
609 # Driver-specific viewport scale/offset parameters.
611 # VC4 and V3D need to emit a scaled version of the position in the vertex
612 # shaders for binning, and having system values lets us move the math for that
615 # Panfrost needs to implement all coordinate transformation in the
616 # vertex shader; system values allow us to share this routine in NIR.
617 system_value("viewport_x_scale", 1)
618 system_value("viewport_y_scale", 1)
619 system_value("viewport_z_scale", 1)
620 system_value("viewport_z_offset", 1)
621 system_value("viewport_scale", 3)
622 system_value("viewport_offset", 3)
624 # Blend constant color values. Float values are clamped. Vectored versions are
625 # provided as well for driver convenience
627 system_value("blend_const_color_r_float", 1)
628 system_value("blend_const_color_g_float", 1)
629 system_value("blend_const_color_b_float", 1)
630 system_value("blend_const_color_a_float", 1)
631 system_value("blend_const_color_rgba", 4)
632 system_value("blend_const_color_rgba8888_unorm", 1)
633 system_value("blend_const_color_aaaa8888_unorm", 1)
635 # System values for gl_Color, for radeonsi which interpolates these in the
636 # shader prolog to handle two-sided color without recompiles and therefore
637 # doesn't handle these in the main shader part like normal varyings.
638 system_value("color0", 4)
639 system_value("color1", 4)
641 # System value for internal compute shaders in radeonsi.
642 system_value("user_data_amd", 4)
644 # Barycentric coordinate intrinsics.
646 # These set up the barycentric coordinates for a particular interpolation.
647 # The first four are for the simple cases: pixel, centroid, per-sample
648 # (at gl_SampleID), or pull model (1/W, 1/I, 1/J) at the pixel center. The next
649 # three two handle interpolating at a specified sample location, or
650 # interpolating with a vec2 offset,
652 # The interp_mode index should be either the INTERP_MODE_SMOOTH or
653 # INTERP_MODE_NOPERSPECTIVE enum values.
655 # The vec2 value produced by these intrinsics is intended for use as the
656 # barycoord source of a load_interpolated_input intrinsic.
658 def barycentric(name
, dst_comp
, src_comp
=[]):
659 intrinsic("load_barycentric_" + name
, src_comp
=src_comp
, dest_comp
=dst_comp
,
660 indices
=[INTERP_MODE
], flags
=[CAN_ELIMINATE
, CAN_REORDER
])
663 barycentric("pixel", 2)
664 barycentric("centroid", 2)
665 barycentric("sample", 2)
666 barycentric("model", 3)
667 # src[] = { sample_id }.
668 barycentric("at_sample", 2, [1])
669 # src[] = { offset.xy }.
670 barycentric("at_offset", 2, [2])
672 # Load sample position:
674 # Takes a sample # and returns a sample position. Used for lowering
675 # interpolateAtSample() to interpolateAtOffset()
676 intrinsic("load_sample_pos_from_id", src_comp
=[1], dest_comp
=2,
677 flags
=[CAN_ELIMINATE
, CAN_REORDER
])
679 # Loads what I believe is the primitive size, for scaling ij to pixel size:
680 intrinsic("load_size_ir3", dest_comp
=1, flags
=[CAN_ELIMINATE
, CAN_REORDER
])
682 # Fragment shader input interpolation delta intrinsic.
684 # For hw where fragment shader input interpolation is handled in shader, the
685 # load_fs_input_interp deltas intrinsics can be used to load the input deltas
686 # used for interpolation as follows:
688 # vec3 iid = load_fs_input_interp_deltas(varying_slot)
689 # vec2 bary = load_barycentric_*(...)
690 # float result = iid.x + iid.y * bary.y + iid.z * bary.x
692 intrinsic("load_fs_input_interp_deltas", src_comp
=[1], dest_comp
=3,
693 indices
=[BASE
, COMPONENT
], flags
=[CAN_ELIMINATE
, CAN_REORDER
])
695 # Load operations pull data from some piece of GPU memory. All load
696 # operations operate in terms of offsets into some piece of theoretical
697 # memory. Loads from externally visible memory (UBO and SSBO) simply take a
698 # byte offset as a source. Loads from opaque memory (uniforms, inputs, etc.)
699 # take a base+offset pair where the nir_intrinsic_base() gives the location
700 # of the start of the variable being loaded and and the offset source is a
701 # offset into that variable.
703 # Uniform load operations have a nir_intrinsic_range() index that specifies the
704 # range (starting at base) of the data from which we are loading. If
705 # range == 0, then the range is unknown.
707 # Some load operations such as UBO/SSBO load and per_vertex loads take an
708 # additional source to specify which UBO/SSBO/vertex to load from.
710 # The exact address type depends on the lowering pass that generates the
711 # load/store intrinsics. Typically, this is vec4 units for things such as
712 # varying slots and float units for fragment shader inputs. UBO and SSBO
713 # offsets are always in bytes.
715 def load(name
, src_comp
, indices
=[], flags
=[]):
716 intrinsic("load_" + name
, src_comp
, dest_comp
=0, indices
=indices
,
719 # src[] = { offset }.
720 load("uniform", [1], [BASE
, RANGE
, TYPE
], [CAN_ELIMINATE
, CAN_REORDER
])
721 # src[] = { buffer_index, offset }.
722 load("ubo", [-1, 1], [ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
], flags
=[CAN_ELIMINATE
, CAN_REORDER
])
723 # src[] = { offset }.
724 load("input", [1], [BASE
, COMPONENT
, TYPE
], [CAN_ELIMINATE
, CAN_REORDER
])
725 # src[] = { vertex_id, offset }.
726 load("input_vertex", [1, 1], [BASE
, COMPONENT
, TYPE
], [CAN_ELIMINATE
, CAN_REORDER
])
727 # src[] = { vertex, offset }.
728 load("per_vertex_input", [1, 1], [BASE
, COMPONENT
], [CAN_ELIMINATE
, CAN_REORDER
])
729 # src[] = { barycoord, offset }.
730 load("interpolated_input", [2, 1], [BASE
, COMPONENT
], [CAN_ELIMINATE
, CAN_REORDER
])
732 # src[] = { buffer_index, offset }.
733 load("ssbo", [-1, 1], [ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
], [CAN_ELIMINATE
])
734 # src[] = { buffer_index }
735 load("ssbo_address", [1], [], [CAN_ELIMINATE
, CAN_REORDER
])
736 # src[] = { offset }.
737 load("output", [1], [BASE
, COMPONENT
], flags
=[CAN_ELIMINATE
])
738 # src[] = { vertex, offset }.
739 load("per_vertex_output", [1, 1], [BASE
, COMPONENT
], [CAN_ELIMINATE
])
740 # src[] = { offset }.
741 load("shared", [1], [BASE
, ALIGN_MUL
, ALIGN_OFFSET
], [CAN_ELIMINATE
])
742 # src[] = { offset }.
743 load("push_constant", [1], [BASE
, RANGE
], [CAN_ELIMINATE
, CAN_REORDER
])
744 # src[] = { offset }.
745 load("constant", [1], [BASE
, RANGE
, ALIGN_MUL
, ALIGN_OFFSET
],
746 [CAN_ELIMINATE
, CAN_REORDER
])
747 # src[] = { address }.
748 load("global", [1], [ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
], [CAN_ELIMINATE
])
749 # src[] = { address }.
750 load("kernel_input", [1], [BASE
, RANGE
, ALIGN_MUL
, ALIGN_OFFSET
], [CAN_ELIMINATE
, CAN_REORDER
])
751 # src[] = { offset }.
752 load("scratch", [1], [ALIGN_MUL
, ALIGN_OFFSET
], [CAN_ELIMINATE
])
754 # Stores work the same way as loads, except now the first source is the value
755 # to store and the second (and possibly third) source specify where to store
756 # the value. SSBO and shared memory stores also have a
757 # nir_intrinsic_write_mask()
759 def store(name
, srcs
, indices
=[], flags
=[]):
760 intrinsic("store_" + name
, [0] + srcs
, indices
=indices
, flags
=flags
)
762 # src[] = { value, offset }.
763 store("output", [1], [BASE
, WRMASK
, COMPONENT
, TYPE
])
764 # src[] = { value, vertex, offset }.
765 store("per_vertex_output", [1, 1], [BASE
, WRMASK
, COMPONENT
])
766 # src[] = { value, block_index, offset }
767 store("ssbo", [-1, 1], [WRMASK
, ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
])
768 # src[] = { value, offset }.
769 store("shared", [1], [BASE
, WRMASK
, ALIGN_MUL
, ALIGN_OFFSET
])
770 # src[] = { value, address }.
771 store("global", [1], [WRMASK
, ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
])
772 # src[] = { value, offset }.
773 store("scratch", [1], [ALIGN_MUL
, ALIGN_OFFSET
, WRMASK
])
775 # IR3-specific version of most SSBO intrinsics. The only different
776 # compare to the originals is that they add an extra source to hold
777 # the dword-offset, which is needed by the backend code apart from
778 # the byte-offset already provided by NIR in one of the sources.
780 # NIR lowering pass 'ir3_nir_lower_io_offset' will replace the
781 # original SSBO intrinsics by these, placing the computed
782 # dword-offset always in the last source.
784 # The float versions are not handled because those are not supported
786 store("ssbo_ir3", [1, 1, 1],
787 indices
=[WRMASK
, ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
])
788 load("ssbo_ir3", [1, 1, 1],
789 indices
=[ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
], flags
=[CAN_ELIMINATE
])
790 intrinsic("ssbo_atomic_add_ir3", src_comp
=[1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
791 intrinsic("ssbo_atomic_imin_ir3", src_comp
=[1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
792 intrinsic("ssbo_atomic_umin_ir3", src_comp
=[1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
793 intrinsic("ssbo_atomic_imax_ir3", src_comp
=[1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
794 intrinsic("ssbo_atomic_umax_ir3", src_comp
=[1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
795 intrinsic("ssbo_atomic_and_ir3", src_comp
=[1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
796 intrinsic("ssbo_atomic_or_ir3", src_comp
=[1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
797 intrinsic("ssbo_atomic_xor_ir3", src_comp
=[1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
798 intrinsic("ssbo_atomic_exchange_ir3", src_comp
=[1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
799 intrinsic("ssbo_atomic_comp_swap_ir3", src_comp
=[1, 1, 1, 1, 1], dest_comp
=1, indices
=[ACCESS
])
801 # IR3-specific instruction for UBO loads using the ldc instruction. The second
802 # source is the indirect offset, in units of four dwords. The base is a
803 # component offset, in dword units.
804 intrinsic("load_ubo_ir3", src_comp
=[1, 1], bit_sizes
=[32], dest_comp
=0, indices
=[BASE
],
805 flags
=[CAN_REORDER
, CAN_ELIMINATE
])
807 # System values for freedreno geometry shaders.
808 system_value("vs_primitive_stride_ir3", 1)
809 system_value("vs_vertex_stride_ir3", 1)
810 system_value("gs_header_ir3", 1)
811 system_value("primitive_location_ir3", 1, indices
=[DRIVER_LOCATION
])
813 # System values for freedreno tessellation shaders.
814 system_value("hs_patch_stride_ir3", 1)
815 system_value("tess_factor_base_ir3", 2)
816 system_value("tess_param_base_ir3", 2)
817 system_value("tcs_header_ir3", 1)
819 # IR3-specific intrinsics for tessellation control shaders. cond_end_ir3 end
820 # the shader when src0 is false and is used to narrow down the TCS shader to
821 # just thread 0 before writing out tessellation levels.
822 intrinsic("cond_end_ir3", src_comp
=[1])
823 # end_patch_ir3 is used just before thread 0 exist the TCS and presumably
824 # signals the TE that the patch is complete and can be tessellated.
825 intrinsic("end_patch_ir3")
827 # IR3-specific load/store intrinsics. These access a buffer used to pass data
828 # between geometry stages - perhaps it's explicit access to the vertex cache.
830 # src[] = { value, offset }.
831 store("shared_ir3", [1], [BASE
, ALIGN_MUL
, ALIGN_OFFSET
])
832 # src[] = { offset }.
833 load("shared_ir3", [1], [BASE
, ALIGN_MUL
, ALIGN_OFFSET
], [CAN_ELIMINATE
])
835 # IR3-specific load/store global intrinsics. They take a 64-bit base address
836 # and a 32-bit offset. The hardware will add the base and the offset, which
837 # saves us from doing 64-bit math on the base address.
839 # src[] = { value, address(vec2 of hi+lo uint32_t), offset }.
840 # const_index[] = { write_mask, align_mul, align_offset }
841 store("global_ir3", [2, 1], indices
=[ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
])
842 # src[] = { address(vec2 of hi+lo uint32_t), offset }.
843 # const_index[] = { access, align_mul, align_offset }
844 load("global_ir3", [2, 1], indices
=[ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
], flags
=[CAN_ELIMINATE
])
846 # IR3-specific bindless handle specifier. Similar to vulkan_resource_index, but
847 # without the binding because the hardware expects a single flattened index
848 # rather than a (binding, index) pair. We may also want to use this with GL.
849 # Note that this doesn't actually turn into a HW instruction.
850 intrinsic("bindless_resource_ir3", [1], dest_comp
=1, indices
=[DESC_SET
], flags
=[CAN_ELIMINATE
, CAN_REORDER
])
852 # Intrinsics used by the Midgard/Bifrost blend pipeline. These are defined
853 # within a blend shader to read/write the raw value from the tile buffer,
854 # without applying any format conversion in the process. If the shader needs
855 # usable pixel values, it must apply format conversions itself.
857 # These definitions are generic, but they are explicitly vendored to prevent
858 # other drivers from using them, as their semantics is defined in terms of the
859 # Midgard/Bifrost hardware tile buffer and may not line up with anything sane.
860 # One notable divergence is sRGB, which is asymmetric: raw_input_pan requires
861 # an sRGB->linear conversion, but linear values should be written to
862 # raw_output_pan and the hardware handles linear->sRGB.
865 store("raw_output_pan", [], [])
866 store("combined_output_pan", [1, 1, 1], [BASE
, COMPONENT
])
867 load("raw_output_pan", [], [], [CAN_ELIMINATE
, CAN_REORDER
])
869 # Loads the sampler paramaters <min_lod, max_lod, lod_bias>
870 # src[] = { sampler_index }
871 load("sampler_lod_parameters_pan", [1], [CAN_ELIMINATE
, CAN_REORDER
])
873 # R600 specific instrincs
875 # R600 can only fetch 16 byte aligned data from an UBO, and the actual offset
876 # is given in vec4 units, so we have to fetch the a vec4 and get the component
878 # src[] = { buffer_index, offset }.
879 load("ubo_r600", [1, 1], [ACCESS
, ALIGN_MUL
, ALIGN_OFFSET
], flags
=[CAN_ELIMINATE
, CAN_REORDER
])
881 # location where the tesselation data is stored in LDS
882 system_value("tcs_in_param_base_r600", 4)
883 system_value("tcs_out_param_base_r600", 4)
884 system_value("tcs_rel_patch_id_r600", 1)
885 system_value("tcs_tess_factor_base_r600", 1)
887 # load as many components as needed giving per-component addresses
888 intrinsic("load_local_shared_r600", src_comp
=[0], dest_comp
=0, indices
= [COMPONENT
], flags
= [CAN_ELIMINATE
, CAN_REORDER
])
890 store("local_shared_r600", [1], [WRMASK
])
893 # V3D-specific instrinc for tile buffer color reads.
895 # The hardware requires that we read the samples and components of a pixel
896 # in order, so we cannot eliminate or remove any loads in a sequence.
898 # src[] = { render_target }
899 # BASE = sample index
900 load("tlb_color_v3d", [1], [BASE
, COMPONENT
], [])
902 # V3D-specific instrinc for per-sample tile buffer color writes.
904 # The driver backend needs to identify per-sample color writes and emit
905 # specific code for them.
907 # src[] = { value, render_target }
908 # BASE = sample index
909 store("tlb_sample_color_v3d", [1], [BASE
, COMPONENT
, TYPE
], [])
911 # V3D-specific intrinsic to load the number of layers attached to
912 # the target framebuffer
913 intrinsic("load_fb_layers_v3d", dest_comp
=1, flags
=[CAN_ELIMINATE
, CAN_REORDER
])
915 # Intel-specific query for loading from the brw_image_param struct passed
916 # into the shader as a uniform. The variable is a deref to the image
917 # variable. The const index specifies which of the six parameters to load.
918 intrinsic("image_deref_load_param_intel", src_comp
=[1], dest_comp
=0,
919 indices
=[BASE
], flags
=[CAN_ELIMINATE
, CAN_REORDER
])
920 image("load_raw_intel", src_comp
=[1], dest_comp
=0,
921 flags
=[CAN_ELIMINATE
])
922 image("store_raw_intel", src_comp
=[1, 0])
924 # Number of data items being operated on for a SIMD program.
925 system_value("simd_width_intel", 1)