nir: remove old assert
[mesa.git] / src / compiler / nir / nir_linking_helpers.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "nir.h"
25 #include "util/set.h"
26 #include "util/hash_table.h"
27
28 /* This file contains various little helpers for doing simple linking in
29 * NIR. Eventually, we'll probably want a full-blown varying packing
30 * implementation in here. Right now, it just deletes unused things.
31 */
32
33 /**
34 * Returns the bits in the inputs_read, outputs_written, or
35 * system_values_read bitfield corresponding to this variable.
36 */
37 static uint64_t
38 get_variable_io_mask(nir_variable *var, gl_shader_stage stage)
39 {
40 if (var->data.location < 0)
41 return 0;
42
43 unsigned location = var->data.patch ?
44 var->data.location - VARYING_SLOT_PATCH0 : var->data.location;
45
46 assert(var->data.mode == nir_var_shader_in ||
47 var->data.mode == nir_var_shader_out ||
48 var->data.mode == nir_var_system_value);
49 assert(var->data.location >= 0);
50
51 const struct glsl_type *type = var->type;
52 if (nir_is_per_vertex_io(var, stage)) {
53 assert(glsl_type_is_array(type));
54 type = glsl_get_array_element(type);
55 }
56
57 unsigned slots = glsl_count_attribute_slots(type, false);
58 return ((1ull << slots) - 1) << location;
59 }
60
61 static void
62 tcs_add_output_reads(nir_shader *shader, uint64_t *read, uint64_t *patches_read)
63 {
64 nir_foreach_function(function, shader) {
65 if (function->impl) {
66 nir_foreach_block(block, function->impl) {
67 nir_foreach_instr(instr, block) {
68 if (instr->type != nir_instr_type_intrinsic)
69 continue;
70
71 nir_intrinsic_instr *intrin_instr =
72 nir_instr_as_intrinsic(instr);
73 if (intrin_instr->intrinsic == nir_intrinsic_load_var &&
74 intrin_instr->variables[0]->var->data.mode ==
75 nir_var_shader_out) {
76
77 nir_variable *var = intrin_instr->variables[0]->var;
78 if (var->data.patch) {
79 patches_read[var->data.location_frac] |=
80 get_variable_io_mask(intrin_instr->variables[0]->var,
81 shader->info.stage);
82 } else {
83 read[var->data.location_frac] |=
84 get_variable_io_mask(intrin_instr->variables[0]->var,
85 shader->info.stage);
86 }
87 }
88 }
89 }
90 }
91 }
92 }
93
94 static bool
95 remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
96 uint64_t *used_by_other_stage,
97 uint64_t *used_by_other_stage_patches)
98 {
99 bool progress = false;
100 uint64_t *used;
101
102 nir_foreach_variable_safe(var, var_list) {
103 if (var->data.patch)
104 used = used_by_other_stage_patches;
105 else
106 used = used_by_other_stage;
107
108 if (var->data.location < VARYING_SLOT_VAR0 && var->data.location >= 0)
109 continue;
110
111 if (var->data.always_active_io)
112 continue;
113
114 uint64_t other_stage = used[var->data.location_frac];
115
116 if (!(other_stage & get_variable_io_mask(var, shader->info.stage))) {
117 /* This one is invalid, make it a global variable instead */
118 var->data.location = 0;
119 var->data.mode = nir_var_global;
120
121 exec_node_remove(&var->node);
122 exec_list_push_tail(&shader->globals, &var->node);
123
124 progress = true;
125 }
126 }
127
128 return progress;
129 }
130
131 bool
132 nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer)
133 {
134 assert(producer->info.stage != MESA_SHADER_FRAGMENT);
135 assert(consumer->info.stage != MESA_SHADER_VERTEX);
136
137 uint64_t read[4] = { 0 }, written[4] = { 0 };
138 uint64_t patches_read[4] = { 0 }, patches_written[4] = { 0 };
139
140 nir_foreach_variable(var, &producer->outputs) {
141 if (var->data.patch) {
142 patches_written[var->data.location_frac] |=
143 get_variable_io_mask(var, producer->info.stage);
144 } else {
145 written[var->data.location_frac] |=
146 get_variable_io_mask(var, producer->info.stage);
147 }
148 }
149
150 nir_foreach_variable(var, &consumer->inputs) {
151 if (var->data.patch) {
152 patches_read[var->data.location_frac] |=
153 get_variable_io_mask(var, consumer->info.stage);
154 } else {
155 read[var->data.location_frac] |=
156 get_variable_io_mask(var, consumer->info.stage);
157 }
158 }
159
160 /* Each TCS invocation can read data written by other TCS invocations,
161 * so even if the outputs are not used by the TES we must also make
162 * sure they are not read by the TCS before demoting them to globals.
163 */
164 if (producer->info.stage == MESA_SHADER_TESS_CTRL)
165 tcs_add_output_reads(producer, read, patches_read);
166
167 bool progress = false;
168 progress = remove_unused_io_vars(producer, &producer->outputs, read,
169 patches_read);
170
171 progress = remove_unused_io_vars(consumer, &consumer->inputs, written,
172 patches_written) || progress;
173
174 return progress;
175 }
176
177 static uint8_t
178 get_interp_type(nir_variable *var, bool default_to_smooth_interp)
179 {
180 if (var->data.interpolation != INTERP_MODE_NONE)
181 return var->data.interpolation;
182 else if (default_to_smooth_interp)
183 return INTERP_MODE_SMOOTH;
184 else
185 return INTERP_MODE_NONE;
186 }
187
188 #define INTERPOLATE_LOC_SAMPLE 0
189 #define INTERPOLATE_LOC_CENTROID 1
190 #define INTERPOLATE_LOC_CENTER 2
191
192 static uint8_t
193 get_interp_loc(nir_variable *var)
194 {
195 if (var->data.sample)
196 return INTERPOLATE_LOC_SAMPLE;
197 else if (var->data.centroid)
198 return INTERPOLATE_LOC_CENTROID;
199 else
200 return INTERPOLATE_LOC_CENTER;
201 }
202
203 static void
204 get_slot_component_masks_and_interp_types(struct exec_list *var_list,
205 uint8_t *comps,
206 uint8_t *interp_type,
207 uint8_t *interp_loc,
208 gl_shader_stage stage,
209 bool default_to_smooth_interp)
210 {
211 nir_foreach_variable_safe(var, var_list) {
212 assert(var->data.location >= 0);
213
214 /* Only remap things that aren't built-ins.
215 * TODO: add TES patch support.
216 */
217 if (var->data.location >= VARYING_SLOT_VAR0 &&
218 var->data.location - VARYING_SLOT_VAR0 < 32) {
219
220 const struct glsl_type *type = var->type;
221 if (nir_is_per_vertex_io(var, stage)) {
222 assert(glsl_type_is_array(type));
223 type = glsl_get_array_element(type);
224 }
225
226 unsigned location = var->data.location - VARYING_SLOT_VAR0;
227 unsigned elements =
228 glsl_get_vector_elements(glsl_without_array(type));
229
230 bool dual_slot = glsl_type_is_dual_slot(glsl_without_array(type));
231 unsigned slots = glsl_count_attribute_slots(type, false);
232 unsigned comps_slot2 = 0;
233 for (unsigned i = 0; i < slots; i++) {
234 interp_type[location + i] =
235 get_interp_type(var, default_to_smooth_interp);
236 interp_loc[location + i] = get_interp_loc(var);
237
238 if (dual_slot) {
239 if (i & 1) {
240 comps[location + i] |= ((1 << comps_slot2) - 1);
241 } else {
242 unsigned num_comps = 4 - var->data.location_frac;
243 comps_slot2 = (elements * 2) - num_comps;
244
245 /* Assume ARB_enhanced_layouts packing rules for doubles */
246 assert(var->data.location_frac == 0 ||
247 var->data.location_frac == 2);
248 assert(comps_slot2 <= 4);
249
250 comps[location + i] |=
251 ((1 << num_comps) - 1) << var->data.location_frac;
252 }
253 } else {
254 comps[location + i] |=
255 ((1 << elements) - 1) << var->data.location_frac;
256 }
257 }
258 }
259 }
260 }
261
262 struct varying_loc
263 {
264 uint8_t component;
265 uint32_t location;
266 };
267
268 static void
269 remap_slots_and_components(struct exec_list *var_list, gl_shader_stage stage,
270 struct varying_loc (*remap)[4],
271 uint64_t *slots_used, uint64_t *out_slots_read)
272 {
273 uint64_t out_slots_read_tmp = 0;
274
275 /* We don't touch builtins so just copy the bitmask */
276 uint64_t slots_used_tmp =
277 *slots_used & (((uint64_t)1 << (VARYING_SLOT_VAR0 - 1)) - 1);
278
279 nir_foreach_variable(var, var_list) {
280 assert(var->data.location >= 0);
281
282 /* Only remap things that aren't built-ins */
283 if (var->data.location >= VARYING_SLOT_VAR0 &&
284 var->data.location - VARYING_SLOT_VAR0 < 32) {
285 assert(var->data.location - VARYING_SLOT_VAR0 < 32);
286
287 const struct glsl_type *type = var->type;
288 if (nir_is_per_vertex_io(var, stage)) {
289 assert(glsl_type_is_array(type));
290 type = glsl_get_array_element(type);
291 }
292
293 unsigned num_slots = glsl_count_attribute_slots(type, false);
294 bool used_across_stages = false;
295 bool outputs_read = false;
296
297 unsigned location = var->data.location - VARYING_SLOT_VAR0;
298 struct varying_loc *new_loc = &remap[location][var->data.location_frac];
299
300 uint64_t slots = (((uint64_t)1 << num_slots) - 1) << var->data.location;
301 if (slots & *slots_used)
302 used_across_stages = true;
303
304 if (slots & *out_slots_read)
305 outputs_read = true;
306
307 if (new_loc->location) {
308 var->data.location = new_loc->location;
309 var->data.location_frac = new_loc->component;
310 }
311
312 if (var->data.always_active_io) {
313 /* We can't apply link time optimisations (specifically array
314 * splitting) to these so we need to copy the existing mask
315 * otherwise we will mess up the mask for things like partially
316 * marked arrays.
317 */
318 if (used_across_stages) {
319 slots_used_tmp |=
320 *slots_used & (((uint64_t)1 << num_slots) - 1) << var->data.location;
321 }
322
323 if (outputs_read) {
324 out_slots_read_tmp |=
325 *out_slots_read & (((uint64_t)1 << num_slots) - 1) << var->data.location;
326 }
327
328 } else {
329 for (unsigned i = 0; i < num_slots; i++) {
330 if (used_across_stages)
331 slots_used_tmp |= (uint64_t)1 << (var->data.location + i);
332
333 if (outputs_read)
334 out_slots_read_tmp |= (uint64_t)1 << (var->data.location + i);
335 }
336 }
337 }
338 }
339
340 *slots_used = slots_used_tmp;
341 *out_slots_read = out_slots_read_tmp;
342 }
343
344 /* If there are empty components in the slot compact the remaining components
345 * as close to component 0 as possible. This will make it easier to fill the
346 * empty components with components from a different slot in a following pass.
347 */
348 static void
349 compact_components(nir_shader *producer, nir_shader *consumer, uint8_t *comps,
350 uint8_t *interp_type, uint8_t *interp_loc,
351 bool default_to_smooth_interp)
352 {
353 struct exec_list *input_list = &consumer->inputs;
354 struct exec_list *output_list = &producer->outputs;
355 struct varying_loc remap[32][4] = {{{0}, {0}}};
356
357 /* Create a cursor for each interpolation type */
358 unsigned cursor[4] = {0};
359
360 /* We only need to pass over one stage and we choose the consumer as it seems
361 * to cause a larger reduction in instruction counts (tested on i965).
362 */
363 nir_foreach_variable(var, input_list) {
364
365 /* Only remap things that aren't builtins.
366 * TODO: add TES patch support.
367 */
368 if (var->data.location >= VARYING_SLOT_VAR0 &&
369 var->data.location - VARYING_SLOT_VAR0 < 32) {
370
371 /* We can't repack xfb varyings. */
372 if (var->data.always_active_io)
373 continue;
374
375 const struct glsl_type *type = var->type;
376 if (nir_is_per_vertex_io(var, consumer->info.stage)) {
377 assert(glsl_type_is_array(type));
378 type = glsl_get_array_element(type);
379 }
380
381 /* Skip types that require more complex packing handling.
382 * TODO: add support for these types.
383 */
384 if (glsl_type_is_array(type) ||
385 glsl_type_is_dual_slot(type) ||
386 glsl_type_is_matrix(type) ||
387 glsl_type_is_struct(type) ||
388 glsl_type_is_64bit(type))
389 continue;
390
391 /* We ignore complex types above and all other vector types should
392 * have been split into scalar variables by the lower_io_to_scalar
393 * pass. The only exeption should by OpenGL xfb varyings.
394 */
395 if (glsl_get_vector_elements(type) != 1)
396 continue;
397
398 unsigned location = var->data.location - VARYING_SLOT_VAR0;
399 uint8_t used_comps = comps[location];
400
401 /* If there are no empty components there is nothing more for us to do.
402 */
403 if (used_comps == 0xf)
404 continue;
405
406 bool found_new_offset = false;
407 uint8_t interp = get_interp_type(var, default_to_smooth_interp);
408 for (; cursor[interp] < 32; cursor[interp]++) {
409 uint8_t cursor_used_comps = comps[cursor[interp]];
410
411 /* We couldn't find anywhere to pack the varying continue on. */
412 if (cursor[interp] == location &&
413 (var->data.location_frac == 0 ||
414 cursor_used_comps & ((1 << (var->data.location_frac)) - 1)))
415 break;
416
417 /* We can only pack varyings with matching interpolation types */
418 if (interp_type[cursor[interp]] != interp)
419 continue;
420
421 /* Interpolation loc must match also.
422 * TODO: i965 can handle these if they don't match, but the
423 * radeonsi nir backend handles everything as vec4s and so expects
424 * this to be the same for all components. We could make this
425 * check driver specfific or drop it if NIR ever become the only
426 * radeonsi backend.
427 */
428 if (interp_loc[cursor[interp]] != get_interp_loc(var))
429 continue;
430
431 /* If the slot is empty just skip it for now, compact_var_list()
432 * can be called after this function to remove empty slots for us.
433 * TODO: finish implementing compact_var_list() requires array and
434 * matrix splitting.
435 */
436 if (!cursor_used_comps)
437 continue;
438
439 uint8_t unused_comps = ~cursor_used_comps;
440
441 for (unsigned i = 0; i < 4; i++) {
442 uint8_t new_var_comps = 1 << i;
443 if (unused_comps & new_var_comps) {
444 remap[location][var->data.location_frac].component = i;
445 remap[location][var->data.location_frac].location =
446 cursor[interp] + VARYING_SLOT_VAR0;
447
448 found_new_offset = true;
449
450 /* Turn off the mask for the component we are remapping */
451 if (comps[location] & 1 << var->data.location_frac) {
452 comps[location] ^= 1 << var->data.location_frac;
453 comps[cursor[interp]] |= new_var_comps;
454 }
455 break;
456 }
457 }
458
459 if (found_new_offset)
460 break;
461 }
462 }
463 }
464
465 uint64_t zero = 0;
466 remap_slots_and_components(input_list, consumer->info.stage, remap,
467 &consumer->info.inputs_read, &zero);
468 remap_slots_and_components(output_list, producer->info.stage, remap,
469 &producer->info.outputs_written,
470 &producer->info.outputs_read);
471 }
472
473 /* We assume that this has been called more-or-less directly after
474 * remove_unused_varyings. At this point, all of the varyings that we
475 * aren't going to be using have been completely removed and the
476 * inputs_read and outputs_written fields in nir_shader_info reflect
477 * this. Therefore, the total set of valid slots is the OR of the two
478 * sets of varyings; this accounts for varyings which one side may need
479 * to read/write even if the other doesn't. This can happen if, for
480 * instance, an array is used indirectly from one side causing it to be
481 * unsplittable but directly from the other.
482 */
483 void
484 nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
485 bool default_to_smooth_interp)
486 {
487 assert(producer->info.stage != MESA_SHADER_FRAGMENT);
488 assert(consumer->info.stage != MESA_SHADER_VERTEX);
489
490 uint8_t comps[32] = {0};
491 uint8_t interp_type[32] = {0};
492 uint8_t interp_loc[32] = {0};
493
494 get_slot_component_masks_and_interp_types(&producer->outputs, comps,
495 interp_type, interp_loc,
496 producer->info.stage,
497 default_to_smooth_interp);
498 get_slot_component_masks_and_interp_types(&consumer->inputs, comps,
499 interp_type, interp_loc,
500 consumer->info.stage,
501 default_to_smooth_interp);
502
503 compact_components(producer, consumer, comps, interp_type, interp_loc,
504 default_to_smooth_interp);
505 }