nir: Add a pass to repair SSA form
[mesa.git] / src / compiler / nir / nir_lower_atomics.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "compiler/glsl/ir_uniform.h"
29 #include "nir.h"
30 #include "main/config.h"
31 #include <assert.h>
32
33 typedef struct {
34 const struct gl_shader_program *shader_program;
35 nir_shader *shader;
36 } lower_atomic_state;
37
38 /*
39 * replace atomic counter intrinsics that use a variable with intrinsics
40 * that directly store the buffer index and byte offset
41 */
42
43 static void
44 lower_instr(nir_intrinsic_instr *instr,
45 lower_atomic_state *state)
46 {
47 nir_intrinsic_op op;
48 switch (instr->intrinsic) {
49 case nir_intrinsic_atomic_counter_read_var:
50 op = nir_intrinsic_atomic_counter_read;
51 break;
52
53 case nir_intrinsic_atomic_counter_inc_var:
54 op = nir_intrinsic_atomic_counter_inc;
55 break;
56
57 case nir_intrinsic_atomic_counter_dec_var:
58 op = nir_intrinsic_atomic_counter_dec;
59 break;
60
61 default:
62 return;
63 }
64
65 if (instr->variables[0]->var->data.mode != nir_var_uniform &&
66 instr->variables[0]->var->data.mode != nir_var_shader_storage &&
67 instr->variables[0]->var->data.mode != nir_var_shared)
68 return; /* atomics passed as function arguments can't be lowered */
69
70 void *mem_ctx = ralloc_parent(instr);
71 unsigned uniform_loc = instr->variables[0]->var->data.location;
72
73 nir_intrinsic_instr *new_instr = nir_intrinsic_instr_create(mem_ctx, op);
74 nir_intrinsic_set_base(new_instr,
75 state->shader_program->UniformStorage[uniform_loc].opaque[state->shader->stage].index);
76
77 nir_load_const_instr *offset_const = nir_load_const_instr_create(mem_ctx, 1);
78 offset_const->value.u32[0] = instr->variables[0]->var->data.offset;
79
80 nir_instr_insert_before(&instr->instr, &offset_const->instr);
81
82 nir_ssa_def *offset_def = &offset_const->def;
83
84 nir_deref *tail = &instr->variables[0]->deref;
85 while (tail->child != NULL) {
86 assert(tail->child->deref_type == nir_deref_type_array);
87 nir_deref_array *deref_array = nir_deref_as_array(tail->child);
88 tail = tail->child;
89
90 unsigned child_array_elements = tail->child != NULL ?
91 glsl_get_aoa_size(tail->type) : 1;
92
93 offset_const->value.u32[0] += deref_array->base_offset *
94 child_array_elements * ATOMIC_COUNTER_SIZE;
95
96 if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
97 nir_load_const_instr *atomic_counter_size =
98 nir_load_const_instr_create(mem_ctx, 1);
99 atomic_counter_size->value.u32[0] = child_array_elements * ATOMIC_COUNTER_SIZE;
100 nir_instr_insert_before(&instr->instr, &atomic_counter_size->instr);
101
102 nir_alu_instr *mul = nir_alu_instr_create(mem_ctx, nir_op_imul);
103 nir_ssa_dest_init(&mul->instr, &mul->dest.dest, 1, 32, NULL);
104 mul->dest.write_mask = 0x1;
105 nir_src_copy(&mul->src[0].src, &deref_array->indirect, mul);
106 mul->src[1].src.is_ssa = true;
107 mul->src[1].src.ssa = &atomic_counter_size->def;
108 nir_instr_insert_before(&instr->instr, &mul->instr);
109
110 nir_alu_instr *add = nir_alu_instr_create(mem_ctx, nir_op_iadd);
111 nir_ssa_dest_init(&add->instr, &add->dest.dest, 1, 32, NULL);
112 add->dest.write_mask = 0x1;
113 add->src[0].src.is_ssa = true;
114 add->src[0].src.ssa = &mul->dest.dest.ssa;
115 add->src[1].src.is_ssa = true;
116 add->src[1].src.ssa = offset_def;
117 nir_instr_insert_before(&instr->instr, &add->instr);
118
119 offset_def = &add->dest.dest.ssa;
120 }
121 }
122
123 new_instr->src[0].is_ssa = true;
124 new_instr->src[0].ssa = offset_def;
125
126 if (instr->dest.is_ssa) {
127 nir_ssa_dest_init(&new_instr->instr, &new_instr->dest,
128 instr->dest.ssa.num_components, 32, NULL);
129 nir_ssa_def_rewrite_uses(&instr->dest.ssa,
130 nir_src_for_ssa(&new_instr->dest.ssa));
131 } else {
132 nir_dest_copy(&new_instr->dest, &instr->dest, mem_ctx);
133 }
134
135 nir_instr_insert_before(&instr->instr, &new_instr->instr);
136 nir_instr_remove(&instr->instr);
137 }
138
139 static bool
140 lower_block(nir_block *block, void *state)
141 {
142 nir_foreach_instr_safe(block, instr) {
143 if (instr->type == nir_instr_type_intrinsic)
144 lower_instr(nir_instr_as_intrinsic(instr),
145 (lower_atomic_state *) state);
146 }
147
148 return true;
149 }
150
151 void
152 nir_lower_atomics(nir_shader *shader,
153 const struct gl_shader_program *shader_program)
154 {
155 lower_atomic_state state = {
156 .shader = shader,
157 .shader_program = shader_program,
158 };
159
160 nir_foreach_function(shader, function) {
161 if (function->impl) {
162 nir_foreach_block(function->impl, lower_block, (void *) &state);
163 nir_metadata_preserve(function->impl, nir_metadata_block_index |
164 nir_metadata_dominance);
165 }
166 }
167 }