nir: silence three compiler warnings seen with MinGW
[mesa.git] / src / compiler / nir / nir_lower_int_to_float.c
1 /*
2 * Copyright © 2018 Intel Corporation
3 * Copyright © 2019 Vasily Khoruzhick <anarsoul@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "nir.h"
26 #include "nir_builder.h"
27
28 static bool
29 assert_ssa_def_is_not_int(nir_ssa_def *def, void *arg)
30 {
31 MAYBE_UNUSED BITSET_WORD *int_types = arg;
32 assert(!BITSET_TEST(int_types, def->index));
33 return true;
34 }
35
36 static bool
37 rewrite_bool_ssa_def_to_float(nir_ssa_def *def, void *_progress)
38 {
39 bool *progress = _progress;
40 if (def->bit_size == 1) {
41 def->bit_size = 32;
42 *progress = true;
43 }
44 return true;
45 }
46
47 static bool
48 lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
49 {
50 const nir_op_info *op_info = &nir_op_infos[alu->op];
51
52 b->cursor = nir_before_instr(&alu->instr);
53
54 /* Replacement SSA value */
55 nir_ssa_def *rep = NULL;
56 switch (alu->op) {
57 case nir_op_vec2:
58 case nir_op_vec3:
59 case nir_op_vec4:
60 /* These we expect to have integers or booleans but the opcode doesn't change */
61 break;
62
63 case nir_op_b2f32: alu->op = nir_op_mov; break;
64 case nir_op_b2i32: alu->op = nir_op_mov; break;
65 case nir_op_i2f32: alu->op = nir_op_mov; break;
66 case nir_op_f2i32: alu->op = nir_op_mov; break;
67 case nir_op_f2i1:
68 case nir_op_f2b1:
69 case nir_op_i2b1:
70 rep = nir_sne(b, nir_ssa_for_alu_src(b, alu, 0),
71 nir_imm_float(b, 0));
72 break;
73
74 case nir_op_flt: alu->op = nir_op_slt; break;
75 case nir_op_fge: alu->op = nir_op_sge; break;
76 case nir_op_feq: alu->op = nir_op_seq; break;
77 case nir_op_fne: alu->op = nir_op_sne; break;
78 case nir_op_ilt: alu->op = nir_op_slt; break;
79 case nir_op_ige: alu->op = nir_op_sge; break;
80 case nir_op_ieq: alu->op = nir_op_seq; break;
81 case nir_op_ine: alu->op = nir_op_sne; break;
82 case nir_op_ult: alu->op = nir_op_slt; break;
83 case nir_op_uge: alu->op = nir_op_sge; break;
84 case nir_op_ineg: alu->op = nir_op_fneg; break;
85
86 case nir_op_ball_fequal2: alu->op = nir_op_fall_equal2; break;
87 case nir_op_ball_fequal3: alu->op = nir_op_fall_equal3; break;
88 case nir_op_ball_fequal4: alu->op = nir_op_fall_equal4; break;
89 case nir_op_bany_fnequal2: alu->op = nir_op_fany_nequal2; break;
90 case nir_op_bany_fnequal3: alu->op = nir_op_fany_nequal3; break;
91 case nir_op_bany_fnequal4: alu->op = nir_op_fany_nequal4; break;
92 case nir_op_ball_iequal2: alu->op = nir_op_fall_equal2; break;
93 case nir_op_ball_iequal3: alu->op = nir_op_fall_equal3; break;
94 case nir_op_ball_iequal4: alu->op = nir_op_fall_equal4; break;
95 case nir_op_bany_inequal2: alu->op = nir_op_fany_nequal2; break;
96 case nir_op_bany_inequal3: alu->op = nir_op_fany_nequal3; break;
97 case nir_op_bany_inequal4: alu->op = nir_op_fany_nequal4; break;
98
99 case nir_op_bcsel: alu->op = nir_op_fcsel; break;
100
101 case nir_op_iadd: alu->op = nir_op_fadd; break;
102 case nir_op_isub: alu->op = nir_op_fsub; break;
103 case nir_op_imul: alu->op = nir_op_fmul; break;
104 case nir_op_iand: alu->op = nir_op_fmul; break;
105 case nir_op_ixor: alu->op = nir_op_sne; break;
106 case nir_op_ior: alu->op = nir_op_fmax; break;
107
108 case nir_op_idiv:
109 rep = nir_ftrunc(b, nir_fdiv(b,
110 nir_ssa_for_alu_src(b, alu, 0),
111 nir_ssa_for_alu_src(b, alu, 1)));
112 break;
113
114 case nir_op_inot:
115 rep = nir_seq(b, nir_ssa_for_alu_src(b, alu, 0),
116 nir_imm_float(b, 0));
117 break;
118
119 default:
120 assert(alu->dest.dest.ssa.bit_size > 1);
121 for (unsigned i = 0; i < op_info->num_inputs; i++)
122 assert(alu->src[i].src.ssa->bit_size > 1);
123 return false;
124 }
125
126 if (rep) {
127 /* We've emitted a replacement instruction */
128 nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, nir_src_for_ssa(rep));
129 nir_instr_remove(&alu->instr);
130 } else {
131 if (alu->dest.dest.ssa.bit_size == 1)
132 alu->dest.dest.ssa.bit_size = 32;
133 }
134
135 return true;
136 }
137
138 static bool
139 nir_lower_int_to_float_impl(nir_function_impl *impl)
140 {
141 bool progress = false;
142 BITSET_WORD *float_types = NULL, *int_types = NULL;
143
144 nir_builder b;
145 nir_builder_init(&b, impl);
146
147 nir_index_ssa_defs(impl);
148 float_types = calloc(BITSET_WORDS(impl->ssa_alloc),
149 sizeof(BITSET_WORD));
150 int_types = calloc(BITSET_WORDS(impl->ssa_alloc),
151 sizeof(BITSET_WORD));
152 nir_gather_ssa_types(impl, float_types, int_types);
153
154 nir_foreach_block(block, impl) {
155 nir_foreach_instr_safe(instr, block) {
156 switch (instr->type) {
157 case nir_instr_type_alu:
158 progress |= lower_alu_instr(&b, nir_instr_as_alu(instr));
159 break;
160
161 case nir_instr_type_load_const: {
162 nir_load_const_instr *load = nir_instr_as_load_const(instr);
163 if (load->def.bit_size == 1) {
164 for (unsigned i = 0; i < load->def.num_components; i++)
165 load->value[i].f32 = load->value[i].b ? 1.0 : 0.0;
166 load->def.bit_size = 32;
167 } else if (BITSET_TEST(int_types, load->def.index)) {
168 for (unsigned i = 0; i < load->def.num_components; i++)
169 load->value[i].f32 = load->value[i].i32;
170 }
171 break;
172 }
173
174 case nir_instr_type_intrinsic:
175 case nir_instr_type_ssa_undef:
176 case nir_instr_type_phi:
177 case nir_instr_type_tex:
178 nir_foreach_ssa_def(instr, rewrite_bool_ssa_def_to_float,
179 &progress);
180 break;
181
182 default:
183 nir_foreach_ssa_def(instr, assert_ssa_def_is_not_int, (void *)int_types);
184 break;
185 }
186 }
187 }
188
189 if (progress) {
190 nir_metadata_preserve(impl, nir_metadata_block_index |
191 nir_metadata_dominance);
192 }
193
194 free(float_types);
195 free(int_types);
196
197 return progress;
198 }
199
200 bool
201 nir_lower_int_to_float(nir_shader *shader)
202 {
203 bool progress = false;
204
205 nir_foreach_function(function, shader) {
206 if (function->impl && nir_lower_int_to_float_impl(function->impl))
207 progress = true;
208 }
209
210 return progress;
211 }