nir: add int_to_float lowering pass
[mesa.git] / src / compiler / nir / nir_lower_int_to_float.c
1 /*
2 * Copyright © 2018 Intel Corporation
3 * Copyright © 2019 Vasily Khoruzhick <anarsoul@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "nir.h"
26 #include "nir_builder.h"
27
28 static bool
29 assert_ssa_def_is_not_int(nir_ssa_def *def, void *arg)
30 {
31 BITSET_WORD *int_types = arg;
32 assert(!BITSET_TEST(int_types, def->index));
33 return true;
34 }
35
36 static bool
37 rewrite_bool_ssa_def_to_float(nir_ssa_def *def, void *_progress)
38 {
39 bool *progress = _progress;
40 if (def->bit_size == 1) {
41 def->bit_size = 32;
42 *progress = true;
43 }
44 return true;
45 }
46
47 static bool
48 lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
49 {
50 const nir_op_info *op_info = &nir_op_infos[alu->op];
51
52 b->cursor = nir_before_instr(&alu->instr);
53
54 /* Replacement SSA value */
55 nir_ssa_def *rep = NULL;
56 switch (alu->op) {
57 case nir_op_vec2:
58 case nir_op_vec3:
59 case nir_op_vec4:
60 /* These we expect to have integers or booleans but the opcode doesn't change */
61 break;
62
63 case nir_op_b2f32: alu->op = nir_op_fmov; break;
64 case nir_op_b2i32: alu->op = nir_op_fmov; break;
65 case nir_op_i2f32: alu->op = nir_op_fmov; break;
66 case nir_op_f2i32: alu->op = nir_op_fmov; break;
67 case nir_op_f2i1:
68 case nir_op_f2b1:
69 case nir_op_i2b1:
70 rep = nir_sne(b, nir_ssa_for_alu_src(b, alu, 0),
71 nir_imm_float(b, 0));
72 break;
73
74 case nir_op_flt: alu->op = nir_op_slt; break;
75 case nir_op_fge: alu->op = nir_op_sge; break;
76 case nir_op_feq: alu->op = nir_op_seq; break;
77 case nir_op_fne: alu->op = nir_op_sne; break;
78 case nir_op_ilt: alu->op = nir_op_slt; break;
79 case nir_op_ige: alu->op = nir_op_sge; break;
80 case nir_op_ieq: alu->op = nir_op_seq; break;
81 case nir_op_ine: alu->op = nir_op_sne; break;
82 case nir_op_ult: alu->op = nir_op_slt; break;
83 case nir_op_uge: alu->op = nir_op_sge; break;
84 case nir_op_ineg: alu->op = nir_op_fneg; break;
85
86 case nir_op_ball_fequal2: alu->op = nir_op_fall_equal2; break;
87 case nir_op_ball_fequal3: alu->op = nir_op_fall_equal3; break;
88 case nir_op_ball_fequal4: alu->op = nir_op_fall_equal4; break;
89 case nir_op_bany_fnequal2: alu->op = nir_op_fany_nequal2; break;
90 case nir_op_bany_fnequal3: alu->op = nir_op_fany_nequal3; break;
91 case nir_op_bany_fnequal4: alu->op = nir_op_fany_nequal4; break;
92 case nir_op_ball_iequal2: alu->op = nir_op_fall_equal2; break;
93 case nir_op_ball_iequal3: alu->op = nir_op_fall_equal3; break;
94 case nir_op_ball_iequal4: alu->op = nir_op_fall_equal4; break;
95 case nir_op_bany_inequal2: alu->op = nir_op_fany_nequal2; break;
96 case nir_op_bany_inequal3: alu->op = nir_op_fany_nequal3; break;
97 case nir_op_bany_inequal4: alu->op = nir_op_fany_nequal4; break;
98
99 case nir_op_bcsel: alu->op = nir_op_fcsel; break;
100
101 case nir_op_iadd: alu->op = nir_op_fadd; break;
102 case nir_op_isub: alu->op = nir_op_fsub; break;
103 case nir_op_imul: alu->op = nir_op_fmul; break;
104 case nir_op_imov: alu->op = nir_op_fmov; break;
105 case nir_op_iand: alu->op = nir_op_fmul; break;
106 case nir_op_ixor: alu->op = nir_op_sne; break;
107 case nir_op_ior: alu->op = nir_op_fmax; break;
108
109 case nir_op_idiv:
110 rep = nir_ftrunc(b, nir_fdiv(b,
111 nir_ssa_for_alu_src(b, alu, 0),
112 nir_ssa_for_alu_src(b, alu, 1)));
113 break;
114
115 case nir_op_inot:
116 rep = nir_seq(b, nir_ssa_for_alu_src(b, alu, 0),
117 nir_imm_float(b, 0));
118 break;
119
120 default:
121 assert(alu->dest.dest.ssa.bit_size > 1);
122 for (unsigned i = 0; i < op_info->num_inputs; i++)
123 assert(alu->src[i].src.ssa->bit_size > 1);
124 return false;
125 }
126
127 if (rep) {
128 /* We've emitted a replacement instruction */
129 nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, nir_src_for_ssa(rep));
130 nir_instr_remove(&alu->instr);
131 } else {
132 if (alu->dest.dest.ssa.bit_size == 1)
133 alu->dest.dest.ssa.bit_size = 32;
134 }
135
136 return true;
137 }
138
139 static bool
140 nir_lower_int_to_float_impl(nir_function_impl *impl)
141 {
142 bool progress = false;
143 BITSET_WORD *float_types = NULL, *int_types = NULL;
144
145 nir_builder b;
146 nir_builder_init(&b, impl);
147
148 nir_index_ssa_defs(impl);
149 float_types = calloc(BITSET_WORDS(impl->ssa_alloc),
150 sizeof(BITSET_WORD));
151 int_types = calloc(BITSET_WORDS(impl->ssa_alloc),
152 sizeof(BITSET_WORD));
153 nir_gather_ssa_types(impl, float_types, int_types);
154
155 nir_foreach_block(block, impl) {
156 nir_foreach_instr_safe(instr, block) {
157 switch (instr->type) {
158 case nir_instr_type_alu:
159 progress |= lower_alu_instr(&b, nir_instr_as_alu(instr));
160 break;
161
162 case nir_instr_type_load_const: {
163 nir_load_const_instr *load = nir_instr_as_load_const(instr);
164 if (load->def.bit_size == 1) {
165 for (unsigned i = 0; i < load->def.num_components; i++)
166 load->value[i].f32 = load->value[i].b ? 1.0 : 0.0;
167 load->def.bit_size = 32;
168 } else if (BITSET_TEST(int_types, load->def.index)) {
169 for (unsigned i = 0; i < load->def.num_components; i++)
170 load->value[i].f32 = load->value[i].i32;
171 }
172 break;
173 }
174
175 case nir_instr_type_intrinsic:
176 case nir_instr_type_ssa_undef:
177 case nir_instr_type_phi:
178 case nir_instr_type_tex:
179 nir_foreach_ssa_def(instr, rewrite_bool_ssa_def_to_float,
180 &progress);
181 break;
182
183 default:
184 nir_foreach_ssa_def(instr, assert_ssa_def_is_not_int, (void *)int_types);
185 break;
186 }
187 }
188 }
189
190 if (progress) {
191 nir_metadata_preserve(impl, nir_metadata_block_index |
192 nir_metadata_dominance);
193 }
194
195 free(float_types);
196 free(int_types);
197
198 return progress;
199 }
200
201 bool
202 nir_lower_int_to_float(nir_shader *shader)
203 {
204 bool progress = false;
205
206 nir_foreach_function(function, shader) {
207 if (function->impl && nir_lower_int_to_float_impl(function->impl))
208 progress = true;
209 }
210
211 return progress;
212 }