2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
25 * Jason Ekstrand (jason@jlekstrand.net)
30 * This lowering pass converts references to input/output variables with
31 * loads/stores to actual input/output intrinsics.
35 #include "nir_builder.h"
36 #include "nir_deref.h"
38 #include "util/u_math.h"
40 struct lower_io_state
{
43 int (*type_size
)(const struct glsl_type
*type
, bool);
44 nir_variable_mode modes
;
45 nir_lower_io_options options
;
48 static nir_intrinsic_op
49 ssbo_atomic_for_deref(nir_intrinsic_op deref_op
)
52 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_ssbo_##O;
69 unreachable("Invalid SSBO atomic");
73 static nir_intrinsic_op
74 global_atomic_for_deref(nir_intrinsic_op deref_op
)
77 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_global_##O;
94 unreachable("Invalid SSBO atomic");
98 static nir_intrinsic_op
99 shared_atomic_for_deref(nir_intrinsic_op deref_op
)
102 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_shared_##O;
116 OP(atomic_fcomp_swap
)
119 unreachable("Invalid shared atomic");
124 nir_assign_var_locations(nir_shader
*shader
, nir_variable_mode mode
,
126 int (*type_size
)(const struct glsl_type
*, bool))
128 unsigned location
= 0;
130 nir_foreach_variable_with_modes(var
, shader
, mode
) {
131 var
->data
.driver_location
= location
;
132 bool bindless_type_size
= var
->data
.mode
== nir_var_shader_in
||
133 var
->data
.mode
== nir_var_shader_out
||
135 location
+= type_size(var
->type
, bindless_type_size
);
142 * Return true if the given variable is a per-vertex input/output array.
143 * (such as geometry shader inputs).
146 nir_is_per_vertex_io(const nir_variable
*var
, gl_shader_stage stage
)
148 if (var
->data
.patch
|| !glsl_type_is_array(var
->type
))
151 if (var
->data
.mode
== nir_var_shader_in
)
152 return stage
== MESA_SHADER_GEOMETRY
||
153 stage
== MESA_SHADER_TESS_CTRL
||
154 stage
== MESA_SHADER_TESS_EVAL
;
156 if (var
->data
.mode
== nir_var_shader_out
)
157 return stage
== MESA_SHADER_TESS_CTRL
;
162 static unsigned get_number_of_slots(struct lower_io_state
*state
,
163 const nir_variable
*var
)
165 const struct glsl_type
*type
= var
->type
;
167 if (nir_is_per_vertex_io(var
, state
->builder
.shader
->info
.stage
)) {
168 assert(glsl_type_is_array(type
));
169 type
= glsl_get_array_element(type
);
172 return state
->type_size(type
, var
->data
.bindless
);
176 get_io_offset(nir_builder
*b
, nir_deref_instr
*deref
,
177 nir_ssa_def
**vertex_index
,
178 int (*type_size
)(const struct glsl_type
*, bool),
179 unsigned *component
, bool bts
)
182 nir_deref_path_init(&path
, deref
, NULL
);
184 assert(path
.path
[0]->deref_type
== nir_deref_type_var
);
185 nir_deref_instr
**p
= &path
.path
[1];
187 /* For per-vertex input arrays (i.e. geometry shader inputs), keep the
188 * outermost array index separate. Process the rest normally.
190 if (vertex_index
!= NULL
) {
191 assert((*p
)->deref_type
== nir_deref_type_array
);
192 *vertex_index
= nir_ssa_for_src(b
, (*p
)->arr
.index
, 1);
196 if (path
.path
[0]->var
->data
.compact
) {
197 assert((*p
)->deref_type
== nir_deref_type_array
);
198 assert(glsl_type_is_scalar((*p
)->type
));
200 /* We always lower indirect dereferences for "compact" array vars. */
201 const unsigned index
= nir_src_as_uint((*p
)->arr
.index
);
202 const unsigned total_offset
= *component
+ index
;
203 const unsigned slot_offset
= total_offset
/ 4;
204 *component
= total_offset
% 4;
205 return nir_imm_int(b
, type_size(glsl_vec4_type(), bts
) * slot_offset
);
208 /* Just emit code and let constant-folding go to town */
209 nir_ssa_def
*offset
= nir_imm_int(b
, 0);
212 if ((*p
)->deref_type
== nir_deref_type_array
) {
213 unsigned size
= type_size((*p
)->type
, bts
);
216 nir_amul_imm(b
, nir_ssa_for_src(b
, (*p
)->arr
.index
, 1), size
);
218 offset
= nir_iadd(b
, offset
, mul
);
219 } else if ((*p
)->deref_type
== nir_deref_type_struct
) {
220 /* p starts at path[1], so this is safe */
221 nir_deref_instr
*parent
= *(p
- 1);
223 unsigned field_offset
= 0;
224 for (unsigned i
= 0; i
< (*p
)->strct
.index
; i
++) {
225 field_offset
+= type_size(glsl_get_struct_field(parent
->type
, i
), bts
);
227 offset
= nir_iadd_imm(b
, offset
, field_offset
);
229 unreachable("Unsupported deref type");
233 nir_deref_path_finish(&path
);
239 emit_load(struct lower_io_state
*state
,
240 nir_ssa_def
*vertex_index
, nir_variable
*var
, nir_ssa_def
*offset
,
241 unsigned component
, unsigned num_components
, unsigned bit_size
,
244 nir_builder
*b
= &state
->builder
;
245 const nir_shader
*nir
= b
->shader
;
246 nir_variable_mode mode
= var
->data
.mode
;
247 nir_ssa_def
*barycentric
= NULL
;
251 case nir_var_shader_in
:
252 if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
&&
253 nir
->options
->use_interpolated_input_intrinsics
&&
254 var
->data
.interpolation
!= INTERP_MODE_FLAT
) {
255 if (var
->data
.interpolation
== INTERP_MODE_EXPLICIT
) {
256 assert(vertex_index
!= NULL
);
257 op
= nir_intrinsic_load_input_vertex
;
259 assert(vertex_index
== NULL
);
261 nir_intrinsic_op bary_op
;
262 if (var
->data
.sample
||
263 (state
->options
& nir_lower_io_force_sample_interpolation
))
264 bary_op
= nir_intrinsic_load_barycentric_sample
;
265 else if (var
->data
.centroid
)
266 bary_op
= nir_intrinsic_load_barycentric_centroid
;
268 bary_op
= nir_intrinsic_load_barycentric_pixel
;
270 barycentric
= nir_load_barycentric(&state
->builder
, bary_op
,
271 var
->data
.interpolation
);
272 op
= nir_intrinsic_load_interpolated_input
;
275 op
= vertex_index
? nir_intrinsic_load_per_vertex_input
:
276 nir_intrinsic_load_input
;
279 case nir_var_shader_out
:
280 op
= vertex_index
? nir_intrinsic_load_per_vertex_output
:
281 nir_intrinsic_load_output
;
283 case nir_var_uniform
:
284 op
= nir_intrinsic_load_uniform
;
287 unreachable("Unknown variable mode");
290 nir_intrinsic_instr
*load
=
291 nir_intrinsic_instr_create(state
->builder
.shader
, op
);
292 load
->num_components
= num_components
;
294 nir_intrinsic_set_base(load
, var
->data
.driver_location
);
295 if (mode
== nir_var_shader_in
|| mode
== nir_var_shader_out
)
296 nir_intrinsic_set_component(load
, component
);
298 if (load
->intrinsic
== nir_intrinsic_load_uniform
)
299 nir_intrinsic_set_range(load
,
300 state
->type_size(var
->type
, var
->data
.bindless
));
302 if (load
->intrinsic
== nir_intrinsic_load_input
||
303 load
->intrinsic
== nir_intrinsic_load_input_vertex
||
304 load
->intrinsic
== nir_intrinsic_load_uniform
)
305 nir_intrinsic_set_type(load
, type
);
307 if (load
->intrinsic
!= nir_intrinsic_load_uniform
) {
308 nir_io_semantics semantics
= {0};
309 semantics
.location
= var
->data
.location
;
310 semantics
.num_slots
= get_number_of_slots(state
, var
);
311 semantics
.fb_fetch_output
= var
->data
.fb_fetch_output
;
312 nir_intrinsic_set_io_semantics(load
, semantics
);
316 load
->src
[0] = nir_src_for_ssa(vertex_index
);
317 load
->src
[1] = nir_src_for_ssa(offset
);
318 } else if (barycentric
) {
319 load
->src
[0] = nir_src_for_ssa(barycentric
);
320 load
->src
[1] = nir_src_for_ssa(offset
);
322 load
->src
[0] = nir_src_for_ssa(offset
);
325 nir_ssa_dest_init(&load
->instr
, &load
->dest
,
326 num_components
, bit_size
, NULL
);
327 nir_builder_instr_insert(b
, &load
->instr
);
329 return &load
->dest
.ssa
;
333 lower_load(nir_intrinsic_instr
*intrin
, struct lower_io_state
*state
,
334 nir_ssa_def
*vertex_index
, nir_variable
*var
, nir_ssa_def
*offset
,
335 unsigned component
, const struct glsl_type
*type
)
337 assert(intrin
->dest
.is_ssa
);
338 if (intrin
->dest
.ssa
.bit_size
== 64 &&
339 (state
->options
& nir_lower_io_lower_64bit_to_32
)) {
340 nir_builder
*b
= &state
->builder
;
342 const unsigned slot_size
= state
->type_size(glsl_dvec_type(2), false);
344 nir_ssa_def
*comp64
[4];
345 assert(component
== 0 || component
== 2);
346 unsigned dest_comp
= 0;
347 while (dest_comp
< intrin
->dest
.ssa
.num_components
) {
348 const unsigned num_comps
=
349 MIN2(intrin
->dest
.ssa
.num_components
- dest_comp
,
350 (4 - component
) / 2);
352 nir_ssa_def
*data32
=
353 emit_load(state
, vertex_index
, var
, offset
, component
,
354 num_comps
* 2, 32, nir_type_uint32
);
355 for (unsigned i
= 0; i
< num_comps
; i
++) {
356 comp64
[dest_comp
+ i
] =
357 nir_pack_64_2x32(b
, nir_channels(b
, data32
, 3 << (i
* 2)));
360 /* Only the first store has a component offset */
362 dest_comp
+= num_comps
;
363 offset
= nir_iadd_imm(b
, offset
, slot_size
);
366 return nir_vec(b
, comp64
, intrin
->dest
.ssa
.num_components
);
367 } else if (intrin
->dest
.ssa
.bit_size
== 1) {
368 /* Booleans are 32-bit */
369 assert(glsl_type_is_boolean(type
));
370 return nir_b2b1(&state
->builder
,
371 emit_load(state
, vertex_index
, var
, offset
, component
,
372 intrin
->dest
.ssa
.num_components
, 32,
375 return emit_load(state
, vertex_index
, var
, offset
, component
,
376 intrin
->dest
.ssa
.num_components
,
377 intrin
->dest
.ssa
.bit_size
,
378 nir_get_nir_type_for_glsl_type(type
));
383 emit_store(struct lower_io_state
*state
, nir_ssa_def
*data
,
384 nir_ssa_def
*vertex_index
, nir_variable
*var
, nir_ssa_def
*offset
,
385 unsigned component
, unsigned num_components
,
386 nir_component_mask_t write_mask
, nir_alu_type type
)
388 nir_builder
*b
= &state
->builder
;
389 nir_variable_mode mode
= var
->data
.mode
;
391 assert(mode
== nir_var_shader_out
);
393 op
= vertex_index
? nir_intrinsic_store_per_vertex_output
:
394 nir_intrinsic_store_output
;
396 nir_intrinsic_instr
*store
=
397 nir_intrinsic_instr_create(state
->builder
.shader
, op
);
398 store
->num_components
= num_components
;
400 store
->src
[0] = nir_src_for_ssa(data
);
402 nir_intrinsic_set_base(store
, var
->data
.driver_location
);
404 if (mode
== nir_var_shader_out
)
405 nir_intrinsic_set_component(store
, component
);
407 if (store
->intrinsic
== nir_intrinsic_store_output
)
408 nir_intrinsic_set_type(store
, type
);
410 nir_intrinsic_set_write_mask(store
, write_mask
);
413 store
->src
[1] = nir_src_for_ssa(vertex_index
);
415 store
->src
[vertex_index
? 2 : 1] = nir_src_for_ssa(offset
);
417 unsigned gs_streams
= 0;
418 if (state
->builder
.shader
->info
.stage
== MESA_SHADER_GEOMETRY
) {
419 if (var
->data
.stream
& NIR_STREAM_PACKED
) {
420 gs_streams
= var
->data
.stream
& ~NIR_STREAM_PACKED
;
422 assert(var
->data
.stream
< 4);
424 for (unsigned i
= 0; i
< num_components
; ++i
)
425 gs_streams
|= var
->data
.stream
<< (2 * i
);
429 nir_io_semantics semantics
= {0};
430 semantics
.location
= var
->data
.location
;
431 semantics
.num_slots
= get_number_of_slots(state
, var
);
432 semantics
.dual_source_blend_index
= var
->data
.index
;
433 semantics
.gs_streams
= gs_streams
;
434 nir_intrinsic_set_io_semantics(store
, semantics
);
436 nir_builder_instr_insert(b
, &store
->instr
);
440 lower_store(nir_intrinsic_instr
*intrin
, struct lower_io_state
*state
,
441 nir_ssa_def
*vertex_index
, nir_variable
*var
, nir_ssa_def
*offset
,
442 unsigned component
, const struct glsl_type
*type
)
444 assert(intrin
->src
[1].is_ssa
);
445 if (intrin
->src
[1].ssa
->bit_size
== 64 &&
446 (state
->options
& nir_lower_io_lower_64bit_to_32
)) {
447 nir_builder
*b
= &state
->builder
;
449 const unsigned slot_size
= state
->type_size(glsl_dvec_type(2), false);
451 assert(component
== 0 || component
== 2);
452 unsigned src_comp
= 0;
453 nir_component_mask_t write_mask
= nir_intrinsic_write_mask(intrin
);
454 while (src_comp
< intrin
->num_components
) {
455 const unsigned num_comps
=
456 MIN2(intrin
->num_components
- src_comp
,
457 (4 - component
) / 2);
459 if (write_mask
& BITFIELD_MASK(num_comps
)) {
461 nir_channels(b
, intrin
->src
[1].ssa
,
462 BITFIELD_RANGE(src_comp
, num_comps
));
463 nir_ssa_def
*data32
= nir_bitcast_vector(b
, data
, 32);
465 nir_component_mask_t write_mask32
= 0;
466 for (unsigned i
= 0; i
< num_comps
; i
++) {
467 if (write_mask
& BITFIELD_MASK(num_comps
) & (1 << i
))
468 write_mask32
|= 3 << (i
* 2);
471 emit_store(state
, data32
, vertex_index
, var
, offset
,
472 component
, data32
->num_components
, write_mask32
,
476 /* Only the first store has a component offset */
478 src_comp
+= num_comps
;
479 write_mask
>>= num_comps
;
480 offset
= nir_iadd_imm(b
, offset
, slot_size
);
482 } else if (intrin
->dest
.ssa
.bit_size
== 1) {
483 /* Booleans are 32-bit */
484 assert(glsl_type_is_boolean(type
));
485 nir_ssa_def
*b32_val
= nir_b2b32(&state
->builder
, intrin
->src
[1].ssa
);
486 emit_store(state
, b32_val
, vertex_index
, var
, offset
,
487 component
, intrin
->num_components
,
488 nir_intrinsic_write_mask(intrin
),
491 emit_store(state
, intrin
->src
[1].ssa
, vertex_index
, var
, offset
,
492 component
, intrin
->num_components
,
493 nir_intrinsic_write_mask(intrin
),
494 nir_get_nir_type_for_glsl_type(type
));
499 lower_interpolate_at(nir_intrinsic_instr
*intrin
, struct lower_io_state
*state
,
500 nir_variable
*var
, nir_ssa_def
*offset
, unsigned component
,
501 const struct glsl_type
*type
)
503 nir_builder
*b
= &state
->builder
;
504 assert(var
->data
.mode
== nir_var_shader_in
);
506 /* Ignore interpolateAt() for flat variables - flat is flat. Lower
507 * interpolateAtVertex() for explicit variables.
509 if (var
->data
.interpolation
== INTERP_MODE_FLAT
||
510 var
->data
.interpolation
== INTERP_MODE_EXPLICIT
) {
511 nir_ssa_def
*vertex_index
= NULL
;
513 if (var
->data
.interpolation
== INTERP_MODE_EXPLICIT
) {
514 assert(intrin
->intrinsic
== nir_intrinsic_interp_deref_at_vertex
);
515 vertex_index
= intrin
->src
[1].ssa
;
518 return lower_load(intrin
, state
, vertex_index
, var
, offset
, component
, type
);
521 /* None of the supported APIs allow interpolation on 64-bit things */
522 assert(intrin
->dest
.is_ssa
&& intrin
->dest
.ssa
.bit_size
<= 32);
524 nir_intrinsic_op bary_op
;
525 switch (intrin
->intrinsic
) {
526 case nir_intrinsic_interp_deref_at_centroid
:
527 bary_op
= (state
->options
& nir_lower_io_force_sample_interpolation
) ?
528 nir_intrinsic_load_barycentric_sample
:
529 nir_intrinsic_load_barycentric_centroid
;
531 case nir_intrinsic_interp_deref_at_sample
:
532 bary_op
= nir_intrinsic_load_barycentric_at_sample
;
534 case nir_intrinsic_interp_deref_at_offset
:
535 bary_op
= nir_intrinsic_load_barycentric_at_offset
;
538 unreachable("Bogus interpolateAt() intrinsic.");
541 nir_intrinsic_instr
*bary_setup
=
542 nir_intrinsic_instr_create(state
->builder
.shader
, bary_op
);
544 nir_ssa_dest_init(&bary_setup
->instr
, &bary_setup
->dest
, 2, 32, NULL
);
545 nir_intrinsic_set_interp_mode(bary_setup
, var
->data
.interpolation
);
547 if (intrin
->intrinsic
== nir_intrinsic_interp_deref_at_sample
||
548 intrin
->intrinsic
== nir_intrinsic_interp_deref_at_offset
||
549 intrin
->intrinsic
== nir_intrinsic_interp_deref_at_vertex
)
550 nir_src_copy(&bary_setup
->src
[0], &intrin
->src
[1], bary_setup
);
552 nir_builder_instr_insert(b
, &bary_setup
->instr
);
554 nir_intrinsic_instr
*load
=
555 nir_intrinsic_instr_create(state
->builder
.shader
,
556 nir_intrinsic_load_interpolated_input
);
557 load
->num_components
= intrin
->num_components
;
559 nir_intrinsic_set_base(load
, var
->data
.driver_location
);
560 nir_intrinsic_set_component(load
, component
);
562 nir_io_semantics semantics
= {0};
563 semantics
.location
= var
->data
.location
;
564 semantics
.num_slots
= get_number_of_slots(state
, var
);
565 nir_intrinsic_set_io_semantics(load
, semantics
);
567 load
->src
[0] = nir_src_for_ssa(&bary_setup
->dest
.ssa
);
568 load
->src
[1] = nir_src_for_ssa(offset
);
570 assert(intrin
->dest
.is_ssa
);
571 nir_ssa_dest_init(&load
->instr
, &load
->dest
,
572 intrin
->dest
.ssa
.num_components
,
573 intrin
->dest
.ssa
.bit_size
, NULL
);
574 nir_builder_instr_insert(b
, &load
->instr
);
576 return &load
->dest
.ssa
;
580 nir_lower_io_block(nir_block
*block
,
581 struct lower_io_state
*state
)
583 nir_builder
*b
= &state
->builder
;
584 const nir_shader_compiler_options
*options
= b
->shader
->options
;
585 bool progress
= false;
587 nir_foreach_instr_safe(instr
, block
) {
588 if (instr
->type
!= nir_instr_type_intrinsic
)
591 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
593 switch (intrin
->intrinsic
) {
594 case nir_intrinsic_load_deref
:
595 case nir_intrinsic_store_deref
:
596 /* We can lower the io for this nir instrinsic */
598 case nir_intrinsic_interp_deref_at_centroid
:
599 case nir_intrinsic_interp_deref_at_sample
:
600 case nir_intrinsic_interp_deref_at_offset
:
601 case nir_intrinsic_interp_deref_at_vertex
:
602 /* We can optionally lower these to load_interpolated_input */
603 if (options
->use_interpolated_input_intrinsics
)
606 /* We can't lower the io for this nir instrinsic, so skip it */
610 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
612 nir_variable_mode mode
= deref
->mode
;
613 assert(util_is_power_of_two_nonzero(mode
));
614 if ((state
->modes
& mode
) == 0)
617 nir_variable
*var
= nir_deref_instr_get_variable(deref
);
619 b
->cursor
= nir_before_instr(instr
);
621 const bool per_vertex
= nir_is_per_vertex_io(var
, b
->shader
->info
.stage
);
624 nir_ssa_def
*vertex_index
= NULL
;
625 unsigned component_offset
= var
->data
.location_frac
;
626 bool bindless_type_size
= mode
== nir_var_shader_in
||
627 mode
== nir_var_shader_out
||
630 offset
= get_io_offset(b
, deref
, per_vertex
? &vertex_index
: NULL
,
631 state
->type_size
, &component_offset
,
634 nir_ssa_def
*replacement
= NULL
;
636 switch (intrin
->intrinsic
) {
637 case nir_intrinsic_load_deref
:
638 replacement
= lower_load(intrin
, state
, vertex_index
, var
, offset
,
639 component_offset
, deref
->type
);
642 case nir_intrinsic_store_deref
:
643 lower_store(intrin
, state
, vertex_index
, var
, offset
,
644 component_offset
, deref
->type
);
647 case nir_intrinsic_interp_deref_at_centroid
:
648 case nir_intrinsic_interp_deref_at_sample
:
649 case nir_intrinsic_interp_deref_at_offset
:
650 case nir_intrinsic_interp_deref_at_vertex
:
651 assert(vertex_index
== NULL
);
652 replacement
= lower_interpolate_at(intrin
, state
, var
, offset
,
653 component_offset
, deref
->type
);
661 nir_ssa_def_rewrite_uses(&intrin
->dest
.ssa
,
662 nir_src_for_ssa(replacement
));
664 nir_instr_remove(&intrin
->instr
);
672 nir_lower_io_impl(nir_function_impl
*impl
,
673 nir_variable_mode modes
,
674 int (*type_size
)(const struct glsl_type
*, bool),
675 nir_lower_io_options options
)
677 struct lower_io_state state
;
678 bool progress
= false;
680 nir_builder_init(&state
.builder
, impl
);
681 state
.dead_ctx
= ralloc_context(NULL
);
683 state
.type_size
= type_size
;
684 state
.options
= options
;
686 ASSERTED nir_variable_mode supported_modes
=
687 nir_var_shader_in
| nir_var_shader_out
| nir_var_uniform
;
688 assert(!(modes
& ~supported_modes
));
690 nir_foreach_block(block
, impl
) {
691 progress
|= nir_lower_io_block(block
, &state
);
694 ralloc_free(state
.dead_ctx
);
696 nir_metadata_preserve(impl
, nir_metadata_block_index
|
697 nir_metadata_dominance
);
701 /** Lower load/store_deref intrinsics on I/O variables to offset-based intrinsics
703 * This pass is intended to be used for cross-stage shader I/O and driver-
704 * managed uniforms to turn deref-based access into a simpler model using
705 * locations or offsets. For fragment shader inputs, it can optionally turn
706 * load_deref into an explicit interpolation using barycentrics coming from
707 * one of the load_barycentric_* intrinsics. This pass requires that all
708 * deref chains are complete and contain no casts.
711 nir_lower_io(nir_shader
*shader
, nir_variable_mode modes
,
712 int (*type_size
)(const struct glsl_type
*, bool),
713 nir_lower_io_options options
)
715 bool progress
= false;
717 nir_foreach_function(function
, shader
) {
718 if (function
->impl
) {
719 progress
|= nir_lower_io_impl(function
->impl
, modes
,
728 type_scalar_size_bytes(const struct glsl_type
*type
)
730 assert(glsl_type_is_vector_or_scalar(type
) ||
731 glsl_type_is_matrix(type
));
732 return glsl_type_is_boolean(type
) ? 4 : glsl_get_bit_size(type
) / 8;
736 build_addr_iadd(nir_builder
*b
, nir_ssa_def
*addr
,
737 nir_address_format addr_format
, nir_ssa_def
*offset
)
739 assert(offset
->num_components
== 1);
741 switch (addr_format
) {
742 case nir_address_format_32bit_global
:
743 case nir_address_format_64bit_global
:
744 case nir_address_format_32bit_offset
:
745 assert(addr
->bit_size
== offset
->bit_size
);
746 assert(addr
->num_components
== 1);
747 return nir_iadd(b
, addr
, offset
);
749 case nir_address_format_32bit_offset_as_64bit
:
750 assert(addr
->num_components
== 1);
751 assert(offset
->bit_size
== 32);
752 return nir_u2u64(b
, nir_iadd(b
, nir_u2u32(b
, addr
), offset
));
754 case nir_address_format_64bit_bounded_global
:
755 assert(addr
->num_components
== 4);
756 assert(addr
->bit_size
== offset
->bit_size
);
757 return nir_vec4(b
, nir_channel(b
, addr
, 0),
758 nir_channel(b
, addr
, 1),
759 nir_channel(b
, addr
, 2),
760 nir_iadd(b
, nir_channel(b
, addr
, 3), offset
));
762 case nir_address_format_32bit_index_offset
:
763 assert(addr
->num_components
== 2);
764 assert(addr
->bit_size
== offset
->bit_size
);
765 return nir_vec2(b
, nir_channel(b
, addr
, 0),
766 nir_iadd(b
, nir_channel(b
, addr
, 1), offset
));
768 case nir_address_format_32bit_index_offset_pack64
:
769 assert(addr
->num_components
== 1);
770 assert(offset
->bit_size
== 32);
771 return nir_pack_64_2x32_split(b
,
772 nir_iadd(b
, nir_unpack_64_2x32_split_x(b
, addr
), offset
),
773 nir_unpack_64_2x32_split_y(b
, addr
));
775 case nir_address_format_vec2_index_32bit_offset
:
776 assert(addr
->num_components
== 3);
777 assert(offset
->bit_size
== 32);
778 return nir_vec3(b
, nir_channel(b
, addr
, 0), nir_channel(b
, addr
, 1),
779 nir_iadd(b
, nir_channel(b
, addr
, 2), offset
));
781 case nir_address_format_logical
:
782 unreachable("Unsupported address format");
784 unreachable("Invalid address format");
788 addr_get_offset_bit_size(nir_ssa_def
*addr
, nir_address_format addr_format
)
790 if (addr_format
== nir_address_format_32bit_offset_as_64bit
||
791 addr_format
== nir_address_format_32bit_index_offset_pack64
)
793 return addr
->bit_size
;
797 build_addr_iadd_imm(nir_builder
*b
, nir_ssa_def
*addr
,
798 nir_address_format addr_format
, int64_t offset
)
800 return build_addr_iadd(b
, addr
, addr_format
,
801 nir_imm_intN_t(b
, offset
,
802 addr_get_offset_bit_size(addr
, addr_format
)));
806 build_addr_for_var(nir_builder
*b
, nir_variable
*var
,
807 nir_address_format addr_format
)
809 assert(var
->data
.mode
& (nir_var_uniform
| nir_var_mem_shared
|
810 nir_var_shader_temp
| nir_var_function_temp
|
811 nir_var_mem_constant
));
813 const unsigned num_comps
= nir_address_format_num_components(addr_format
);
814 const unsigned bit_size
= nir_address_format_bit_size(addr_format
);
816 switch (addr_format
) {
817 case nir_address_format_32bit_global
:
818 case nir_address_format_64bit_global
: {
819 nir_ssa_def
*base_addr
;
820 switch (var
->data
.mode
) {
821 case nir_var_shader_temp
:
822 base_addr
= nir_load_scratch_base_ptr(b
, 0, num_comps
, bit_size
);
825 case nir_var_function_temp
:
826 base_addr
= nir_load_scratch_base_ptr(b
, 1, num_comps
, bit_size
);
829 case nir_var_mem_constant
:
830 base_addr
= nir_load_constant_base_ptr(b
, num_comps
, bit_size
);
834 unreachable("Unsupported variable mode");
837 return build_addr_iadd_imm(b
, base_addr
, addr_format
,
838 var
->data
.driver_location
);
841 case nir_address_format_32bit_offset
:
842 assert(var
->data
.driver_location
<= UINT32_MAX
);
843 return nir_imm_int(b
, var
->data
.driver_location
);
845 case nir_address_format_32bit_offset_as_64bit
:
846 assert(var
->data
.driver_location
<= UINT32_MAX
);
847 return nir_imm_int64(b
, var
->data
.driver_location
);
850 unreachable("Unsupported address format");
855 addr_to_index(nir_builder
*b
, nir_ssa_def
*addr
,
856 nir_address_format addr_format
)
858 switch (addr_format
) {
859 case nir_address_format_32bit_index_offset
:
860 assert(addr
->num_components
== 2);
861 return nir_channel(b
, addr
, 0);
862 case nir_address_format_32bit_index_offset_pack64
:
863 return nir_unpack_64_2x32_split_y(b
, addr
);
864 case nir_address_format_vec2_index_32bit_offset
:
865 assert(addr
->num_components
== 3);
866 return nir_channels(b
, addr
, 0x3);
867 default: unreachable("Invalid address format");
872 addr_to_offset(nir_builder
*b
, nir_ssa_def
*addr
,
873 nir_address_format addr_format
)
875 switch (addr_format
) {
876 case nir_address_format_32bit_index_offset
:
877 assert(addr
->num_components
== 2);
878 return nir_channel(b
, addr
, 1);
879 case nir_address_format_32bit_index_offset_pack64
:
880 return nir_unpack_64_2x32_split_x(b
, addr
);
881 case nir_address_format_vec2_index_32bit_offset
:
882 assert(addr
->num_components
== 3);
883 return nir_channel(b
, addr
, 2);
884 case nir_address_format_32bit_offset
:
886 case nir_address_format_32bit_offset_as_64bit
:
887 return nir_u2u32(b
, addr
);
889 unreachable("Invalid address format");
893 /** Returns true if the given address format resolves to a global address */
895 addr_format_is_global(nir_address_format addr_format
)
897 return addr_format
== nir_address_format_32bit_global
||
898 addr_format
== nir_address_format_64bit_global
||
899 addr_format
== nir_address_format_64bit_bounded_global
;
903 addr_format_is_offset(nir_address_format addr_format
)
905 return addr_format
== nir_address_format_32bit_offset
||
906 addr_format
== nir_address_format_32bit_offset_as_64bit
;
910 addr_to_global(nir_builder
*b
, nir_ssa_def
*addr
,
911 nir_address_format addr_format
)
913 switch (addr_format
) {
914 case nir_address_format_32bit_global
:
915 case nir_address_format_64bit_global
:
916 assert(addr
->num_components
== 1);
919 case nir_address_format_64bit_bounded_global
:
920 assert(addr
->num_components
== 4);
921 return nir_iadd(b
, nir_pack_64_2x32(b
, nir_channels(b
, addr
, 0x3)),
922 nir_u2u64(b
, nir_channel(b
, addr
, 3)));
924 case nir_address_format_32bit_index_offset
:
925 case nir_address_format_32bit_index_offset_pack64
:
926 case nir_address_format_vec2_index_32bit_offset
:
927 case nir_address_format_32bit_offset
:
928 case nir_address_format_32bit_offset_as_64bit
:
929 case nir_address_format_logical
:
930 unreachable("Cannot get a 64-bit address with this address format");
933 unreachable("Invalid address format");
937 addr_format_needs_bounds_check(nir_address_format addr_format
)
939 return addr_format
== nir_address_format_64bit_bounded_global
;
943 addr_is_in_bounds(nir_builder
*b
, nir_ssa_def
*addr
,
944 nir_address_format addr_format
, unsigned size
)
946 assert(addr_format
== nir_address_format_64bit_bounded_global
);
947 assert(addr
->num_components
== 4);
948 return nir_ige(b
, nir_channel(b
, addr
, 2),
949 nir_iadd_imm(b
, nir_channel(b
, addr
, 3), size
));
953 build_explicit_io_load(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
954 nir_ssa_def
*addr
, nir_address_format addr_format
,
955 unsigned num_components
)
957 nir_variable_mode mode
= nir_src_as_deref(intrin
->src
[0])->mode
;
961 case nir_var_mem_ubo
:
962 op
= nir_intrinsic_load_ubo
;
964 case nir_var_mem_ssbo
:
965 if (addr_format_is_global(addr_format
))
966 op
= nir_intrinsic_load_global
;
968 op
= nir_intrinsic_load_ssbo
;
970 case nir_var_mem_global
:
971 assert(addr_format_is_global(addr_format
));
972 op
= nir_intrinsic_load_global
;
974 case nir_var_uniform
:
975 assert(addr_format_is_offset(addr_format
));
976 assert(b
->shader
->info
.stage
== MESA_SHADER_KERNEL
);
977 op
= nir_intrinsic_load_kernel_input
;
979 case nir_var_mem_shared
:
980 assert(addr_format_is_offset(addr_format
));
981 op
= nir_intrinsic_load_shared
;
983 case nir_var_shader_temp
:
984 case nir_var_function_temp
:
985 if (addr_format_is_offset(addr_format
)) {
986 op
= nir_intrinsic_load_scratch
;
988 assert(addr_format_is_global(addr_format
));
989 op
= nir_intrinsic_load_global
;
992 case nir_var_mem_constant
:
993 if (addr_format_is_offset(addr_format
)) {
994 op
= nir_intrinsic_load_constant
;
996 assert(addr_format_is_global(addr_format
));
997 op
= nir_intrinsic_load_global_constant
;
1001 unreachable("Unsupported explicit IO variable mode");
1004 nir_intrinsic_instr
*load
= nir_intrinsic_instr_create(b
->shader
, op
);
1006 if (addr_format_is_global(addr_format
)) {
1007 load
->src
[0] = nir_src_for_ssa(addr_to_global(b
, addr
, addr_format
));
1008 } else if (addr_format_is_offset(addr_format
)) {
1009 assert(addr
->num_components
== 1);
1010 load
->src
[0] = nir_src_for_ssa(addr_to_offset(b
, addr
, addr_format
));
1012 load
->src
[0] = nir_src_for_ssa(addr_to_index(b
, addr
, addr_format
));
1013 load
->src
[1] = nir_src_for_ssa(addr_to_offset(b
, addr
, addr_format
));
1016 if (nir_intrinsic_has_access(load
))
1017 nir_intrinsic_set_access(load
, nir_intrinsic_access(intrin
));
1019 if (op
== nir_intrinsic_load_constant
) {
1020 nir_intrinsic_set_base(load
, 0);
1021 nir_intrinsic_set_range(load
, b
->shader
->constant_data_size
);
1024 unsigned bit_size
= intrin
->dest
.ssa
.bit_size
;
1025 if (bit_size
== 1) {
1026 /* TODO: Make the native bool bit_size an option. */
1030 /* TODO: We should try and provide a better alignment. For OpenCL, we need
1031 * to plumb the alignment through from SPIR-V when we have one.
1033 nir_intrinsic_set_align(load
, bit_size
/ 8, 0);
1035 assert(intrin
->dest
.is_ssa
);
1036 load
->num_components
= num_components
;
1037 nir_ssa_dest_init(&load
->instr
, &load
->dest
, num_components
,
1038 bit_size
, intrin
->dest
.ssa
.name
);
1040 assert(bit_size
% 8 == 0);
1042 nir_ssa_def
*result
;
1043 if (addr_format_needs_bounds_check(addr_format
)) {
1044 /* The Vulkan spec for robustBufferAccess gives us quite a few options
1045 * as to what we can do with an OOB read. Unfortunately, returning
1046 * undefined values isn't one of them so we return an actual zero.
1048 nir_ssa_def
*zero
= nir_imm_zero(b
, load
->num_components
, bit_size
);
1050 const unsigned load_size
= (bit_size
/ 8) * load
->num_components
;
1051 nir_push_if(b
, addr_is_in_bounds(b
, addr
, addr_format
, load_size
));
1053 nir_builder_instr_insert(b
, &load
->instr
);
1055 nir_pop_if(b
, NULL
);
1057 result
= nir_if_phi(b
, &load
->dest
.ssa
, zero
);
1059 nir_builder_instr_insert(b
, &load
->instr
);
1060 result
= &load
->dest
.ssa
;
1063 if (intrin
->dest
.ssa
.bit_size
== 1) {
1064 /* For shared, we can go ahead and use NIR's and/or the back-end's
1065 * standard encoding for booleans rather than forcing a 0/1 boolean.
1066 * This should save an instruction or two.
1068 if (mode
== nir_var_mem_shared
||
1069 mode
== nir_var_shader_temp
||
1070 mode
== nir_var_function_temp
)
1071 result
= nir_b2b1(b
, result
);
1073 result
= nir_i2b(b
, result
);
1080 build_explicit_io_store(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
1081 nir_ssa_def
*addr
, nir_address_format addr_format
,
1082 nir_ssa_def
*value
, nir_component_mask_t write_mask
)
1084 nir_variable_mode mode
= nir_src_as_deref(intrin
->src
[0])->mode
;
1086 nir_intrinsic_op op
;
1088 case nir_var_mem_ssbo
:
1089 if (addr_format_is_global(addr_format
))
1090 op
= nir_intrinsic_store_global
;
1092 op
= nir_intrinsic_store_ssbo
;
1094 case nir_var_mem_global
:
1095 assert(addr_format_is_global(addr_format
));
1096 op
= nir_intrinsic_store_global
;
1098 case nir_var_mem_shared
:
1099 assert(addr_format_is_offset(addr_format
));
1100 op
= nir_intrinsic_store_shared
;
1102 case nir_var_shader_temp
:
1103 case nir_var_function_temp
:
1104 if (addr_format_is_offset(addr_format
)) {
1105 op
= nir_intrinsic_store_scratch
;
1107 assert(addr_format_is_global(addr_format
));
1108 op
= nir_intrinsic_store_global
;
1112 unreachable("Unsupported explicit IO variable mode");
1115 nir_intrinsic_instr
*store
= nir_intrinsic_instr_create(b
->shader
, op
);
1117 if (value
->bit_size
== 1) {
1118 /* For shared, we can go ahead and use NIR's and/or the back-end's
1119 * standard encoding for booleans rather than forcing a 0/1 boolean.
1120 * This should save an instruction or two.
1122 * TODO: Make the native bool bit_size an option.
1124 if (mode
== nir_var_mem_shared
||
1125 mode
== nir_var_shader_temp
||
1126 mode
== nir_var_function_temp
)
1127 value
= nir_b2b32(b
, value
);
1129 value
= nir_b2i(b
, value
, 32);
1132 store
->src
[0] = nir_src_for_ssa(value
);
1133 if (addr_format_is_global(addr_format
)) {
1134 store
->src
[1] = nir_src_for_ssa(addr_to_global(b
, addr
, addr_format
));
1135 } else if (addr_format_is_offset(addr_format
)) {
1136 assert(addr
->num_components
== 1);
1137 store
->src
[1] = nir_src_for_ssa(addr_to_offset(b
, addr
, addr_format
));
1139 store
->src
[1] = nir_src_for_ssa(addr_to_index(b
, addr
, addr_format
));
1140 store
->src
[2] = nir_src_for_ssa(addr_to_offset(b
, addr
, addr_format
));
1143 nir_intrinsic_set_write_mask(store
, write_mask
);
1145 if (nir_intrinsic_has_access(store
))
1146 nir_intrinsic_set_access(store
, nir_intrinsic_access(intrin
));
1148 /* TODO: We should try and provide a better alignment. For OpenCL, we need
1149 * to plumb the alignment through from SPIR-V when we have one.
1151 nir_intrinsic_set_align(store
, value
->bit_size
/ 8, 0);
1153 assert(value
->num_components
== 1 ||
1154 value
->num_components
== intrin
->num_components
);
1155 store
->num_components
= value
->num_components
;
1157 assert(value
->bit_size
% 8 == 0);
1159 if (addr_format_needs_bounds_check(addr_format
)) {
1160 const unsigned store_size
= (value
->bit_size
/ 8) * store
->num_components
;
1161 nir_push_if(b
, addr_is_in_bounds(b
, addr
, addr_format
, store_size
));
1163 nir_builder_instr_insert(b
, &store
->instr
);
1165 nir_pop_if(b
, NULL
);
1167 nir_builder_instr_insert(b
, &store
->instr
);
1171 static nir_ssa_def
*
1172 build_explicit_io_atomic(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
1173 nir_ssa_def
*addr
, nir_address_format addr_format
)
1175 nir_variable_mode mode
= nir_src_as_deref(intrin
->src
[0])->mode
;
1176 const unsigned num_data_srcs
=
1177 nir_intrinsic_infos
[intrin
->intrinsic
].num_srcs
- 1;
1179 nir_intrinsic_op op
;
1181 case nir_var_mem_ssbo
:
1182 if (addr_format_is_global(addr_format
))
1183 op
= global_atomic_for_deref(intrin
->intrinsic
);
1185 op
= ssbo_atomic_for_deref(intrin
->intrinsic
);
1187 case nir_var_mem_global
:
1188 assert(addr_format_is_global(addr_format
));
1189 op
= global_atomic_for_deref(intrin
->intrinsic
);
1191 case nir_var_mem_shared
:
1192 assert(addr_format_is_offset(addr_format
));
1193 op
= shared_atomic_for_deref(intrin
->intrinsic
);
1196 unreachable("Unsupported explicit IO variable mode");
1199 nir_intrinsic_instr
*atomic
= nir_intrinsic_instr_create(b
->shader
, op
);
1202 if (addr_format_is_global(addr_format
)) {
1203 atomic
->src
[src
++] = nir_src_for_ssa(addr_to_global(b
, addr
, addr_format
));
1204 } else if (addr_format_is_offset(addr_format
)) {
1205 assert(addr
->num_components
== 1);
1206 atomic
->src
[src
++] = nir_src_for_ssa(addr_to_offset(b
, addr
, addr_format
));
1208 atomic
->src
[src
++] = nir_src_for_ssa(addr_to_index(b
, addr
, addr_format
));
1209 atomic
->src
[src
++] = nir_src_for_ssa(addr_to_offset(b
, addr
, addr_format
));
1211 for (unsigned i
= 0; i
< num_data_srcs
; i
++) {
1212 atomic
->src
[src
++] = nir_src_for_ssa(intrin
->src
[1 + i
].ssa
);
1215 /* Global atomics don't have access flags because they assume that the
1216 * address may be non-uniform.
1218 if (nir_intrinsic_has_access(atomic
))
1219 nir_intrinsic_set_access(atomic
, nir_intrinsic_access(intrin
));
1221 assert(intrin
->dest
.ssa
.num_components
== 1);
1222 nir_ssa_dest_init(&atomic
->instr
, &atomic
->dest
,
1223 1, intrin
->dest
.ssa
.bit_size
, intrin
->dest
.ssa
.name
);
1225 assert(atomic
->dest
.ssa
.bit_size
% 8 == 0);
1227 if (addr_format_needs_bounds_check(addr_format
)) {
1228 const unsigned atomic_size
= atomic
->dest
.ssa
.bit_size
/ 8;
1229 nir_push_if(b
, addr_is_in_bounds(b
, addr
, addr_format
, atomic_size
));
1231 nir_builder_instr_insert(b
, &atomic
->instr
);
1233 nir_pop_if(b
, NULL
);
1234 return nir_if_phi(b
, &atomic
->dest
.ssa
,
1235 nir_ssa_undef(b
, 1, atomic
->dest
.ssa
.bit_size
));
1237 nir_builder_instr_insert(b
, &atomic
->instr
);
1238 return &atomic
->dest
.ssa
;
1243 nir_explicit_io_address_from_deref(nir_builder
*b
, nir_deref_instr
*deref
,
1244 nir_ssa_def
*base_addr
,
1245 nir_address_format addr_format
)
1247 assert(deref
->dest
.is_ssa
);
1248 switch (deref
->deref_type
) {
1249 case nir_deref_type_var
:
1250 return build_addr_for_var(b
, deref
->var
, addr_format
);
1252 case nir_deref_type_array
: {
1253 nir_deref_instr
*parent
= nir_deref_instr_parent(deref
);
1255 unsigned stride
= glsl_get_explicit_stride(parent
->type
);
1256 if ((glsl_type_is_matrix(parent
->type
) &&
1257 glsl_matrix_type_is_row_major(parent
->type
)) ||
1258 (glsl_type_is_vector(parent
->type
) && stride
== 0))
1259 stride
= type_scalar_size_bytes(parent
->type
);
1263 nir_ssa_def
*index
= nir_ssa_for_src(b
, deref
->arr
.index
, 1);
1264 index
= nir_i2i(b
, index
, addr_get_offset_bit_size(base_addr
, addr_format
));
1265 return build_addr_iadd(b
, base_addr
, addr_format
,
1266 nir_amul_imm(b
, index
, stride
));
1269 case nir_deref_type_ptr_as_array
: {
1270 nir_ssa_def
*index
= nir_ssa_for_src(b
, deref
->arr
.index
, 1);
1271 index
= nir_i2i(b
, index
, addr_get_offset_bit_size(base_addr
, addr_format
));
1272 unsigned stride
= nir_deref_instr_ptr_as_array_stride(deref
);
1273 return build_addr_iadd(b
, base_addr
, addr_format
,
1274 nir_amul_imm(b
, index
, stride
));
1277 case nir_deref_type_array_wildcard
:
1278 unreachable("Wildcards should be lowered by now");
1281 case nir_deref_type_struct
: {
1282 nir_deref_instr
*parent
= nir_deref_instr_parent(deref
);
1283 int offset
= glsl_get_struct_field_offset(parent
->type
,
1284 deref
->strct
.index
);
1285 assert(offset
>= 0);
1286 return build_addr_iadd_imm(b
, base_addr
, addr_format
, offset
);
1289 case nir_deref_type_cast
:
1290 /* Nothing to do here */
1294 unreachable("Invalid NIR deref type");
1298 nir_lower_explicit_io_instr(nir_builder
*b
,
1299 nir_intrinsic_instr
*intrin
,
1301 nir_address_format addr_format
)
1303 b
->cursor
= nir_after_instr(&intrin
->instr
);
1305 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
1306 unsigned vec_stride
= glsl_get_explicit_stride(deref
->type
);
1307 unsigned scalar_size
= type_scalar_size_bytes(deref
->type
);
1308 assert(vec_stride
== 0 || glsl_type_is_vector(deref
->type
));
1309 assert(vec_stride
== 0 || vec_stride
>= scalar_size
);
1311 if (intrin
->intrinsic
== nir_intrinsic_load_deref
) {
1313 if (vec_stride
> scalar_size
) {
1314 nir_ssa_def
*comps
[4] = { NULL
, };
1315 for (unsigned i
= 0; i
< intrin
->num_components
; i
++) {
1316 nir_ssa_def
*comp_addr
= build_addr_iadd_imm(b
, addr
, addr_format
,
1318 comps
[i
] = build_explicit_io_load(b
, intrin
, comp_addr
,
1321 value
= nir_vec(b
, comps
, intrin
->num_components
);
1323 value
= build_explicit_io_load(b
, intrin
, addr
, addr_format
,
1324 intrin
->num_components
);
1326 nir_ssa_def_rewrite_uses(&intrin
->dest
.ssa
, nir_src_for_ssa(value
));
1327 } else if (intrin
->intrinsic
== nir_intrinsic_store_deref
) {
1328 assert(intrin
->src
[1].is_ssa
);
1329 nir_ssa_def
*value
= intrin
->src
[1].ssa
;
1330 nir_component_mask_t write_mask
= nir_intrinsic_write_mask(intrin
);
1331 if (vec_stride
> scalar_size
) {
1332 for (unsigned i
= 0; i
< intrin
->num_components
; i
++) {
1333 if (!(write_mask
& (1 << i
)))
1336 nir_ssa_def
*comp_addr
= build_addr_iadd_imm(b
, addr
, addr_format
,
1338 build_explicit_io_store(b
, intrin
, comp_addr
, addr_format
,
1339 nir_channel(b
, value
, i
), 1);
1342 build_explicit_io_store(b
, intrin
, addr
, addr_format
,
1346 nir_ssa_def
*value
=
1347 build_explicit_io_atomic(b
, intrin
, addr
, addr_format
);
1348 nir_ssa_def_rewrite_uses(&intrin
->dest
.ssa
, nir_src_for_ssa(value
));
1351 nir_instr_remove(&intrin
->instr
);
1355 lower_explicit_io_deref(nir_builder
*b
, nir_deref_instr
*deref
,
1356 nir_address_format addr_format
)
1358 /* Just delete the deref if it's not used. We can't use
1359 * nir_deref_instr_remove_if_unused here because it may remove more than
1360 * one deref which could break our list walking since we walk the list
1363 assert(list_is_empty(&deref
->dest
.ssa
.if_uses
));
1364 if (list_is_empty(&deref
->dest
.ssa
.uses
)) {
1365 nir_instr_remove(&deref
->instr
);
1369 b
->cursor
= nir_after_instr(&deref
->instr
);
1371 nir_ssa_def
*base_addr
= NULL
;
1372 if (deref
->deref_type
!= nir_deref_type_var
) {
1373 assert(deref
->parent
.is_ssa
);
1374 base_addr
= deref
->parent
.ssa
;
1377 nir_ssa_def
*addr
= nir_explicit_io_address_from_deref(b
, deref
, base_addr
,
1379 assert(addr
->bit_size
== deref
->dest
.ssa
.bit_size
);
1380 assert(addr
->num_components
== deref
->dest
.ssa
.num_components
);
1382 nir_instr_remove(&deref
->instr
);
1383 nir_ssa_def_rewrite_uses(&deref
->dest
.ssa
, nir_src_for_ssa(addr
));
1387 lower_explicit_io_access(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
1388 nir_address_format addr_format
)
1390 assert(intrin
->src
[0].is_ssa
);
1391 nir_lower_explicit_io_instr(b
, intrin
, intrin
->src
[0].ssa
, addr_format
);
1395 lower_explicit_io_array_length(nir_builder
*b
, nir_intrinsic_instr
*intrin
,
1396 nir_address_format addr_format
)
1398 b
->cursor
= nir_after_instr(&intrin
->instr
);
1400 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
1402 assert(glsl_type_is_array(deref
->type
));
1403 assert(glsl_get_length(deref
->type
) == 0);
1404 unsigned stride
= glsl_get_explicit_stride(deref
->type
);
1407 nir_ssa_def
*addr
= &deref
->dest
.ssa
;
1408 nir_ssa_def
*index
= addr_to_index(b
, addr
, addr_format
);
1409 nir_ssa_def
*offset
= addr_to_offset(b
, addr
, addr_format
);
1411 nir_intrinsic_instr
*bsize
=
1412 nir_intrinsic_instr_create(b
->shader
, nir_intrinsic_get_buffer_size
);
1413 bsize
->src
[0] = nir_src_for_ssa(index
);
1414 nir_ssa_dest_init(&bsize
->instr
, &bsize
->dest
, 1, 32, NULL
);
1415 nir_builder_instr_insert(b
, &bsize
->instr
);
1417 nir_ssa_def
*arr_size
=
1418 nir_idiv(b
, nir_isub(b
, &bsize
->dest
.ssa
, offset
),
1419 nir_imm_int(b
, stride
));
1421 nir_ssa_def_rewrite_uses(&intrin
->dest
.ssa
, nir_src_for_ssa(arr_size
));
1422 nir_instr_remove(&intrin
->instr
);
1426 nir_lower_explicit_io_impl(nir_function_impl
*impl
, nir_variable_mode modes
,
1427 nir_address_format addr_format
)
1429 bool progress
= false;
1432 nir_builder_init(&b
, impl
);
1434 /* Walk in reverse order so that we can see the full deref chain when we
1435 * lower the access operations. We lower them assuming that the derefs
1436 * will be turned into address calculations later.
1438 nir_foreach_block_reverse(block
, impl
) {
1439 nir_foreach_instr_reverse_safe(instr
, block
) {
1440 switch (instr
->type
) {
1441 case nir_instr_type_deref
: {
1442 nir_deref_instr
*deref
= nir_instr_as_deref(instr
);
1443 if (deref
->mode
& modes
) {
1444 lower_explicit_io_deref(&b
, deref
, addr_format
);
1450 case nir_instr_type_intrinsic
: {
1451 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
1452 switch (intrin
->intrinsic
) {
1453 case nir_intrinsic_load_deref
:
1454 case nir_intrinsic_store_deref
:
1455 case nir_intrinsic_deref_atomic_add
:
1456 case nir_intrinsic_deref_atomic_imin
:
1457 case nir_intrinsic_deref_atomic_umin
:
1458 case nir_intrinsic_deref_atomic_imax
:
1459 case nir_intrinsic_deref_atomic_umax
:
1460 case nir_intrinsic_deref_atomic_and
:
1461 case nir_intrinsic_deref_atomic_or
:
1462 case nir_intrinsic_deref_atomic_xor
:
1463 case nir_intrinsic_deref_atomic_exchange
:
1464 case nir_intrinsic_deref_atomic_comp_swap
:
1465 case nir_intrinsic_deref_atomic_fadd
:
1466 case nir_intrinsic_deref_atomic_fmin
:
1467 case nir_intrinsic_deref_atomic_fmax
:
1468 case nir_intrinsic_deref_atomic_fcomp_swap
: {
1469 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
1470 if (deref
->mode
& modes
) {
1471 lower_explicit_io_access(&b
, intrin
, addr_format
);
1477 case nir_intrinsic_deref_buffer_array_length
: {
1478 nir_deref_instr
*deref
= nir_src_as_deref(intrin
->src
[0]);
1479 if (deref
->mode
& modes
) {
1480 lower_explicit_io_array_length(&b
, intrin
, addr_format
);
1500 nir_metadata_preserve(impl
, nir_metadata_block_index
|
1501 nir_metadata_dominance
);
1507 /** Lower explicitly laid out I/O access to byte offset/address intrinsics
1509 * This pass is intended to be used for any I/O which touches memory external
1510 * to the shader or which is directly visible to the client. It requires that
1511 * all data types in the given modes have a explicit stride/offset decorations
1512 * to tell it exactly how to calculate the offset/address for the given load,
1513 * store, or atomic operation. If the offset/stride information does not come
1514 * from the client explicitly (as with shared variables in GL or Vulkan),
1515 * nir_lower_vars_to_explicit_types() can be used to add them.
1517 * Unlike nir_lower_io, this pass is fully capable of handling incomplete
1518 * pointer chains which may contain cast derefs. It does so by walking the
1519 * deref chain backwards and simply replacing each deref, one at a time, with
1520 * the appropriate address calculation. The pass takes a nir_address_format
1521 * parameter which describes how the offset or address is to be represented
1522 * during calculations. By ensuring that the address is always in a
1523 * consistent format, pointers can safely be conjured from thin air by the
1524 * driver, stored to variables, passed through phis, etc.
1526 * The one exception to the simple algorithm described above is for handling
1527 * row-major matrices in which case we may look down one additional level of
1531 nir_lower_explicit_io(nir_shader
*shader
, nir_variable_mode modes
,
1532 nir_address_format addr_format
)
1534 bool progress
= false;
1536 nir_foreach_function(function
, shader
) {
1537 if (function
->impl
&&
1538 nir_lower_explicit_io_impl(function
->impl
, modes
, addr_format
))
1546 nir_lower_vars_to_explicit_types_impl(nir_function_impl
*impl
,
1547 nir_variable_mode modes
,
1548 glsl_type_size_align_func type_info
)
1550 bool progress
= false;
1552 nir_foreach_block(block
, impl
) {
1553 nir_foreach_instr(instr
, block
) {
1554 if (instr
->type
!= nir_instr_type_deref
)
1557 nir_deref_instr
*deref
= nir_instr_as_deref(instr
);
1558 if (!(deref
->mode
& modes
))
1561 unsigned size
, alignment
;
1562 const struct glsl_type
*new_type
=
1563 glsl_get_explicit_type_for_size_align(deref
->type
, type_info
, &size
, &alignment
);
1564 if (new_type
!= deref
->type
) {
1566 deref
->type
= new_type
;
1568 if (deref
->deref_type
== nir_deref_type_cast
) {
1569 /* See also glsl_type::get_explicit_type_for_size_align() */
1570 unsigned new_stride
= align(size
, alignment
);
1571 if (new_stride
!= deref
->cast
.ptr_stride
) {
1572 deref
->cast
.ptr_stride
= new_stride
;
1580 nir_metadata_preserve(impl
, nir_metadata_block_index
|
1581 nir_metadata_dominance
|
1582 nir_metadata_live_ssa_defs
|
1583 nir_metadata_loop_analysis
);
1590 lower_vars_to_explicit(nir_shader
*shader
,
1591 struct exec_list
*vars
, nir_variable_mode mode
,
1592 glsl_type_size_align_func type_info
)
1594 bool progress
= false;
1597 case nir_var_function_temp
:
1598 case nir_var_shader_temp
:
1599 offset
= shader
->scratch_size
;
1601 case nir_var_mem_shared
:
1604 case nir_var_mem_constant
:
1605 offset
= shader
->constant_data_size
;
1608 unreachable("Unsupported mode");
1610 nir_foreach_variable_in_list(var
, vars
) {
1611 if (var
->data
.mode
!= mode
)
1614 unsigned size
, align
;
1615 const struct glsl_type
*explicit_type
=
1616 glsl_get_explicit_type_for_size_align(var
->type
, type_info
, &size
, &align
);
1618 if (explicit_type
!= var
->type
)
1619 var
->type
= explicit_type
;
1621 var
->data
.driver_location
= ALIGN_POT(offset
, align
);
1622 offset
= var
->data
.driver_location
+ size
;
1627 case nir_var_shader_temp
:
1628 case nir_var_function_temp
:
1629 shader
->scratch_size
= offset
;
1631 case nir_var_mem_shared
:
1632 shader
->info
.cs
.shared_size
= offset
;
1633 shader
->shared_size
= offset
;
1635 case nir_var_mem_constant
:
1636 shader
->constant_data_size
= offset
;
1639 unreachable("Unsupported mode");
1646 nir_lower_vars_to_explicit_types(nir_shader
*shader
,
1647 nir_variable_mode modes
,
1648 glsl_type_size_align_func type_info
)
1650 /* TODO: Situations which need to be handled to support more modes:
1651 * - row-major matrices
1652 * - compact shader inputs/outputs
1655 ASSERTED nir_variable_mode supported
= nir_var_mem_shared
|
1656 nir_var_shader_temp
| nir_var_function_temp
;
1657 assert(!(modes
& ~supported
) && "unsupported");
1659 bool progress
= false;
1661 if (modes
& nir_var_mem_shared
)
1662 progress
|= lower_vars_to_explicit(shader
, &shader
->variables
, nir_var_mem_shared
, type_info
);
1663 if (modes
& nir_var_shader_temp
)
1664 progress
|= lower_vars_to_explicit(shader
, &shader
->variables
, nir_var_shader_temp
, type_info
);
1666 nir_foreach_function(function
, shader
) {
1667 if (function
->impl
) {
1668 if (modes
& nir_var_function_temp
)
1669 progress
|= lower_vars_to_explicit(shader
, &function
->impl
->locals
, nir_var_function_temp
, type_info
);
1671 progress
|= nir_lower_vars_to_explicit_types_impl(function
->impl
, modes
, type_info
);
1679 write_constant(void *dst
, const nir_constant
*c
, const struct glsl_type
*type
)
1681 if (glsl_type_is_vector_or_scalar(type
)) {
1682 const unsigned num_components
= glsl_get_vector_elements(type
);
1683 const unsigned bit_size
= glsl_get_bit_size(type
);
1684 if (bit_size
== 1) {
1685 /* Booleans are special-cased to be 32-bit
1687 * TODO: Make the native bool bit_size an option.
1689 for (unsigned i
= 0; i
< num_components
; i
++) {
1690 int32_t b32
= -(int)c
->values
[i
].b
;
1691 memcpy((char *)dst
+ i
* 4, &b32
, 4);
1694 assert(bit_size
>= 8 && bit_size
% 8 == 0);
1695 const unsigned byte_size
= bit_size
/ 8;
1696 for (unsigned i
= 0; i
< num_components
; i
++) {
1697 /* Annoyingly, thanks to packed structs, we can't make any
1698 * assumptions about the alignment of dst. To avoid any strange
1699 * issues with unaligned writes, we always use memcpy.
1701 memcpy((char *)dst
+ i
* byte_size
, &c
->values
[i
], byte_size
);
1704 } else if (glsl_type_is_array_or_matrix(type
)) {
1705 const unsigned array_len
= glsl_get_length(type
);
1706 const unsigned stride
= glsl_get_explicit_stride(type
);
1708 const struct glsl_type
*elem_type
= glsl_get_array_element(type
);
1709 for (unsigned i
= 0; i
< array_len
; i
++)
1710 write_constant((char *)dst
+ i
* stride
, c
->elements
[i
], elem_type
);
1712 assert(glsl_type_is_struct_or_ifc(type
));
1713 const unsigned num_fields
= glsl_get_length(type
);
1714 for (unsigned i
= 0; i
< num_fields
; i
++) {
1715 const int field_offset
= glsl_get_struct_field_offset(type
, i
);
1716 assert(field_offset
>= 0);
1717 const struct glsl_type
*field_type
= glsl_get_struct_field(type
, i
);
1718 write_constant((char *)dst
+ field_offset
, c
->elements
[i
], field_type
);
1724 nir_lower_mem_constant_vars(nir_shader
*shader
,
1725 glsl_type_size_align_func type_info
)
1727 unsigned old_constant_data_size
= shader
->constant_data_size
;
1728 if (!lower_vars_to_explicit(shader
, &shader
->variables
,
1729 nir_var_mem_constant
, type_info
)) {
1730 nir_shader_preserve_all_metadata(shader
);
1734 shader
->constant_data
= rerzalloc_size(shader
, shader
->constant_data
,
1735 old_constant_data_size
,
1736 shader
->constant_data_size
);
1738 nir_foreach_variable_with_modes(var
, shader
, nir_var_mem_constant
) {
1739 write_constant((char *)shader
->constant_data
+ var
->data
.driver_location
,
1740 var
->constant_initializer
, var
->type
);
1743 nir_foreach_function(function
, shader
) {
1744 if (!function
->impl
)
1747 nir_lower_vars_to_explicit_types_impl(function
->impl
,
1748 nir_var_mem_constant
,
1756 * Return the offset source for a load/store intrinsic.
1759 nir_get_io_offset_src(nir_intrinsic_instr
*instr
)
1761 switch (instr
->intrinsic
) {
1762 case nir_intrinsic_load_input
:
1763 case nir_intrinsic_load_output
:
1764 case nir_intrinsic_load_shared
:
1765 case nir_intrinsic_load_uniform
:
1766 case nir_intrinsic_load_global
:
1767 case nir_intrinsic_load_global_constant
:
1768 case nir_intrinsic_load_scratch
:
1769 case nir_intrinsic_load_fs_input_interp_deltas
:
1770 case nir_intrinsic_shared_atomic_add
:
1771 case nir_intrinsic_shared_atomic_and
:
1772 case nir_intrinsic_shared_atomic_comp_swap
:
1773 case nir_intrinsic_shared_atomic_exchange
:
1774 case nir_intrinsic_shared_atomic_fadd
:
1775 case nir_intrinsic_shared_atomic_fcomp_swap
:
1776 case nir_intrinsic_shared_atomic_fmax
:
1777 case nir_intrinsic_shared_atomic_fmin
:
1778 case nir_intrinsic_shared_atomic_imax
:
1779 case nir_intrinsic_shared_atomic_imin
:
1780 case nir_intrinsic_shared_atomic_or
:
1781 case nir_intrinsic_shared_atomic_umax
:
1782 case nir_intrinsic_shared_atomic_umin
:
1783 case nir_intrinsic_shared_atomic_xor
:
1784 case nir_intrinsic_global_atomic_add
:
1785 case nir_intrinsic_global_atomic_and
:
1786 case nir_intrinsic_global_atomic_comp_swap
:
1787 case nir_intrinsic_global_atomic_exchange
:
1788 case nir_intrinsic_global_atomic_fadd
:
1789 case nir_intrinsic_global_atomic_fcomp_swap
:
1790 case nir_intrinsic_global_atomic_fmax
:
1791 case nir_intrinsic_global_atomic_fmin
:
1792 case nir_intrinsic_global_atomic_imax
:
1793 case nir_intrinsic_global_atomic_imin
:
1794 case nir_intrinsic_global_atomic_or
:
1795 case nir_intrinsic_global_atomic_umax
:
1796 case nir_intrinsic_global_atomic_umin
:
1797 case nir_intrinsic_global_atomic_xor
:
1798 return &instr
->src
[0];
1799 case nir_intrinsic_load_ubo
:
1800 case nir_intrinsic_load_ssbo
:
1801 case nir_intrinsic_load_input_vertex
:
1802 case nir_intrinsic_load_per_vertex_input
:
1803 case nir_intrinsic_load_per_vertex_output
:
1804 case nir_intrinsic_load_interpolated_input
:
1805 case nir_intrinsic_store_output
:
1806 case nir_intrinsic_store_shared
:
1807 case nir_intrinsic_store_global
:
1808 case nir_intrinsic_store_scratch
:
1809 case nir_intrinsic_ssbo_atomic_add
:
1810 case nir_intrinsic_ssbo_atomic_imin
:
1811 case nir_intrinsic_ssbo_atomic_umin
:
1812 case nir_intrinsic_ssbo_atomic_imax
:
1813 case nir_intrinsic_ssbo_atomic_umax
:
1814 case nir_intrinsic_ssbo_atomic_and
:
1815 case nir_intrinsic_ssbo_atomic_or
:
1816 case nir_intrinsic_ssbo_atomic_xor
:
1817 case nir_intrinsic_ssbo_atomic_exchange
:
1818 case nir_intrinsic_ssbo_atomic_comp_swap
:
1819 case nir_intrinsic_ssbo_atomic_fadd
:
1820 case nir_intrinsic_ssbo_atomic_fmin
:
1821 case nir_intrinsic_ssbo_atomic_fmax
:
1822 case nir_intrinsic_ssbo_atomic_fcomp_swap
:
1823 return &instr
->src
[1];
1824 case nir_intrinsic_store_ssbo
:
1825 case nir_intrinsic_store_per_vertex_output
:
1826 return &instr
->src
[2];
1833 * Return the vertex index source for a load/store per_vertex intrinsic.
1836 nir_get_io_vertex_index_src(nir_intrinsic_instr
*instr
)
1838 switch (instr
->intrinsic
) {
1839 case nir_intrinsic_load_per_vertex_input
:
1840 case nir_intrinsic_load_per_vertex_output
:
1841 return &instr
->src
[0];
1842 case nir_intrinsic_store_per_vertex_output
:
1843 return &instr
->src
[1];
1850 * Return the numeric constant that identify a NULL pointer for each address
1853 const nir_const_value
*
1854 nir_address_format_null_value(nir_address_format addr_format
)
1856 const static nir_const_value null_values
[][NIR_MAX_VEC_COMPONENTS
] = {
1857 [nir_address_format_32bit_global
] = {{0}},
1858 [nir_address_format_64bit_global
] = {{0}},
1859 [nir_address_format_64bit_bounded_global
] = {{0}},
1860 [nir_address_format_32bit_index_offset
] = {{.u32
= ~0}, {.u32
= ~0}},
1861 [nir_address_format_32bit_index_offset_pack64
] = {{.u64
= ~0ull}},
1862 [nir_address_format_vec2_index_32bit_offset
] = {{.u32
= ~0}, {.u32
= ~0}, {.u32
= ~0}},
1863 [nir_address_format_32bit_offset
] = {{.u32
= ~0}},
1864 [nir_address_format_32bit_offset_as_64bit
] = {{.u64
= ~0ull}},
1865 [nir_address_format_logical
] = {{.u32
= ~0}},
1868 assert(addr_format
< ARRAY_SIZE(null_values
));
1869 return null_values
[addr_format
];
1873 nir_build_addr_ieq(nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
1874 nir_address_format addr_format
)
1876 switch (addr_format
) {
1877 case nir_address_format_32bit_global
:
1878 case nir_address_format_64bit_global
:
1879 case nir_address_format_64bit_bounded_global
:
1880 case nir_address_format_32bit_index_offset
:
1881 case nir_address_format_vec2_index_32bit_offset
:
1882 case nir_address_format_32bit_offset
:
1883 return nir_ball_iequal(b
, addr0
, addr1
);
1885 case nir_address_format_32bit_offset_as_64bit
:
1886 assert(addr0
->num_components
== 1 && addr1
->num_components
== 1);
1887 return nir_ieq(b
, nir_u2u32(b
, addr0
), nir_u2u32(b
, addr1
));
1889 case nir_address_format_32bit_index_offset_pack64
:
1890 assert(addr0
->num_components
== 1 && addr1
->num_components
== 1);
1891 return nir_ball_iequal(b
, nir_unpack_64_2x32(b
, addr0
), nir_unpack_64_2x32(b
, addr1
));
1893 case nir_address_format_logical
:
1894 unreachable("Unsupported address format");
1897 unreachable("Invalid address format");
1901 nir_build_addr_isub(nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
1902 nir_address_format addr_format
)
1904 switch (addr_format
) {
1905 case nir_address_format_32bit_global
:
1906 case nir_address_format_64bit_global
:
1907 case nir_address_format_32bit_offset
:
1908 case nir_address_format_32bit_index_offset_pack64
:
1909 assert(addr0
->num_components
== 1);
1910 assert(addr1
->num_components
== 1);
1911 return nir_isub(b
, addr0
, addr1
);
1913 case nir_address_format_32bit_offset_as_64bit
:
1914 assert(addr0
->num_components
== 1);
1915 assert(addr1
->num_components
== 1);
1916 return nir_u2u64(b
, nir_isub(b
, nir_u2u32(b
, addr0
), nir_u2u32(b
, addr1
)));
1918 case nir_address_format_64bit_bounded_global
:
1919 return nir_isub(b
, addr_to_global(b
, addr0
, addr_format
),
1920 addr_to_global(b
, addr1
, addr_format
));
1922 case nir_address_format_32bit_index_offset
:
1923 assert(addr0
->num_components
== 2);
1924 assert(addr1
->num_components
== 2);
1925 /* Assume the same buffer index. */
1926 return nir_isub(b
, nir_channel(b
, addr0
, 1), nir_channel(b
, addr1
, 1));
1928 case nir_address_format_vec2_index_32bit_offset
:
1929 assert(addr0
->num_components
== 3);
1930 assert(addr1
->num_components
== 3);
1931 /* Assume the same buffer index. */
1932 return nir_isub(b
, nir_channel(b
, addr0
, 2), nir_channel(b
, addr1
, 2));
1934 case nir_address_format_logical
:
1935 unreachable("Unsupported address format");
1938 unreachable("Invalid address format");
1942 is_input(nir_intrinsic_instr
*intrin
)
1944 return intrin
->intrinsic
== nir_intrinsic_load_input
||
1945 intrin
->intrinsic
== nir_intrinsic_load_per_vertex_input
||
1946 intrin
->intrinsic
== nir_intrinsic_load_interpolated_input
||
1947 intrin
->intrinsic
== nir_intrinsic_load_fs_input_interp_deltas
;
1951 is_output(nir_intrinsic_instr
*intrin
)
1953 return intrin
->intrinsic
== nir_intrinsic_load_output
||
1954 intrin
->intrinsic
== nir_intrinsic_load_per_vertex_output
||
1955 intrin
->intrinsic
== nir_intrinsic_store_output
||
1956 intrin
->intrinsic
== nir_intrinsic_store_per_vertex_output
;
1959 static bool is_dual_slot(nir_intrinsic_instr
*intrin
)
1961 if (intrin
->intrinsic
== nir_intrinsic_store_output
||
1962 intrin
->intrinsic
== nir_intrinsic_store_per_vertex_output
) {
1963 return nir_src_bit_size(intrin
->src
[0]) == 64 &&
1964 nir_src_num_components(intrin
->src
[0]) >= 3;
1967 return nir_dest_bit_size(intrin
->dest
) &&
1968 nir_dest_num_components(intrin
->dest
) >= 3;
1972 * This pass adds constant offsets to instr->const_index[0] for input/output
1973 * intrinsics, and resets the offset source to 0. Non-constant offsets remain
1974 * unchanged - since we don't know what part of a compound variable is
1975 * accessed, we allocate storage for the entire thing. For drivers that use
1976 * nir_lower_io_to_temporaries() before nir_lower_io(), this guarantees that
1977 * the offset source will be 0, so that they don't have to add it in manually.
1981 add_const_offset_to_base_block(nir_block
*block
, nir_builder
*b
,
1982 nir_variable_mode mode
)
1984 bool progress
= false;
1985 nir_foreach_instr_safe(instr
, block
) {
1986 if (instr
->type
!= nir_instr_type_intrinsic
)
1989 nir_intrinsic_instr
*intrin
= nir_instr_as_intrinsic(instr
);
1991 if ((mode
== nir_var_shader_in
&& is_input(intrin
)) ||
1992 (mode
== nir_var_shader_out
&& is_output(intrin
))) {
1993 nir_src
*offset
= nir_get_io_offset_src(intrin
);
1995 if (nir_src_is_const(*offset
)) {
1996 unsigned off
= nir_src_as_uint(*offset
);
1998 nir_intrinsic_set_base(intrin
, nir_intrinsic_base(intrin
) + off
);
2000 nir_io_semantics sem
= nir_intrinsic_io_semantics(intrin
);
2001 sem
.location
+= off
;
2002 /* non-indirect indexing should reduce num_slots */
2003 sem
.num_slots
= is_dual_slot(intrin
) ? 2 : 1;
2004 nir_intrinsic_set_io_semantics(intrin
, sem
);
2006 b
->cursor
= nir_before_instr(&intrin
->instr
);
2007 nir_instr_rewrite_src(&intrin
->instr
, offset
,
2008 nir_src_for_ssa(nir_imm_int(b
, 0)));
2018 nir_io_add_const_offset_to_base(nir_shader
*nir
, nir_variable_mode mode
)
2020 bool progress
= false;
2022 nir_foreach_function(f
, nir
) {
2025 nir_builder_init(&b
, f
->impl
);
2026 nir_foreach_block(block
, f
->impl
) {
2027 progress
|= add_const_offset_to_base_block(block
, &b
, mode
);