src/compiler/nir/nir_lower_io.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *    Jason Ekstrand (jason@jlekstrand.net)
  26  *
  27  */
  28
  29 /*
  30  * This lowering pass converts references to input/output variables with
  31  * loads/stores to actual input/output intrinsics.
  32  */
  33
  34 #include "nir.h"
  35 #include "nir_builder.h"
  36
  37 struct lower_io_state {
  38    nir_builder builder;
  39    void *mem_ctx;
  40    int (*type_size)(const struct glsl_type *type);
  41    nir_variable_mode modes;
  42    nir_lower_io_options options;
  43 };
  44
  45 void
  46 nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
  47                          int (*type_size)(const struct glsl_type *))
  48 {
  49    unsigned location = 0;
  50
  51    nir_foreach_variable(var, var_list) {
  52       /*
  53        * UBO's have their own address spaces, so don't count them towards the
  54        * number of global uniforms
  55        */
  56       if ((var->data.mode == nir_var_uniform || var->data.mode == nir_var_shader_storage) &&
  57           var->interface_type != NULL)
  58          continue;
  59
  60       var->data.driver_location = location;
  61       location += type_size(var->type);
  62    }
  63
  64    *size = location;
  65 }
  66
  67 /**
  68  * Return true if the given variable is a per-vertex input/output array.
  69  * (such as geometry shader inputs).
  70  */
  71 bool
  72 nir_is_per_vertex_io(nir_variable *var, gl_shader_stage stage)
  73 {
  74    if (var->data.patch || !glsl_type_is_array(var->type))
  75       return false;
  76
  77    if (var->data.mode == nir_var_shader_in)
  78       return stage == MESA_SHADER_GEOMETRY ||
  79              stage == MESA_SHADER_TESS_CTRL ||
  80              stage == MESA_SHADER_TESS_EVAL;
  81
  82    if (var->data.mode == nir_var_shader_out)
  83       return stage == MESA_SHADER_TESS_CTRL;
  84
  85    return false;
  86 }
  87
  88 static nir_ssa_def *
  89 get_io_offset(nir_builder *b, nir_deref_var *deref,
  90               nir_ssa_def **vertex_index,
  91               int (*type_size)(const struct glsl_type *),
  92               unsigned *component)
  93 {
  94    nir_deref *tail = &deref->deref;
  95
  96    /* For per-vertex input arrays (i.e. geometry shader inputs), keep the
  97     * outermost array index separate.  Process the rest normally.
  98     */
  99    if (vertex_index != NULL) {
 100       tail = tail->child;
 101       nir_deref_array *deref_array = nir_deref_as_array(tail);
 102
 103       nir_ssa_def *vtx = nir_imm_int(b, deref_array->base_offset);
 104       if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
 105          vtx = nir_iadd(b, vtx, nir_ssa_for_src(b, deref_array->indirect, 1));
 106       }
 107       *vertex_index = vtx;
 108    }
 109
 110    if (deref->var->data.compact) {
 111       assert(tail->child->deref_type == nir_deref_type_array);
 112       assert(glsl_type_is_scalar(glsl_without_array(deref->var->type)));
 113       nir_deref_array *deref_array = nir_deref_as_array(tail->child);
 114       /* We always lower indirect dereferences for "compact" array vars. */
 115       assert(deref_array->deref_array_type == nir_deref_array_type_direct);
 116
 117       const unsigned total_offset = *component + deref_array->base_offset;
 118       const unsigned slot_offset = total_offset / 4;
 119       *component = total_offset % 4;
 120       return nir_imm_int(b, type_size(glsl_vec4_type()) * slot_offset);
 121    }
 122
 123    /* Just emit code and let constant-folding go to town */
 124    nir_ssa_def *offset = nir_imm_int(b, 0);
 125
 126    while (tail->child != NULL) {
 127       const struct glsl_type *parent_type = tail->type;
 128       tail = tail->child;
 129
 130       if (tail->deref_type == nir_deref_type_array) {
 131          nir_deref_array *deref_array = nir_deref_as_array(tail);
 132          unsigned size = type_size(tail->type);
 133
 134          offset = nir_iadd(b, offset,
 135                            nir_imm_int(b, size * deref_array->base_offset));
 136
 137          if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
 138             nir_ssa_def *mul =
 139                nir_imul(b, nir_imm_int(b, size),
 140                         nir_ssa_for_src(b, deref_array->indirect, 1));
 141
 142             offset = nir_iadd(b, offset, mul);
 143          }
 144       } else if (tail->deref_type == nir_deref_type_struct) {
 145          nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
 146
 147          unsigned field_offset = 0;
 148          for (unsigned i = 0; i < deref_struct->index; i++) {
 149             field_offset += type_size(glsl_get_struct_field(parent_type, i));
 150          }
 151          offset = nir_iadd(b, offset, nir_imm_int(b, field_offset));
 152       }
 153    }
 154
 155    return offset;
 156 }
 157
 158 static nir_intrinsic_instr *
 159 lower_load(nir_intrinsic_instr *intrin, struct lower_io_state *state,
 160            nir_ssa_def *vertex_index, nir_ssa_def *offset,
 161            unsigned component)
 162 {
 163    const nir_shader *nir = state->builder.shader;
 164    nir_variable *var = intrin->variables[0]->var;
 165    nir_variable_mode mode = var->data.mode;
 166    nir_ssa_def *barycentric = NULL;
 167
 168    nir_intrinsic_op op;
 169    switch (mode) {
 170    case nir_var_shader_in:
 171       if (nir->stage == MESA_SHADER_FRAGMENT &&
 172           nir->options->use_interpolated_input_intrinsics &&
 173           var->data.interpolation != INTERP_MODE_FLAT) {
 174          assert(vertex_index == NULL);
 175
 176          nir_intrinsic_op bary_op;
 177          if (var->data.sample ||
 178              (state->options & nir_lower_io_force_sample_interpolation))
 179             bary_op = nir_intrinsic_load_barycentric_sample;
 180          else if (var->data.centroid)
 181             bary_op = nir_intrinsic_load_barycentric_centroid;
 182          else
 183             bary_op = nir_intrinsic_load_barycentric_pixel;
 184
 185          barycentric = nir_load_barycentric(&state->builder, bary_op,
 186                                             var->data.interpolation);
 187          op = nir_intrinsic_load_interpolated_input;
 188       } else {
 189          op = vertex_index ? nir_intrinsic_load_per_vertex_input :
 190                              nir_intrinsic_load_input;
 191       }
 192       break;
 193    case nir_var_shader_out:
 194       op = vertex_index ? nir_intrinsic_load_per_vertex_output :
 195                           nir_intrinsic_load_output;
 196       break;
 197    case nir_var_uniform:
 198       op = nir_intrinsic_load_uniform;
 199       break;
 200    case nir_var_shared:
 201       op = nir_intrinsic_load_shared;
 202       break;
 203    default:
 204       unreachable("Unknown variable mode");
 205    }
 206
 207    nir_intrinsic_instr *load = nir_intrinsic_instr_create(state->mem_ctx, op);
 208    load->num_components = intrin->num_components;
 209
 210    nir_intrinsic_set_base(load, var->data.driver_location);
 211    if (mode == nir_var_shader_in || mode == nir_var_shader_out)
 212       nir_intrinsic_set_component(load, component);
 213
 214    if (load->intrinsic == nir_intrinsic_load_uniform)
 215       nir_intrinsic_set_range(load, state->type_size(var->type));
 216
 217    if (vertex_index) {
 218       load->src[0] = nir_src_for_ssa(vertex_index);
 219       load->src[1] = nir_src_for_ssa(offset);
 220    } else if (barycentric) {
 221       load->src[0] = nir_src_for_ssa(barycentric);
 222       load->src[1] = nir_src_for_ssa(offset);
 223    } else {
 224       load->src[0] = nir_src_for_ssa(offset);
 225    }
 226
 227    return load;
 228 }
 229
 230 static nir_intrinsic_instr *
 231 lower_store(nir_intrinsic_instr *intrin, struct lower_io_state *state,
 232             nir_ssa_def *vertex_index, nir_ssa_def *offset,
 233             unsigned component)
 234 {
 235    nir_variable *var = intrin->variables[0]->var;
 236    nir_variable_mode mode = var->data.mode;
 237
 238    nir_intrinsic_op op;
 239    if (mode == nir_var_shared) {
 240       op = nir_intrinsic_store_shared;
 241    } else {
 242       assert(mode == nir_var_shader_out);
 243       op = vertex_index ? nir_intrinsic_store_per_vertex_output :
 244                           nir_intrinsic_store_output;
 245    }
 246
 247    nir_intrinsic_instr *store = nir_intrinsic_instr_create(state->mem_ctx, op);
 248    store->num_components = intrin->num_components;
 249
 250    nir_src_copy(&store->src[0], &intrin->src[0], store);
 251
 252    nir_intrinsic_set_base(store, var->data.driver_location);
 253
 254    if (mode == nir_var_shader_out)
 255       nir_intrinsic_set_component(store, component);
 256
 257    nir_intrinsic_set_write_mask(store, nir_intrinsic_write_mask(intrin));
 258
 259    if (vertex_index)
 260       store->src[1] = nir_src_for_ssa(vertex_index);
 261
 262    store->src[vertex_index ? 2 : 1] = nir_src_for_ssa(offset);
 263
 264    return store;
 265 }
 266
 267 static nir_intrinsic_instr *
 268 lower_atomic(nir_intrinsic_instr *intrin, struct lower_io_state *state,
 269              nir_ssa_def *offset)
 270 {
 271    nir_variable *var = intrin->variables[0]->var;
 272
 273    assert(var->data.mode == nir_var_shared);
 274
 275    nir_intrinsic_op op;
 276    switch (intrin->intrinsic) {
 277 #define OP(O) case nir_intrinsic_var_##O: op = nir_intrinsic_shared_##O; break;
 278    OP(atomic_exchange)
 279    OP(atomic_comp_swap)
 280    OP(atomic_add)
 281    OP(atomic_imin)
 282    OP(atomic_umin)
 283    OP(atomic_imax)
 284    OP(atomic_umax)
 285    OP(atomic_and)
 286    OP(atomic_or)
 287    OP(atomic_xor)
 288 #undef OP
 289    default:
 290       unreachable("Invalid atomic");
 291    }
 292
 293    nir_intrinsic_instr *atomic =
 294       nir_intrinsic_instr_create(state->mem_ctx, op);
 295
 296    nir_intrinsic_set_base(atomic, var->data.driver_location);
 297
 298    atomic->src[0] = nir_src_for_ssa(offset);
 299    for (unsigned i = 0; i < nir_intrinsic_infos[intrin->intrinsic].num_srcs; i++) {
 300       nir_src_copy(&atomic->src[i+1], &intrin->src[i], atomic);
 301    }
 302
 303    return atomic;
 304 }
 305
 306 static nir_intrinsic_instr *
 307 lower_interpolate_at(nir_intrinsic_instr *intrin, struct lower_io_state *state,
 308                      nir_ssa_def *offset, unsigned component)
 309 {
 310    nir_variable *var = intrin->variables[0]->var;
 311
 312    assert(var->data.mode == nir_var_shader_in);
 313
 314    /* Ignore interpolateAt() for flat variables - flat is flat. */
 315    if (var->data.interpolation == INTERP_MODE_FLAT)
 316       return lower_load(intrin, state, NULL, offset, component);
 317
 318    nir_intrinsic_op bary_op;
 319    switch (intrin->intrinsic) {
 320    case nir_intrinsic_interp_var_at_centroid:
 321       bary_op = (state->options & nir_lower_io_force_sample_interpolation) ?
 322                 nir_intrinsic_load_barycentric_sample :
 323                 nir_intrinsic_load_barycentric_centroid;
 324       break;
 325    case nir_intrinsic_interp_var_at_sample:
 326       bary_op = nir_intrinsic_load_barycentric_at_sample;
 327       break;
 328    case nir_intrinsic_interp_var_at_offset:
 329       bary_op = nir_intrinsic_load_barycentric_at_offset;
 330       break;
 331    default:
 332       unreachable("Bogus interpolateAt() intrinsic.");
 333    }
 334
 335    nir_intrinsic_instr *bary_setup =
 336       nir_intrinsic_instr_create(state->mem_ctx, bary_op);
 337
 338    nir_ssa_dest_init(&bary_setup->instr, &bary_setup->dest, 2, 32, NULL);
 339    nir_intrinsic_set_interp_mode(bary_setup, var->data.interpolation);
 340
 341    if (intrin->intrinsic != nir_intrinsic_interp_var_at_centroid)
 342       nir_src_copy(&bary_setup->src[0], &intrin->src[0], bary_setup);
 343
 344    nir_builder_instr_insert(&state->builder, &bary_setup->instr);
 345
 346    nir_intrinsic_instr *load =
 347       nir_intrinsic_instr_create(state->mem_ctx,
 348                                  nir_intrinsic_load_interpolated_input);
 349    load->num_components = intrin->num_components;
 350
 351    nir_intrinsic_set_base(load, var->data.driver_location);
 352    nir_intrinsic_set_component(load, component);
 353
 354    load->src[0] = nir_src_for_ssa(&bary_setup->dest.ssa);
 355    load->src[1] = nir_src_for_ssa(offset);
 356
 357    return load;
 358 }
 359
 360 static bool
 361 nir_lower_io_block(nir_block *block,
 362                    struct lower_io_state *state)
 363 {
 364    nir_builder *b = &state->builder;
 365    const nir_shader_compiler_options *options = b->shader->options;
 366
 367    nir_foreach_instr_safe(instr, block) {
 368       if (instr->type != nir_instr_type_intrinsic)
 369          continue;
 370
 371       nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
 372
 373       switch (intrin->intrinsic) {
 374       case nir_intrinsic_load_var:
 375       case nir_intrinsic_store_var:
 376       case nir_intrinsic_var_atomic_add:
 377       case nir_intrinsic_var_atomic_imin:
 378       case nir_intrinsic_var_atomic_umin:
 379       case nir_intrinsic_var_atomic_imax:
 380       case nir_intrinsic_var_atomic_umax:
 381       case nir_intrinsic_var_atomic_and:
 382       case nir_intrinsic_var_atomic_or:
 383       case nir_intrinsic_var_atomic_xor:
 384       case nir_intrinsic_var_atomic_exchange:
 385       case nir_intrinsic_var_atomic_comp_swap:
 386          /* We can lower the io for this nir instrinsic */
 387          break;
 388       case nir_intrinsic_interp_var_at_centroid:
 389       case nir_intrinsic_interp_var_at_sample:
 390       case nir_intrinsic_interp_var_at_offset:
 391          /* We can optionally lower these to load_interpolated_input */
 392          if (options->use_interpolated_input_intrinsics)
 393             break;
 394       default:
 395          /* We can't lower the io for this nir instrinsic, so skip it */
 396          continue;
 397       }
 398
 399       nir_variable *var = intrin->variables[0]->var;
 400       nir_variable_mode mode = var->data.mode;
 401
 402       if ((state->modes & mode) == 0)
 403          continue;
 404
 405       if (mode != nir_var_shader_in &&
 406           mode != nir_var_shader_out &&
 407           mode != nir_var_shared &&
 408           mode != nir_var_uniform)
 409          continue;
 410
 411       b->cursor = nir_before_instr(instr);
 412
 413       const bool per_vertex = nir_is_per_vertex_io(var, b->shader->stage);
 414
 415       nir_ssa_def *offset;
 416       nir_ssa_def *vertex_index = NULL;
 417       unsigned component_offset = var->data.location_frac;
 418
 419       offset = get_io_offset(b, intrin->variables[0],
 420                              per_vertex ? &vertex_index : NULL,
 421                              state->type_size, &component_offset);
 422
 423       nir_intrinsic_instr *replacement;
 424
 425       switch (intrin->intrinsic) {
 426       case nir_intrinsic_load_var:
 427          replacement = lower_load(intrin, state, vertex_index, offset,
 428                                   component_offset);
 429          break;
 430
 431       case nir_intrinsic_store_var:
 432          replacement = lower_store(intrin, state, vertex_index, offset,
 433                                    component_offset);
 434          break;
 435
 436       case nir_intrinsic_var_atomic_add:
 437       case nir_intrinsic_var_atomic_imin:
 438       case nir_intrinsic_var_atomic_umin:
 439       case nir_intrinsic_var_atomic_imax:
 440       case nir_intrinsic_var_atomic_umax:
 441       case nir_intrinsic_var_atomic_and:
 442       case nir_intrinsic_var_atomic_or:
 443       case nir_intrinsic_var_atomic_xor:
 444       case nir_intrinsic_var_atomic_exchange:
 445       case nir_intrinsic_var_atomic_comp_swap:
 446          assert(vertex_index == NULL);
 447          replacement = lower_atomic(intrin, state, offset);
 448          break;
 449
 450       case nir_intrinsic_interp_var_at_centroid:
 451       case nir_intrinsic_interp_var_at_sample:
 452       case nir_intrinsic_interp_var_at_offset:
 453          assert(vertex_index == NULL);
 454          replacement = lower_interpolate_at(intrin, state, offset,
 455                                             component_offset);
 456          break;
 457
 458       default:
 459          continue;
 460       }
 461
 462       if (nir_intrinsic_infos[intrin->intrinsic].has_dest) {
 463          if (intrin->dest.is_ssa) {
 464             nir_ssa_dest_init(&replacement->instr, &replacement->dest,
 465                               intrin->dest.ssa.num_components,
 466                               intrin->dest.ssa.bit_size, NULL);
 467             nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
 468                                      nir_src_for_ssa(&replacement->dest.ssa));
 469          } else {
 470             nir_dest_copy(&replacement->dest, &intrin->dest, state->mem_ctx);
 471          }
 472       }
 473
 474       nir_instr_insert_before(&intrin->instr, &replacement->instr);
 475       nir_instr_remove(&intrin->instr);
 476    }
 477
 478    return true;
 479 }
 480
 481 static void
 482 nir_lower_io_impl(nir_function_impl *impl,
 483                   nir_variable_mode modes,
 484                   int (*type_size)(const struct glsl_type *),
 485                   nir_lower_io_options options)
 486 {
 487    struct lower_io_state state;
 488
 489    nir_builder_init(&state.builder, impl);
 490    state.mem_ctx = ralloc_parent(impl);
 491    state.modes = modes;
 492    state.type_size = type_size;
 493    state.options = options;
 494
 495    nir_foreach_block(block, impl) {
 496       nir_lower_io_block(block, &state);
 497    }
 498
 499    nir_metadata_preserve(impl, nir_metadata_block_index |
 500                                nir_metadata_dominance);
 501 }
 502
 503 void
 504 nir_lower_io(nir_shader *shader, nir_variable_mode modes,
 505              int (*type_size)(const struct glsl_type *),
 506              nir_lower_io_options options)
 507 {
 508    nir_foreach_function(function, shader) {
 509       if (function->impl) {
 510          nir_lower_io_impl(function->impl, modes, type_size, options);
 511       }
 512    }
 513 }
 514
 515 /**
 516  * Return the offset soruce for a load/store intrinsic.
 517  */
 518 nir_src *
 519 nir_get_io_offset_src(nir_intrinsic_instr *instr)
 520 {
 521    switch (instr->intrinsic) {
 522    case nir_intrinsic_load_input:
 523    case nir_intrinsic_load_output:
 524    case nir_intrinsic_load_uniform:
 525       return &instr->src[0];
 526    case nir_intrinsic_load_ubo:
 527    case nir_intrinsic_load_ssbo:
 528    case nir_intrinsic_load_per_vertex_input:
 529    case nir_intrinsic_load_per_vertex_output:
 530    case nir_intrinsic_load_interpolated_input:
 531    case nir_intrinsic_store_output:
 532       return &instr->src[1];
 533    case nir_intrinsic_store_ssbo:
 534    case nir_intrinsic_store_per_vertex_output:
 535       return &instr->src[2];
 536    default:
 537       return NULL;
 538    }
 539 }
 540
 541 /**
 542  * Return the vertex index source for a load/store per_vertex intrinsic.
 543  */
 544 nir_src *
 545 nir_get_io_vertex_index_src(nir_intrinsic_instr *instr)
 546 {
 547    switch (instr->intrinsic) {
 548    case nir_intrinsic_load_per_vertex_input:
 549    case nir_intrinsic_load_per_vertex_output:
 550       return &instr->src[0];
 551    case nir_intrinsic_store_per_vertex_output:
 552       return &instr->src[1];
 553    default:
 554       return NULL;
 555    }
 556 }