nir: Add docs to nir_lower[_explicit]_io
[mesa.git] / src / compiler / nir / nir_lower_io.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 * Jason Ekstrand (jason@jlekstrand.net)
26 *
27 */
28
29 /*
30 * This lowering pass converts references to input/output variables with
31 * loads/stores to actual input/output intrinsics.
32 */
33
34 #include "nir.h"
35 #include "nir_builder.h"
36 #include "nir_deref.h"
37
38 #include "util/u_math.h"
39
40 struct lower_io_state {
41 void *dead_ctx;
42 nir_builder builder;
43 int (*type_size)(const struct glsl_type *type, bool);
44 nir_variable_mode modes;
45 nir_lower_io_options options;
46 };
47
48 static nir_intrinsic_op
49 ssbo_atomic_for_deref(nir_intrinsic_op deref_op)
50 {
51 switch (deref_op) {
52 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_ssbo_##O;
53 OP(atomic_exchange)
54 OP(atomic_comp_swap)
55 OP(atomic_add)
56 OP(atomic_imin)
57 OP(atomic_umin)
58 OP(atomic_imax)
59 OP(atomic_umax)
60 OP(atomic_and)
61 OP(atomic_or)
62 OP(atomic_xor)
63 OP(atomic_fadd)
64 OP(atomic_fmin)
65 OP(atomic_fmax)
66 OP(atomic_fcomp_swap)
67 #undef OP
68 default:
69 unreachable("Invalid SSBO atomic");
70 }
71 }
72
73 static nir_intrinsic_op
74 global_atomic_for_deref(nir_intrinsic_op deref_op)
75 {
76 switch (deref_op) {
77 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_global_##O;
78 OP(atomic_exchange)
79 OP(atomic_comp_swap)
80 OP(atomic_add)
81 OP(atomic_imin)
82 OP(atomic_umin)
83 OP(atomic_imax)
84 OP(atomic_umax)
85 OP(atomic_and)
86 OP(atomic_or)
87 OP(atomic_xor)
88 OP(atomic_fadd)
89 OP(atomic_fmin)
90 OP(atomic_fmax)
91 OP(atomic_fcomp_swap)
92 #undef OP
93 default:
94 unreachable("Invalid SSBO atomic");
95 }
96 }
97
98 static nir_intrinsic_op
99 shared_atomic_for_deref(nir_intrinsic_op deref_op)
100 {
101 switch (deref_op) {
102 #define OP(O) case nir_intrinsic_deref_##O: return nir_intrinsic_shared_##O;
103 OP(atomic_exchange)
104 OP(atomic_comp_swap)
105 OP(atomic_add)
106 OP(atomic_imin)
107 OP(atomic_umin)
108 OP(atomic_imax)
109 OP(atomic_umax)
110 OP(atomic_and)
111 OP(atomic_or)
112 OP(atomic_xor)
113 OP(atomic_fadd)
114 OP(atomic_fmin)
115 OP(atomic_fmax)
116 OP(atomic_fcomp_swap)
117 #undef OP
118 default:
119 unreachable("Invalid shared atomic");
120 }
121 }
122
123 void
124 nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
125 int (*type_size)(const struct glsl_type *, bool))
126 {
127 unsigned location = 0;
128
129 nir_foreach_variable(var, var_list) {
130 /*
131 * UBOs have their own address spaces, so don't count them towards the
132 * number of global uniforms
133 */
134 if (var->data.mode == nir_var_mem_ubo || var->data.mode == nir_var_mem_ssbo)
135 continue;
136
137 var->data.driver_location = location;
138 bool bindless_type_size = var->data.mode == nir_var_shader_in ||
139 var->data.mode == nir_var_shader_out ||
140 var->data.bindless;
141 location += type_size(var->type, bindless_type_size);
142 }
143
144 *size = location;
145 }
146
147 /**
148 * Return true if the given variable is a per-vertex input/output array.
149 * (such as geometry shader inputs).
150 */
151 bool
152 nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage)
153 {
154 if (var->data.patch || !glsl_type_is_array(var->type))
155 return false;
156
157 if (var->data.mode == nir_var_shader_in)
158 return stage == MESA_SHADER_GEOMETRY ||
159 stage == MESA_SHADER_TESS_CTRL ||
160 stage == MESA_SHADER_TESS_EVAL;
161
162 if (var->data.mode == nir_var_shader_out)
163 return stage == MESA_SHADER_TESS_CTRL;
164
165 return false;
166 }
167
168 static nir_ssa_def *
169 get_io_offset(nir_builder *b, nir_deref_instr *deref,
170 nir_ssa_def **vertex_index,
171 int (*type_size)(const struct glsl_type *, bool),
172 unsigned *component, bool bts)
173 {
174 nir_deref_path path;
175 nir_deref_path_init(&path, deref, NULL);
176
177 assert(path.path[0]->deref_type == nir_deref_type_var);
178 nir_deref_instr **p = &path.path[1];
179
180 /* For per-vertex input arrays (i.e. geometry shader inputs), keep the
181 * outermost array index separate. Process the rest normally.
182 */
183 if (vertex_index != NULL) {
184 assert((*p)->deref_type == nir_deref_type_array);
185 *vertex_index = nir_ssa_for_src(b, (*p)->arr.index, 1);
186 p++;
187 }
188
189 if (path.path[0]->var->data.compact) {
190 assert((*p)->deref_type == nir_deref_type_array);
191 assert(glsl_type_is_scalar((*p)->type));
192
193 /* We always lower indirect dereferences for "compact" array vars. */
194 const unsigned index = nir_src_as_uint((*p)->arr.index);
195 const unsigned total_offset = *component + index;
196 const unsigned slot_offset = total_offset / 4;
197 *component = total_offset % 4;
198 return nir_imm_int(b, type_size(glsl_vec4_type(), bts) * slot_offset);
199 }
200
201 /* Just emit code and let constant-folding go to town */
202 nir_ssa_def *offset = nir_imm_int(b, 0);
203
204 for (; *p; p++) {
205 if ((*p)->deref_type == nir_deref_type_array) {
206 unsigned size = type_size((*p)->type, bts);
207
208 nir_ssa_def *mul =
209 nir_amul_imm(b, nir_ssa_for_src(b, (*p)->arr.index, 1), size);
210
211 offset = nir_iadd(b, offset, mul);
212 } else if ((*p)->deref_type == nir_deref_type_struct) {
213 /* p starts at path[1], so this is safe */
214 nir_deref_instr *parent = *(p - 1);
215
216 unsigned field_offset = 0;
217 for (unsigned i = 0; i < (*p)->strct.index; i++) {
218 field_offset += type_size(glsl_get_struct_field(parent->type, i), bts);
219 }
220 offset = nir_iadd_imm(b, offset, field_offset);
221 } else {
222 unreachable("Unsupported deref type");
223 }
224 }
225
226 nir_deref_path_finish(&path);
227
228 return offset;
229 }
230
231 static nir_ssa_def *
232 emit_load(struct lower_io_state *state,
233 nir_ssa_def *vertex_index, nir_variable *var, nir_ssa_def *offset,
234 unsigned component, unsigned num_components, unsigned bit_size,
235 nir_alu_type type)
236 {
237 nir_builder *b = &state->builder;
238 const nir_shader *nir = b->shader;
239 nir_variable_mode mode = var->data.mode;
240 nir_ssa_def *barycentric = NULL;
241
242 nir_intrinsic_op op;
243 switch (mode) {
244 case nir_var_shader_in:
245 if (nir->info.stage == MESA_SHADER_FRAGMENT &&
246 nir->options->use_interpolated_input_intrinsics &&
247 var->data.interpolation != INTERP_MODE_FLAT) {
248 if (var->data.interpolation == INTERP_MODE_EXPLICIT) {
249 assert(vertex_index != NULL);
250 op = nir_intrinsic_load_input_vertex;
251 } else {
252 assert(vertex_index == NULL);
253
254 nir_intrinsic_op bary_op;
255 if (var->data.sample ||
256 (state->options & nir_lower_io_force_sample_interpolation))
257 bary_op = nir_intrinsic_load_barycentric_sample;
258 else if (var->data.centroid)
259 bary_op = nir_intrinsic_load_barycentric_centroid;
260 else
261 bary_op = nir_intrinsic_load_barycentric_pixel;
262
263 barycentric = nir_load_barycentric(&state->builder, bary_op,
264 var->data.interpolation);
265 op = nir_intrinsic_load_interpolated_input;
266 }
267 } else {
268 op = vertex_index ? nir_intrinsic_load_per_vertex_input :
269 nir_intrinsic_load_input;
270 }
271 break;
272 case nir_var_shader_out:
273 op = vertex_index ? nir_intrinsic_load_per_vertex_output :
274 nir_intrinsic_load_output;
275 break;
276 case nir_var_uniform:
277 op = nir_intrinsic_load_uniform;
278 break;
279 default:
280 unreachable("Unknown variable mode");
281 }
282
283 nir_intrinsic_instr *load =
284 nir_intrinsic_instr_create(state->builder.shader, op);
285 load->num_components = num_components;
286
287 nir_intrinsic_set_base(load, var->data.driver_location);
288 if (mode == nir_var_shader_in || mode == nir_var_shader_out)
289 nir_intrinsic_set_component(load, component);
290
291 if (load->intrinsic == nir_intrinsic_load_uniform)
292 nir_intrinsic_set_range(load,
293 state->type_size(var->type, var->data.bindless));
294
295 if (load->intrinsic == nir_intrinsic_load_input ||
296 load->intrinsic == nir_intrinsic_load_input_vertex ||
297 load->intrinsic == nir_intrinsic_load_uniform)
298 nir_intrinsic_set_type(load, type);
299
300 if (vertex_index) {
301 load->src[0] = nir_src_for_ssa(vertex_index);
302 load->src[1] = nir_src_for_ssa(offset);
303 } else if (barycentric) {
304 load->src[0] = nir_src_for_ssa(barycentric);
305 load->src[1] = nir_src_for_ssa(offset);
306 } else {
307 load->src[0] = nir_src_for_ssa(offset);
308 }
309
310 nir_ssa_dest_init(&load->instr, &load->dest,
311 num_components, bit_size, NULL);
312 nir_builder_instr_insert(b, &load->instr);
313
314 return &load->dest.ssa;
315 }
316
317 static nir_ssa_def *
318 lower_load(nir_intrinsic_instr *intrin, struct lower_io_state *state,
319 nir_ssa_def *vertex_index, nir_variable *var, nir_ssa_def *offset,
320 unsigned component, const struct glsl_type *type)
321 {
322 assert(intrin->dest.is_ssa);
323 if (intrin->dest.ssa.bit_size == 64 &&
324 (state->options & nir_lower_io_lower_64bit_to_32)) {
325 nir_builder *b = &state->builder;
326
327 const unsigned slot_size = state->type_size(glsl_dvec_type(2), false);
328
329 nir_ssa_def *comp64[4];
330 assert(component == 0 || component == 2);
331 unsigned dest_comp = 0;
332 while (dest_comp < intrin->dest.ssa.num_components) {
333 const unsigned num_comps =
334 MIN2(intrin->dest.ssa.num_components - dest_comp,
335 (4 - component) / 2);
336
337 nir_ssa_def *data32 =
338 emit_load(state, vertex_index, var, offset, component,
339 num_comps * 2, 32, nir_type_uint32);
340 for (unsigned i = 0; i < num_comps; i++) {
341 comp64[dest_comp + i] =
342 nir_pack_64_2x32(b, nir_channels(b, data32, 3 << (i * 2)));
343 }
344
345 /* Only the first store has a component offset */
346 component = 0;
347 dest_comp += num_comps;
348 offset = nir_iadd_imm(b, offset, slot_size);
349 }
350
351 return nir_vec(b, comp64, intrin->dest.ssa.num_components);
352 } else if (intrin->dest.ssa.bit_size == 1) {
353 /* Booleans are 32-bit */
354 assert(glsl_type_is_boolean(type));
355 return nir_b2b1(&state->builder,
356 emit_load(state, vertex_index, var, offset, component,
357 intrin->dest.ssa.num_components, 32,
358 nir_type_bool32));
359 } else {
360 return emit_load(state, vertex_index, var, offset, component,
361 intrin->dest.ssa.num_components,
362 intrin->dest.ssa.bit_size,
363 nir_get_nir_type_for_glsl_type(type));
364 }
365 }
366
367 static void
368 emit_store(struct lower_io_state *state, nir_ssa_def *data,
369 nir_ssa_def *vertex_index, nir_variable *var, nir_ssa_def *offset,
370 unsigned component, unsigned num_components,
371 nir_component_mask_t write_mask, nir_alu_type type)
372 {
373 nir_builder *b = &state->builder;
374 nir_variable_mode mode = var->data.mode;
375
376 assert(mode == nir_var_shader_out);
377 nir_intrinsic_op op;
378 op = vertex_index ? nir_intrinsic_store_per_vertex_output :
379 nir_intrinsic_store_output;
380
381 nir_intrinsic_instr *store =
382 nir_intrinsic_instr_create(state->builder.shader, op);
383 store->num_components = num_components;
384
385 store->src[0] = nir_src_for_ssa(data);
386
387 nir_intrinsic_set_base(store, var->data.driver_location);
388
389 if (mode == nir_var_shader_out)
390 nir_intrinsic_set_component(store, component);
391
392 if (store->intrinsic == nir_intrinsic_store_output)
393 nir_intrinsic_set_type(store, type);
394
395 nir_intrinsic_set_write_mask(store, write_mask);
396
397 if (vertex_index)
398 store->src[1] = nir_src_for_ssa(vertex_index);
399
400 store->src[vertex_index ? 2 : 1] = nir_src_for_ssa(offset);
401
402 nir_builder_instr_insert(b, &store->instr);
403 }
404
405 static void
406 lower_store(nir_intrinsic_instr *intrin, struct lower_io_state *state,
407 nir_ssa_def *vertex_index, nir_variable *var, nir_ssa_def *offset,
408 unsigned component, const struct glsl_type *type)
409 {
410 assert(intrin->src[1].is_ssa);
411 if (intrin->src[1].ssa->bit_size == 64 &&
412 (state->options & nir_lower_io_lower_64bit_to_32)) {
413 nir_builder *b = &state->builder;
414
415 const unsigned slot_size = state->type_size(glsl_dvec_type(2), false);
416
417 assert(component == 0 || component == 2);
418 unsigned src_comp = 0;
419 nir_component_mask_t write_mask = nir_intrinsic_write_mask(intrin);
420 while (src_comp < intrin->num_components) {
421 const unsigned num_comps =
422 MIN2(intrin->num_components - src_comp,
423 (4 - component) / 2);
424
425 if (write_mask & BITFIELD_MASK(num_comps)) {
426 nir_ssa_def *data =
427 nir_channels(b, intrin->src[1].ssa,
428 BITFIELD_RANGE(src_comp, num_comps));
429 nir_ssa_def *data32 = nir_bitcast_vector(b, data, 32);
430
431 nir_component_mask_t write_mask32 = 0;
432 for (unsigned i = 0; i < num_comps; i++) {
433 if (write_mask & BITFIELD_MASK(num_comps) & (1 << i))
434 write_mask32 |= 3 << (i * 2);
435 }
436
437 emit_store(state, data32, vertex_index, var, offset,
438 component, data32->num_components, write_mask32,
439 nir_type_uint32);
440 }
441
442 /* Only the first store has a component offset */
443 component = 0;
444 src_comp += num_comps;
445 write_mask >>= num_comps;
446 offset = nir_iadd_imm(b, offset, slot_size);
447 }
448 } else if (intrin->dest.ssa.bit_size == 1) {
449 /* Booleans are 32-bit */
450 assert(glsl_type_is_boolean(type));
451 nir_ssa_def *b32_val = nir_b2b32(&state->builder, intrin->src[1].ssa);
452 emit_store(state, b32_val, vertex_index, var, offset,
453 component, intrin->num_components,
454 nir_intrinsic_write_mask(intrin),
455 nir_type_bool32);
456 } else {
457 emit_store(state, intrin->src[1].ssa, vertex_index, var, offset,
458 component, intrin->num_components,
459 nir_intrinsic_write_mask(intrin),
460 nir_get_nir_type_for_glsl_type(type));
461 }
462 }
463
464 static nir_ssa_def *
465 lower_interpolate_at(nir_intrinsic_instr *intrin, struct lower_io_state *state,
466 nir_variable *var, nir_ssa_def *offset, unsigned component,
467 const struct glsl_type *type)
468 {
469 nir_builder *b = &state->builder;
470 assert(var->data.mode == nir_var_shader_in);
471
472 /* Ignore interpolateAt() for flat variables - flat is flat. Lower
473 * interpolateAtVertex() for explicit variables.
474 */
475 if (var->data.interpolation == INTERP_MODE_FLAT ||
476 var->data.interpolation == INTERP_MODE_EXPLICIT) {
477 nir_ssa_def *vertex_index = NULL;
478
479 if (var->data.interpolation == INTERP_MODE_EXPLICIT) {
480 assert(intrin->intrinsic == nir_intrinsic_interp_deref_at_vertex);
481 vertex_index = intrin->src[1].ssa;
482 }
483
484 return lower_load(intrin, state, vertex_index, var, offset, component, type);
485 }
486
487 /* None of the supported APIs allow interpolation on 64-bit things */
488 assert(intrin->dest.is_ssa && intrin->dest.ssa.bit_size <= 32);
489
490 nir_intrinsic_op bary_op;
491 switch (intrin->intrinsic) {
492 case nir_intrinsic_interp_deref_at_centroid:
493 bary_op = (state->options & nir_lower_io_force_sample_interpolation) ?
494 nir_intrinsic_load_barycentric_sample :
495 nir_intrinsic_load_barycentric_centroid;
496 break;
497 case nir_intrinsic_interp_deref_at_sample:
498 bary_op = nir_intrinsic_load_barycentric_at_sample;
499 break;
500 case nir_intrinsic_interp_deref_at_offset:
501 bary_op = nir_intrinsic_load_barycentric_at_offset;
502 break;
503 default:
504 unreachable("Bogus interpolateAt() intrinsic.");
505 }
506
507 nir_intrinsic_instr *bary_setup =
508 nir_intrinsic_instr_create(state->builder.shader, bary_op);
509
510 nir_ssa_dest_init(&bary_setup->instr, &bary_setup->dest, 2, 32, NULL);
511 nir_intrinsic_set_interp_mode(bary_setup, var->data.interpolation);
512
513 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_sample ||
514 intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
515 intrin->intrinsic == nir_intrinsic_interp_deref_at_vertex)
516 nir_src_copy(&bary_setup->src[0], &intrin->src[1], bary_setup);
517
518 nir_builder_instr_insert(b, &bary_setup->instr);
519
520 nir_intrinsic_instr *load =
521 nir_intrinsic_instr_create(state->builder.shader,
522 nir_intrinsic_load_interpolated_input);
523 load->num_components = intrin->num_components;
524
525 nir_intrinsic_set_base(load, var->data.driver_location);
526 nir_intrinsic_set_component(load, component);
527
528 load->src[0] = nir_src_for_ssa(&bary_setup->dest.ssa);
529 load->src[1] = nir_src_for_ssa(offset);
530
531 assert(intrin->dest.is_ssa);
532 nir_ssa_dest_init(&load->instr, &load->dest,
533 intrin->dest.ssa.num_components,
534 intrin->dest.ssa.bit_size, NULL);
535 nir_builder_instr_insert(b, &load->instr);
536
537 return &load->dest.ssa;
538 }
539
540 static bool
541 nir_lower_io_block(nir_block *block,
542 struct lower_io_state *state)
543 {
544 nir_builder *b = &state->builder;
545 const nir_shader_compiler_options *options = b->shader->options;
546 bool progress = false;
547
548 nir_foreach_instr_safe(instr, block) {
549 if (instr->type != nir_instr_type_intrinsic)
550 continue;
551
552 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
553
554 switch (intrin->intrinsic) {
555 case nir_intrinsic_load_deref:
556 case nir_intrinsic_store_deref:
557 /* We can lower the io for this nir instrinsic */
558 break;
559 case nir_intrinsic_interp_deref_at_centroid:
560 case nir_intrinsic_interp_deref_at_sample:
561 case nir_intrinsic_interp_deref_at_offset:
562 case nir_intrinsic_interp_deref_at_vertex:
563 /* We can optionally lower these to load_interpolated_input */
564 if (options->use_interpolated_input_intrinsics)
565 break;
566 default:
567 /* We can't lower the io for this nir instrinsic, so skip it */
568 continue;
569 }
570
571 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
572
573 nir_variable_mode mode = deref->mode;
574 assert(util_is_power_of_two_nonzero(mode));
575 if ((state->modes & mode) == 0)
576 continue;
577
578 nir_variable *var = nir_deref_instr_get_variable(deref);
579
580 b->cursor = nir_before_instr(instr);
581
582 const bool per_vertex = nir_is_per_vertex_io(var, b->shader->info.stage);
583
584 nir_ssa_def *offset;
585 nir_ssa_def *vertex_index = NULL;
586 unsigned component_offset = var->data.location_frac;
587 bool bindless_type_size = mode == nir_var_shader_in ||
588 mode == nir_var_shader_out ||
589 var->data.bindless;
590
591 offset = get_io_offset(b, deref, per_vertex ? &vertex_index : NULL,
592 state->type_size, &component_offset,
593 bindless_type_size);
594
595 nir_ssa_def *replacement = NULL;
596
597 switch (intrin->intrinsic) {
598 case nir_intrinsic_load_deref:
599 replacement = lower_load(intrin, state, vertex_index, var, offset,
600 component_offset, deref->type);
601 break;
602
603 case nir_intrinsic_store_deref:
604 lower_store(intrin, state, vertex_index, var, offset,
605 component_offset, deref->type);
606 break;
607
608 case nir_intrinsic_interp_deref_at_centroid:
609 case nir_intrinsic_interp_deref_at_sample:
610 case nir_intrinsic_interp_deref_at_offset:
611 case nir_intrinsic_interp_deref_at_vertex:
612 assert(vertex_index == NULL);
613 replacement = lower_interpolate_at(intrin, state, var, offset,
614 component_offset, deref->type);
615 break;
616
617 default:
618 continue;
619 }
620
621 if (replacement) {
622 nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
623 nir_src_for_ssa(replacement));
624 }
625 nir_instr_remove(&intrin->instr);
626 progress = true;
627 }
628
629 return progress;
630 }
631
632 static bool
633 nir_lower_io_impl(nir_function_impl *impl,
634 nir_variable_mode modes,
635 int (*type_size)(const struct glsl_type *, bool),
636 nir_lower_io_options options)
637 {
638 struct lower_io_state state;
639 bool progress = false;
640
641 nir_builder_init(&state.builder, impl);
642 state.dead_ctx = ralloc_context(NULL);
643 state.modes = modes;
644 state.type_size = type_size;
645 state.options = options;
646
647 ASSERTED nir_variable_mode supported_modes =
648 nir_var_shader_in | nir_var_shader_out | nir_var_uniform;
649 assert(!(modes & ~supported_modes));
650
651 nir_foreach_block(block, impl) {
652 progress |= nir_lower_io_block(block, &state);
653 }
654
655 ralloc_free(state.dead_ctx);
656
657 nir_metadata_preserve(impl, nir_metadata_block_index |
658 nir_metadata_dominance);
659 return progress;
660 }
661
662 /** Lower load/store_deref intrinsics on I/O variables to offset-based intrinsics
663 *
664 * This pass is intended to be used for cross-stage shader I/O and driver-
665 * managed uniforms to turn deref-based access into a simpler model using
666 * locations or offsets. For fragment shader inputs, it can optionally turn
667 * load_deref into an explicit interpolation using barycentrics coming from
668 * one of the load_barycentric_* intrinsics. This pass requires that all
669 * deref chains are complete and contain no casts.
670 */
671 bool
672 nir_lower_io(nir_shader *shader, nir_variable_mode modes,
673 int (*type_size)(const struct glsl_type *, bool),
674 nir_lower_io_options options)
675 {
676 bool progress = false;
677
678 nir_foreach_function(function, shader) {
679 if (function->impl) {
680 progress |= nir_lower_io_impl(function->impl, modes,
681 type_size, options);
682 }
683 }
684
685 return progress;
686 }
687
688 static unsigned
689 type_scalar_size_bytes(const struct glsl_type *type)
690 {
691 assert(glsl_type_is_vector_or_scalar(type) ||
692 glsl_type_is_matrix(type));
693 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
694 }
695
696 static nir_ssa_def *
697 build_addr_iadd(nir_builder *b, nir_ssa_def *addr,
698 nir_address_format addr_format, nir_ssa_def *offset)
699 {
700 assert(offset->num_components == 1);
701 assert(addr->bit_size == offset->bit_size);
702
703 switch (addr_format) {
704 case nir_address_format_32bit_global:
705 case nir_address_format_64bit_global:
706 case nir_address_format_32bit_offset:
707 assert(addr->num_components == 1);
708 return nir_iadd(b, addr, offset);
709
710 case nir_address_format_64bit_bounded_global:
711 assert(addr->num_components == 4);
712 return nir_vec4(b, nir_channel(b, addr, 0),
713 nir_channel(b, addr, 1),
714 nir_channel(b, addr, 2),
715 nir_iadd(b, nir_channel(b, addr, 3), offset));
716
717 case nir_address_format_32bit_index_offset:
718 assert(addr->num_components == 2);
719 return nir_vec2(b, nir_channel(b, addr, 0),
720 nir_iadd(b, nir_channel(b, addr, 1), offset));
721 case nir_address_format_vec2_index_32bit_offset:
722 assert(addr->num_components == 3);
723 return nir_vec3(b, nir_channel(b, addr, 0), nir_channel(b, addr, 1),
724 nir_iadd(b, nir_channel(b, addr, 2), offset));
725 case nir_address_format_logical:
726 unreachable("Unsupported address format");
727 }
728 unreachable("Invalid address format");
729 }
730
731 static nir_ssa_def *
732 build_addr_iadd_imm(nir_builder *b, nir_ssa_def *addr,
733 nir_address_format addr_format, int64_t offset)
734 {
735 return build_addr_iadd(b, addr, addr_format,
736 nir_imm_intN_t(b, offset, addr->bit_size));
737 }
738
739 static nir_ssa_def *
740 addr_to_index(nir_builder *b, nir_ssa_def *addr,
741 nir_address_format addr_format)
742 {
743 if (addr_format == nir_address_format_32bit_index_offset) {
744 assert(addr->num_components == 2);
745 return nir_channel(b, addr, 0);
746 } else if (addr_format == nir_address_format_vec2_index_32bit_offset) {
747 assert(addr->num_components == 3);
748 return nir_channels(b, addr, 0x3);
749 } else {
750 unreachable("bad address format for index");
751 }
752 }
753
754 static nir_ssa_def *
755 addr_to_offset(nir_builder *b, nir_ssa_def *addr,
756 nir_address_format addr_format)
757 {
758 if (addr_format == nir_address_format_32bit_index_offset) {
759 assert(addr->num_components == 2);
760 return nir_channel(b, addr, 1);
761 } else if (addr_format == nir_address_format_vec2_index_32bit_offset) {
762 assert(addr->num_components == 3);
763 return nir_channel(b, addr, 2);
764 } else {
765 unreachable("bad address format for offset");
766 }
767 }
768
769 /** Returns true if the given address format resolves to a global address */
770 static bool
771 addr_format_is_global(nir_address_format addr_format)
772 {
773 return addr_format == nir_address_format_32bit_global ||
774 addr_format == nir_address_format_64bit_global ||
775 addr_format == nir_address_format_64bit_bounded_global;
776 }
777
778 static nir_ssa_def *
779 addr_to_global(nir_builder *b, nir_ssa_def *addr,
780 nir_address_format addr_format)
781 {
782 switch (addr_format) {
783 case nir_address_format_32bit_global:
784 case nir_address_format_64bit_global:
785 assert(addr->num_components == 1);
786 return addr;
787
788 case nir_address_format_64bit_bounded_global:
789 assert(addr->num_components == 4);
790 return nir_iadd(b, nir_pack_64_2x32(b, nir_channels(b, addr, 0x3)),
791 nir_u2u64(b, nir_channel(b, addr, 3)));
792
793 case nir_address_format_32bit_index_offset:
794 case nir_address_format_vec2_index_32bit_offset:
795 case nir_address_format_32bit_offset:
796 case nir_address_format_logical:
797 unreachable("Cannot get a 64-bit address with this address format");
798 }
799
800 unreachable("Invalid address format");
801 }
802
803 static bool
804 addr_format_needs_bounds_check(nir_address_format addr_format)
805 {
806 return addr_format == nir_address_format_64bit_bounded_global;
807 }
808
809 static nir_ssa_def *
810 addr_is_in_bounds(nir_builder *b, nir_ssa_def *addr,
811 nir_address_format addr_format, unsigned size)
812 {
813 assert(addr_format == nir_address_format_64bit_bounded_global);
814 assert(addr->num_components == 4);
815 return nir_ige(b, nir_channel(b, addr, 2),
816 nir_iadd_imm(b, nir_channel(b, addr, 3), size));
817 }
818
819 static nir_ssa_def *
820 build_explicit_io_load(nir_builder *b, nir_intrinsic_instr *intrin,
821 nir_ssa_def *addr, nir_address_format addr_format,
822 unsigned num_components)
823 {
824 nir_variable_mode mode = nir_src_as_deref(intrin->src[0])->mode;
825
826 nir_intrinsic_op op;
827 switch (mode) {
828 case nir_var_mem_ubo:
829 op = nir_intrinsic_load_ubo;
830 break;
831 case nir_var_mem_ssbo:
832 if (addr_format_is_global(addr_format))
833 op = nir_intrinsic_load_global;
834 else
835 op = nir_intrinsic_load_ssbo;
836 break;
837 case nir_var_mem_global:
838 assert(addr_format_is_global(addr_format));
839 op = nir_intrinsic_load_global;
840 break;
841 case nir_var_shader_in:
842 assert(addr_format_is_global(addr_format));
843 op = nir_intrinsic_load_kernel_input;
844 break;
845 case nir_var_mem_shared:
846 assert(addr_format == nir_address_format_32bit_offset);
847 op = nir_intrinsic_load_shared;
848 break;
849 default:
850 unreachable("Unsupported explicit IO variable mode");
851 }
852
853 nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, op);
854
855 if (addr_format_is_global(addr_format)) {
856 load->src[0] = nir_src_for_ssa(addr_to_global(b, addr, addr_format));
857 } else if (addr_format == nir_address_format_32bit_offset) {
858 assert(addr->num_components == 1);
859 load->src[0] = nir_src_for_ssa(addr);
860 } else {
861 load->src[0] = nir_src_for_ssa(addr_to_index(b, addr, addr_format));
862 load->src[1] = nir_src_for_ssa(addr_to_offset(b, addr, addr_format));
863 }
864
865 if (mode != nir_var_shader_in && mode != nir_var_mem_shared)
866 nir_intrinsic_set_access(load, nir_intrinsic_access(intrin));
867
868 unsigned bit_size = intrin->dest.ssa.bit_size;
869 if (bit_size == 1) {
870 /* TODO: Make the native bool bit_size an option. */
871 bit_size = 32;
872 }
873
874 /* TODO: We should try and provide a better alignment. For OpenCL, we need
875 * to plumb the alignment through from SPIR-V when we have one.
876 */
877 nir_intrinsic_set_align(load, bit_size / 8, 0);
878
879 assert(intrin->dest.is_ssa);
880 load->num_components = num_components;
881 nir_ssa_dest_init(&load->instr, &load->dest, num_components,
882 bit_size, intrin->dest.ssa.name);
883
884 assert(bit_size % 8 == 0);
885
886 nir_ssa_def *result;
887 if (addr_format_needs_bounds_check(addr_format)) {
888 /* The Vulkan spec for robustBufferAccess gives us quite a few options
889 * as to what we can do with an OOB read. Unfortunately, returning
890 * undefined values isn't one of them so we return an actual zero.
891 */
892 nir_ssa_def *zero = nir_imm_zero(b, load->num_components, bit_size);
893
894 const unsigned load_size = (bit_size / 8) * load->num_components;
895 nir_push_if(b, addr_is_in_bounds(b, addr, addr_format, load_size));
896
897 nir_builder_instr_insert(b, &load->instr);
898
899 nir_pop_if(b, NULL);
900
901 result = nir_if_phi(b, &load->dest.ssa, zero);
902 } else {
903 nir_builder_instr_insert(b, &load->instr);
904 result = &load->dest.ssa;
905 }
906
907 if (intrin->dest.ssa.bit_size == 1) {
908 /* For shared, we can go ahead and use NIR's and/or the back-end's
909 * standard encoding for booleans rather than forcing a 0/1 boolean.
910 * This should save an instruction or two.
911 */
912 if (mode == nir_var_mem_shared)
913 result = nir_b2b1(b, result);
914 else
915 result = nir_i2b(b, result);
916 }
917
918 return result;
919 }
920
921 static void
922 build_explicit_io_store(nir_builder *b, nir_intrinsic_instr *intrin,
923 nir_ssa_def *addr, nir_address_format addr_format,
924 nir_ssa_def *value, nir_component_mask_t write_mask)
925 {
926 nir_variable_mode mode = nir_src_as_deref(intrin->src[0])->mode;
927
928 nir_intrinsic_op op;
929 switch (mode) {
930 case nir_var_mem_ssbo:
931 if (addr_format_is_global(addr_format))
932 op = nir_intrinsic_store_global;
933 else
934 op = nir_intrinsic_store_ssbo;
935 break;
936 case nir_var_mem_global:
937 assert(addr_format_is_global(addr_format));
938 op = nir_intrinsic_store_global;
939 break;
940 case nir_var_mem_shared:
941 assert(addr_format == nir_address_format_32bit_offset);
942 op = nir_intrinsic_store_shared;
943 break;
944 default:
945 unreachable("Unsupported explicit IO variable mode");
946 }
947
948 nir_intrinsic_instr *store = nir_intrinsic_instr_create(b->shader, op);
949
950 if (value->bit_size == 1) {
951 /* For shared, we can go ahead and use NIR's and/or the back-end's
952 * standard encoding for booleans rather than forcing a 0/1 boolean.
953 * This should save an instruction or two.
954 *
955 * TODO: Make the native bool bit_size an option.
956 */
957 if (mode == nir_var_mem_shared)
958 value = nir_b2b32(b, value);
959 else
960 value = nir_b2i(b, value, 32);
961 }
962
963 store->src[0] = nir_src_for_ssa(value);
964 if (addr_format_is_global(addr_format)) {
965 store->src[1] = nir_src_for_ssa(addr_to_global(b, addr, addr_format));
966 } else if (addr_format == nir_address_format_32bit_offset) {
967 assert(addr->num_components == 1);
968 store->src[1] = nir_src_for_ssa(addr);
969 } else {
970 store->src[1] = nir_src_for_ssa(addr_to_index(b, addr, addr_format));
971 store->src[2] = nir_src_for_ssa(addr_to_offset(b, addr, addr_format));
972 }
973
974 nir_intrinsic_set_write_mask(store, write_mask);
975
976 if (mode != nir_var_mem_shared)
977 nir_intrinsic_set_access(store, nir_intrinsic_access(intrin));
978
979 /* TODO: We should try and provide a better alignment. For OpenCL, we need
980 * to plumb the alignment through from SPIR-V when we have one.
981 */
982 nir_intrinsic_set_align(store, value->bit_size / 8, 0);
983
984 assert(value->num_components == 1 ||
985 value->num_components == intrin->num_components);
986 store->num_components = value->num_components;
987
988 assert(value->bit_size % 8 == 0);
989
990 if (addr_format_needs_bounds_check(addr_format)) {
991 const unsigned store_size = (value->bit_size / 8) * store->num_components;
992 nir_push_if(b, addr_is_in_bounds(b, addr, addr_format, store_size));
993
994 nir_builder_instr_insert(b, &store->instr);
995
996 nir_pop_if(b, NULL);
997 } else {
998 nir_builder_instr_insert(b, &store->instr);
999 }
1000 }
1001
1002 static nir_ssa_def *
1003 build_explicit_io_atomic(nir_builder *b, nir_intrinsic_instr *intrin,
1004 nir_ssa_def *addr, nir_address_format addr_format)
1005 {
1006 nir_variable_mode mode = nir_src_as_deref(intrin->src[0])->mode;
1007 const unsigned num_data_srcs =
1008 nir_intrinsic_infos[intrin->intrinsic].num_srcs - 1;
1009
1010 nir_intrinsic_op op;
1011 switch (mode) {
1012 case nir_var_mem_ssbo:
1013 if (addr_format_is_global(addr_format))
1014 op = global_atomic_for_deref(intrin->intrinsic);
1015 else
1016 op = ssbo_atomic_for_deref(intrin->intrinsic);
1017 break;
1018 case nir_var_mem_global:
1019 assert(addr_format_is_global(addr_format));
1020 op = global_atomic_for_deref(intrin->intrinsic);
1021 break;
1022 case nir_var_mem_shared:
1023 assert(addr_format == nir_address_format_32bit_offset);
1024 op = shared_atomic_for_deref(intrin->intrinsic);
1025 break;
1026 default:
1027 unreachable("Unsupported explicit IO variable mode");
1028 }
1029
1030 nir_intrinsic_instr *atomic = nir_intrinsic_instr_create(b->shader, op);
1031
1032 unsigned src = 0;
1033 if (addr_format_is_global(addr_format)) {
1034 atomic->src[src++] = nir_src_for_ssa(addr_to_global(b, addr, addr_format));
1035 } else if (addr_format == nir_address_format_32bit_offset) {
1036 assert(addr->num_components == 1);
1037 atomic->src[src++] = nir_src_for_ssa(addr);
1038 } else {
1039 atomic->src[src++] = nir_src_for_ssa(addr_to_index(b, addr, addr_format));
1040 atomic->src[src++] = nir_src_for_ssa(addr_to_offset(b, addr, addr_format));
1041 }
1042 for (unsigned i = 0; i < num_data_srcs; i++) {
1043 atomic->src[src++] = nir_src_for_ssa(intrin->src[1 + i].ssa);
1044 }
1045
1046 /* Global atomics don't have access flags because they assume that the
1047 * address may be non-uniform.
1048 */
1049 if (!addr_format_is_global(addr_format) && mode != nir_var_mem_shared)
1050 nir_intrinsic_set_access(atomic, nir_intrinsic_access(intrin));
1051
1052 assert(intrin->dest.ssa.num_components == 1);
1053 nir_ssa_dest_init(&atomic->instr, &atomic->dest,
1054 1, intrin->dest.ssa.bit_size, intrin->dest.ssa.name);
1055
1056 assert(atomic->dest.ssa.bit_size % 8 == 0);
1057
1058 if (addr_format_needs_bounds_check(addr_format)) {
1059 const unsigned atomic_size = atomic->dest.ssa.bit_size / 8;
1060 nir_push_if(b, addr_is_in_bounds(b, addr, addr_format, atomic_size));
1061
1062 nir_builder_instr_insert(b, &atomic->instr);
1063
1064 nir_pop_if(b, NULL);
1065 return nir_if_phi(b, &atomic->dest.ssa,
1066 nir_ssa_undef(b, 1, atomic->dest.ssa.bit_size));
1067 } else {
1068 nir_builder_instr_insert(b, &atomic->instr);
1069 return &atomic->dest.ssa;
1070 }
1071 }
1072
1073 nir_ssa_def *
1074 nir_explicit_io_address_from_deref(nir_builder *b, nir_deref_instr *deref,
1075 nir_ssa_def *base_addr,
1076 nir_address_format addr_format)
1077 {
1078 assert(deref->dest.is_ssa);
1079 switch (deref->deref_type) {
1080 case nir_deref_type_var:
1081 assert(deref->mode & (nir_var_shader_in | nir_var_mem_shared));
1082 return nir_imm_intN_t(b, deref->var->data.driver_location,
1083 deref->dest.ssa.bit_size);
1084
1085 case nir_deref_type_array: {
1086 nir_deref_instr *parent = nir_deref_instr_parent(deref);
1087
1088 unsigned stride = glsl_get_explicit_stride(parent->type);
1089 if ((glsl_type_is_matrix(parent->type) &&
1090 glsl_matrix_type_is_row_major(parent->type)) ||
1091 (glsl_type_is_vector(parent->type) && stride == 0))
1092 stride = type_scalar_size_bytes(parent->type);
1093
1094 assert(stride > 0);
1095
1096 nir_ssa_def *index = nir_ssa_for_src(b, deref->arr.index, 1);
1097 index = nir_i2i(b, index, base_addr->bit_size);
1098 return build_addr_iadd(b, base_addr, addr_format,
1099 nir_amul_imm(b, index, stride));
1100 }
1101
1102 case nir_deref_type_ptr_as_array: {
1103 nir_ssa_def *index = nir_ssa_for_src(b, deref->arr.index, 1);
1104 index = nir_i2i(b, index, base_addr->bit_size);
1105 unsigned stride = nir_deref_instr_ptr_as_array_stride(deref);
1106 return build_addr_iadd(b, base_addr, addr_format,
1107 nir_amul_imm(b, index, stride));
1108 }
1109
1110 case nir_deref_type_array_wildcard:
1111 unreachable("Wildcards should be lowered by now");
1112 break;
1113
1114 case nir_deref_type_struct: {
1115 nir_deref_instr *parent = nir_deref_instr_parent(deref);
1116 int offset = glsl_get_struct_field_offset(parent->type,
1117 deref->strct.index);
1118 assert(offset >= 0);
1119 return build_addr_iadd_imm(b, base_addr, addr_format, offset);
1120 }
1121
1122 case nir_deref_type_cast:
1123 /* Nothing to do here */
1124 return base_addr;
1125 }
1126
1127 unreachable("Invalid NIR deref type");
1128 }
1129
1130 void
1131 nir_lower_explicit_io_instr(nir_builder *b,
1132 nir_intrinsic_instr *intrin,
1133 nir_ssa_def *addr,
1134 nir_address_format addr_format)
1135 {
1136 b->cursor = nir_after_instr(&intrin->instr);
1137
1138 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
1139 unsigned vec_stride = glsl_get_explicit_stride(deref->type);
1140 unsigned scalar_size = type_scalar_size_bytes(deref->type);
1141 assert(vec_stride == 0 || glsl_type_is_vector(deref->type));
1142 assert(vec_stride == 0 || vec_stride >= scalar_size);
1143
1144 if (intrin->intrinsic == nir_intrinsic_load_deref) {
1145 nir_ssa_def *value;
1146 if (vec_stride > scalar_size) {
1147 nir_ssa_def *comps[4] = { NULL, };
1148 for (unsigned i = 0; i < intrin->num_components; i++) {
1149 nir_ssa_def *comp_addr = build_addr_iadd_imm(b, addr, addr_format,
1150 vec_stride * i);
1151 comps[i] = build_explicit_io_load(b, intrin, comp_addr,
1152 addr_format, 1);
1153 }
1154 value = nir_vec(b, comps, intrin->num_components);
1155 } else {
1156 value = build_explicit_io_load(b, intrin, addr, addr_format,
1157 intrin->num_components);
1158 }
1159 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(value));
1160 } else if (intrin->intrinsic == nir_intrinsic_store_deref) {
1161 assert(intrin->src[1].is_ssa);
1162 nir_ssa_def *value = intrin->src[1].ssa;
1163 nir_component_mask_t write_mask = nir_intrinsic_write_mask(intrin);
1164 if (vec_stride > scalar_size) {
1165 for (unsigned i = 0; i < intrin->num_components; i++) {
1166 if (!(write_mask & (1 << i)))
1167 continue;
1168
1169 nir_ssa_def *comp_addr = build_addr_iadd_imm(b, addr, addr_format,
1170 vec_stride * i);
1171 build_explicit_io_store(b, intrin, comp_addr, addr_format,
1172 nir_channel(b, value, i), 1);
1173 }
1174 } else {
1175 build_explicit_io_store(b, intrin, addr, addr_format,
1176 value, write_mask);
1177 }
1178 } else {
1179 nir_ssa_def *value =
1180 build_explicit_io_atomic(b, intrin, addr, addr_format);
1181 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(value));
1182 }
1183
1184 nir_instr_remove(&intrin->instr);
1185 }
1186
1187 static void
1188 lower_explicit_io_deref(nir_builder *b, nir_deref_instr *deref,
1189 nir_address_format addr_format)
1190 {
1191 /* Just delete the deref if it's not used. We can't use
1192 * nir_deref_instr_remove_if_unused here because it may remove more than
1193 * one deref which could break our list walking since we walk the list
1194 * backwards.
1195 */
1196 assert(list_is_empty(&deref->dest.ssa.if_uses));
1197 if (list_is_empty(&deref->dest.ssa.uses)) {
1198 nir_instr_remove(&deref->instr);
1199 return;
1200 }
1201
1202 b->cursor = nir_after_instr(&deref->instr);
1203
1204 nir_ssa_def *base_addr = NULL;
1205 if (deref->deref_type != nir_deref_type_var) {
1206 assert(deref->parent.is_ssa);
1207 base_addr = deref->parent.ssa;
1208 }
1209
1210 nir_ssa_def *addr = nir_explicit_io_address_from_deref(b, deref, base_addr,
1211 addr_format);
1212
1213 nir_instr_remove(&deref->instr);
1214 nir_ssa_def_rewrite_uses(&deref->dest.ssa, nir_src_for_ssa(addr));
1215 }
1216
1217 static void
1218 lower_explicit_io_access(nir_builder *b, nir_intrinsic_instr *intrin,
1219 nir_address_format addr_format)
1220 {
1221 assert(intrin->src[0].is_ssa);
1222 nir_lower_explicit_io_instr(b, intrin, intrin->src[0].ssa, addr_format);
1223 }
1224
1225 static void
1226 lower_explicit_io_array_length(nir_builder *b, nir_intrinsic_instr *intrin,
1227 nir_address_format addr_format)
1228 {
1229 b->cursor = nir_after_instr(&intrin->instr);
1230
1231 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
1232
1233 assert(glsl_type_is_array(deref->type));
1234 assert(glsl_get_length(deref->type) == 0);
1235 unsigned stride = glsl_get_explicit_stride(deref->type);
1236 assert(stride > 0);
1237
1238 assert(addr_format == nir_address_format_32bit_index_offset ||
1239 addr_format == nir_address_format_vec2_index_32bit_offset);
1240 nir_ssa_def *addr = &deref->dest.ssa;
1241 nir_ssa_def *index = addr_to_index(b, addr, addr_format);
1242 nir_ssa_def *offset = addr_to_offset(b, addr, addr_format);
1243
1244 nir_intrinsic_instr *bsize =
1245 nir_intrinsic_instr_create(b->shader, nir_intrinsic_get_buffer_size);
1246 bsize->src[0] = nir_src_for_ssa(index);
1247 nir_ssa_dest_init(&bsize->instr, &bsize->dest, 1, 32, NULL);
1248 nir_builder_instr_insert(b, &bsize->instr);
1249
1250 nir_ssa_def *arr_size =
1251 nir_idiv(b, nir_isub(b, &bsize->dest.ssa, offset),
1252 nir_imm_int(b, stride));
1253
1254 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(arr_size));
1255 nir_instr_remove(&intrin->instr);
1256 }
1257
1258 static bool
1259 nir_lower_explicit_io_impl(nir_function_impl *impl, nir_variable_mode modes,
1260 nir_address_format addr_format)
1261 {
1262 bool progress = false;
1263
1264 nir_builder b;
1265 nir_builder_init(&b, impl);
1266
1267 /* Walk in reverse order so that we can see the full deref chain when we
1268 * lower the access operations. We lower them assuming that the derefs
1269 * will be turned into address calculations later.
1270 */
1271 nir_foreach_block_reverse(block, impl) {
1272 nir_foreach_instr_reverse_safe(instr, block) {
1273 switch (instr->type) {
1274 case nir_instr_type_deref: {
1275 nir_deref_instr *deref = nir_instr_as_deref(instr);
1276 if (deref->mode & modes) {
1277 lower_explicit_io_deref(&b, deref, addr_format);
1278 progress = true;
1279 }
1280 break;
1281 }
1282
1283 case nir_instr_type_intrinsic: {
1284 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
1285 switch (intrin->intrinsic) {
1286 case nir_intrinsic_load_deref:
1287 case nir_intrinsic_store_deref:
1288 case nir_intrinsic_deref_atomic_add:
1289 case nir_intrinsic_deref_atomic_imin:
1290 case nir_intrinsic_deref_atomic_umin:
1291 case nir_intrinsic_deref_atomic_imax:
1292 case nir_intrinsic_deref_atomic_umax:
1293 case nir_intrinsic_deref_atomic_and:
1294 case nir_intrinsic_deref_atomic_or:
1295 case nir_intrinsic_deref_atomic_xor:
1296 case nir_intrinsic_deref_atomic_exchange:
1297 case nir_intrinsic_deref_atomic_comp_swap:
1298 case nir_intrinsic_deref_atomic_fadd:
1299 case nir_intrinsic_deref_atomic_fmin:
1300 case nir_intrinsic_deref_atomic_fmax:
1301 case nir_intrinsic_deref_atomic_fcomp_swap: {
1302 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
1303 if (deref->mode & modes) {
1304 lower_explicit_io_access(&b, intrin, addr_format);
1305 progress = true;
1306 }
1307 break;
1308 }
1309
1310 case nir_intrinsic_deref_buffer_array_length: {
1311 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
1312 if (deref->mode & modes) {
1313 lower_explicit_io_array_length(&b, intrin, addr_format);
1314 progress = true;
1315 }
1316 break;
1317 }
1318
1319 default:
1320 break;
1321 }
1322 break;
1323 }
1324
1325 default:
1326 /* Nothing to do */
1327 break;
1328 }
1329 }
1330 }
1331
1332 if (progress) {
1333 nir_metadata_preserve(impl, nir_metadata_block_index |
1334 nir_metadata_dominance);
1335 }
1336
1337 return progress;
1338 }
1339
1340 /** Lower explicitly laid out I/O access to byte offset/address intrinsics
1341 *
1342 * This pass is intended to be used for any I/O which touches memory external
1343 * to the shader or which is directly visible to the client. It requires that
1344 * all data types in the given modes have a explicit stride/offset decorations
1345 * to tell it exactly how to calculate the offset/address for the given load,
1346 * store, or atomic operation. If the offset/stride information does not come
1347 * from the client explicitly (as with shared variables in GL or Vulkan),
1348 * nir_lower_vars_to_explicit_types() can be used to add them.
1349 *
1350 * Unlike nir_lower_io, this pass is fully capable of handling incomplete
1351 * pointer chains which may contain cast derefs. It does so by walking the
1352 * deref chain backwards and simply replacing each deref, one at a time, with
1353 * the appropriate address calculation. The pass takes a nir_address_format
1354 * parameter which describes how the offset or address is to be represented
1355 * during calculations. By ensuring that the address is always in a
1356 * consistent format, pointers can safely be conjured from thin air by the
1357 * driver, stored to variables, passed through phis, etc.
1358 *
1359 * The one exception to the simple algorithm described above is for handling
1360 * row-major matrices in which case we may look down one additional level of
1361 * the deref chain.
1362 */
1363 bool
1364 nir_lower_explicit_io(nir_shader *shader, nir_variable_mode modes,
1365 nir_address_format addr_format)
1366 {
1367 bool progress = false;
1368
1369 nir_foreach_function(function, shader) {
1370 if (function->impl &&
1371 nir_lower_explicit_io_impl(function->impl, modes, addr_format))
1372 progress = true;
1373 }
1374
1375 return progress;
1376 }
1377
1378 static bool
1379 nir_lower_vars_to_explicit_types_impl(nir_function_impl *impl,
1380 nir_variable_mode modes,
1381 glsl_type_size_align_func type_info)
1382 {
1383 bool progress = false;
1384
1385 nir_foreach_block(block, impl) {
1386 nir_foreach_instr(instr, block) {
1387 if (instr->type != nir_instr_type_deref)
1388 continue;
1389
1390 nir_deref_instr *deref = nir_instr_as_deref(instr);
1391 if (!(deref->mode & modes))
1392 continue;
1393
1394 unsigned size, alignment;
1395 const struct glsl_type *new_type =
1396 glsl_get_explicit_type_for_size_align(deref->type, type_info, &size, &alignment);
1397 if (new_type != deref->type) {
1398 progress = true;
1399 deref->type = new_type;
1400 }
1401 if (deref->deref_type == nir_deref_type_cast) {
1402 /* See also glsl_type::get_explicit_type_for_size_align() */
1403 unsigned new_stride = align(size, alignment);
1404 if (new_stride != deref->cast.ptr_stride) {
1405 deref->cast.ptr_stride = new_stride;
1406 progress = true;
1407 }
1408 }
1409 }
1410 }
1411
1412 if (progress) {
1413 nir_metadata_preserve(impl, nir_metadata_block_index |
1414 nir_metadata_dominance |
1415 nir_metadata_live_ssa_defs |
1416 nir_metadata_loop_analysis);
1417 }
1418
1419 return progress;
1420 }
1421
1422 static bool
1423 lower_vars_to_explicit(nir_shader *shader,
1424 struct exec_list *vars, nir_variable_mode mode,
1425 glsl_type_size_align_func type_info)
1426 {
1427 bool progress = false;
1428 unsigned offset = 0;
1429 nir_foreach_variable(var, vars) {
1430 unsigned size, align;
1431 const struct glsl_type *explicit_type =
1432 glsl_get_explicit_type_for_size_align(var->type, type_info, &size, &align);
1433
1434 if (explicit_type != var->type) {
1435 progress = true;
1436 var->type = explicit_type;
1437 }
1438
1439 var->data.driver_location = ALIGN_POT(offset, align);
1440 offset = var->data.driver_location + size;
1441 }
1442
1443 if (mode == nir_var_mem_shared) {
1444 shader->info.cs.shared_size = offset;
1445 shader->num_shared = offset;
1446 }
1447
1448 return progress;
1449 }
1450
1451 bool
1452 nir_lower_vars_to_explicit_types(nir_shader *shader,
1453 nir_variable_mode modes,
1454 glsl_type_size_align_func type_info)
1455 {
1456 /* TODO: Situations which need to be handled to support more modes:
1457 * - row-major matrices
1458 * - compact shader inputs/outputs
1459 * - interface types
1460 */
1461 ASSERTED nir_variable_mode supported = nir_var_mem_shared |
1462 nir_var_shader_temp | nir_var_function_temp;
1463 assert(!(modes & ~supported) && "unsupported");
1464
1465 bool progress = false;
1466
1467 if (modes & nir_var_mem_shared)
1468 progress |= lower_vars_to_explicit(shader, &shader->shared, nir_var_mem_shared, type_info);
1469 if (modes & nir_var_shader_temp)
1470 progress |= lower_vars_to_explicit(shader, &shader->globals, nir_var_shader_temp, type_info);
1471
1472 nir_foreach_function(function, shader) {
1473 if (function->impl) {
1474 if (modes & nir_var_function_temp)
1475 progress |= lower_vars_to_explicit(shader, &function->impl->locals, nir_var_function_temp, type_info);
1476
1477 progress |= nir_lower_vars_to_explicit_types_impl(function->impl, modes, type_info);
1478 }
1479 }
1480
1481 return progress;
1482 }
1483
1484 /**
1485 * Return the offset source for a load/store intrinsic.
1486 */
1487 nir_src *
1488 nir_get_io_offset_src(nir_intrinsic_instr *instr)
1489 {
1490 switch (instr->intrinsic) {
1491 case nir_intrinsic_load_input:
1492 case nir_intrinsic_load_output:
1493 case nir_intrinsic_load_shared:
1494 case nir_intrinsic_load_uniform:
1495 case nir_intrinsic_load_global:
1496 case nir_intrinsic_load_scratch:
1497 case nir_intrinsic_load_fs_input_interp_deltas:
1498 return &instr->src[0];
1499 case nir_intrinsic_load_ubo:
1500 case nir_intrinsic_load_ssbo:
1501 case nir_intrinsic_load_per_vertex_input:
1502 case nir_intrinsic_load_per_vertex_output:
1503 case nir_intrinsic_load_interpolated_input:
1504 case nir_intrinsic_store_output:
1505 case nir_intrinsic_store_shared:
1506 case nir_intrinsic_store_global:
1507 case nir_intrinsic_store_scratch:
1508 case nir_intrinsic_ssbo_atomic_add:
1509 case nir_intrinsic_ssbo_atomic_imin:
1510 case nir_intrinsic_ssbo_atomic_umin:
1511 case nir_intrinsic_ssbo_atomic_imax:
1512 case nir_intrinsic_ssbo_atomic_umax:
1513 case nir_intrinsic_ssbo_atomic_and:
1514 case nir_intrinsic_ssbo_atomic_or:
1515 case nir_intrinsic_ssbo_atomic_xor:
1516 case nir_intrinsic_ssbo_atomic_exchange:
1517 case nir_intrinsic_ssbo_atomic_comp_swap:
1518 case nir_intrinsic_ssbo_atomic_fadd:
1519 case nir_intrinsic_ssbo_atomic_fmin:
1520 case nir_intrinsic_ssbo_atomic_fmax:
1521 case nir_intrinsic_ssbo_atomic_fcomp_swap:
1522 return &instr->src[1];
1523 case nir_intrinsic_store_ssbo:
1524 case nir_intrinsic_store_per_vertex_output:
1525 return &instr->src[2];
1526 default:
1527 return NULL;
1528 }
1529 }
1530
1531 /**
1532 * Return the vertex index source for a load/store per_vertex intrinsic.
1533 */
1534 nir_src *
1535 nir_get_io_vertex_index_src(nir_intrinsic_instr *instr)
1536 {
1537 switch (instr->intrinsic) {
1538 case nir_intrinsic_load_per_vertex_input:
1539 case nir_intrinsic_load_per_vertex_output:
1540 return &instr->src[0];
1541 case nir_intrinsic_store_per_vertex_output:
1542 return &instr->src[1];
1543 default:
1544 return NULL;
1545 }
1546 }
1547
1548 /**
1549 * Return the numeric constant that identify a NULL pointer for each address
1550 * format.
1551 */
1552 const nir_const_value *
1553 nir_address_format_null_value(nir_address_format addr_format)
1554 {
1555 const static nir_const_value null_values[][NIR_MAX_VEC_COMPONENTS] = {
1556 [nir_address_format_32bit_global] = {{0}},
1557 [nir_address_format_64bit_global] = {{0}},
1558 [nir_address_format_64bit_bounded_global] = {{0}},
1559 [nir_address_format_32bit_index_offset] = {{.u32 = ~0}, {.u32 = ~0}},
1560 [nir_address_format_vec2_index_32bit_offset] = {{.u32 = ~0}, {.u32 = ~0}, {.u32 = ~0}},
1561 [nir_address_format_32bit_offset] = {{.u32 = ~0}},
1562 [nir_address_format_logical] = {{.u32 = ~0}},
1563 };
1564
1565 assert(addr_format < ARRAY_SIZE(null_values));
1566 return null_values[addr_format];
1567 }
1568
1569 nir_ssa_def *
1570 nir_build_addr_ieq(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
1571 nir_address_format addr_format)
1572 {
1573 switch (addr_format) {
1574 case nir_address_format_32bit_global:
1575 case nir_address_format_64bit_global:
1576 case nir_address_format_64bit_bounded_global:
1577 case nir_address_format_32bit_index_offset:
1578 case nir_address_format_vec2_index_32bit_offset:
1579 case nir_address_format_32bit_offset:
1580 return nir_ball_iequal(b, addr0, addr1);
1581
1582 case nir_address_format_logical:
1583 unreachable("Unsupported address format");
1584 }
1585
1586 unreachable("Invalid address format");
1587 }
1588
1589 nir_ssa_def *
1590 nir_build_addr_isub(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
1591 nir_address_format addr_format)
1592 {
1593 switch (addr_format) {
1594 case nir_address_format_32bit_global:
1595 case nir_address_format_64bit_global:
1596 case nir_address_format_32bit_offset:
1597 assert(addr0->num_components == 1);
1598 assert(addr1->num_components == 1);
1599 return nir_isub(b, addr0, addr1);
1600
1601 case nir_address_format_64bit_bounded_global:
1602 return nir_isub(b, addr_to_global(b, addr0, addr_format),
1603 addr_to_global(b, addr1, addr_format));
1604
1605 case nir_address_format_32bit_index_offset:
1606 assert(addr0->num_components == 2);
1607 assert(addr1->num_components == 2);
1608 /* Assume the same buffer index. */
1609 return nir_isub(b, nir_channel(b, addr0, 1), nir_channel(b, addr1, 1));
1610
1611 case nir_address_format_vec2_index_32bit_offset:
1612 assert(addr0->num_components == 3);
1613 assert(addr1->num_components == 3);
1614 /* Assume the same buffer index. */
1615 return nir_isub(b, nir_channel(b, addr0, 2), nir_channel(b, addr1, 2));
1616
1617 case nir_address_format_logical:
1618 unreachable("Unsupported address format");
1619 }
1620
1621 unreachable("Invalid address format");
1622 }
1623
1624 static bool
1625 is_input(nir_intrinsic_instr *intrin)
1626 {
1627 return intrin->intrinsic == nir_intrinsic_load_input ||
1628 intrin->intrinsic == nir_intrinsic_load_per_vertex_input ||
1629 intrin->intrinsic == nir_intrinsic_load_interpolated_input ||
1630 intrin->intrinsic == nir_intrinsic_load_fs_input_interp_deltas;
1631 }
1632
1633 static bool
1634 is_output(nir_intrinsic_instr *intrin)
1635 {
1636 return intrin->intrinsic == nir_intrinsic_load_output ||
1637 intrin->intrinsic == nir_intrinsic_load_per_vertex_output ||
1638 intrin->intrinsic == nir_intrinsic_store_output ||
1639 intrin->intrinsic == nir_intrinsic_store_per_vertex_output;
1640 }
1641
1642
1643 /**
1644 * This pass adds constant offsets to instr->const_index[0] for input/output
1645 * intrinsics, and resets the offset source to 0. Non-constant offsets remain
1646 * unchanged - since we don't know what part of a compound variable is
1647 * accessed, we allocate storage for the entire thing. For drivers that use
1648 * nir_lower_io_to_temporaries() before nir_lower_io(), this guarantees that
1649 * the offset source will be 0, so that they don't have to add it in manually.
1650 */
1651
1652 static bool
1653 add_const_offset_to_base_block(nir_block *block, nir_builder *b,
1654 nir_variable_mode mode)
1655 {
1656 bool progress = false;
1657 nir_foreach_instr_safe(instr, block) {
1658 if (instr->type != nir_instr_type_intrinsic)
1659 continue;
1660
1661 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
1662
1663 if ((mode == nir_var_shader_in && is_input(intrin)) ||
1664 (mode == nir_var_shader_out && is_output(intrin))) {
1665 nir_src *offset = nir_get_io_offset_src(intrin);
1666
1667 if (nir_src_is_const(*offset)) {
1668 intrin->const_index[0] += nir_src_as_uint(*offset);
1669 b->cursor = nir_before_instr(&intrin->instr);
1670 nir_instr_rewrite_src(&intrin->instr, offset,
1671 nir_src_for_ssa(nir_imm_int(b, 0)));
1672 progress = true;
1673 }
1674 }
1675 }
1676
1677 return progress;
1678 }
1679
1680 bool
1681 nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode)
1682 {
1683 bool progress = false;
1684
1685 nir_foreach_function(f, nir) {
1686 if (f->impl) {
1687 nir_builder b;
1688 nir_builder_init(&b, f->impl);
1689 nir_foreach_block(block, f->impl) {
1690 progress |= add_const_offset_to_base_block(block, &b, mode);
1691 }
1692 }
1693 }
1694
1695 return progress;
1696 }
1697