nir: Delete most of the constant_initializer support
[mesa.git] / src / compiler / nir / nir_lower_locals_to_regs.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jason Ekstrand (jason@jlekstrand.net)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_array.h"
30
31 struct locals_to_regs_state {
32 nir_shader *shader;
33 nir_function_impl *impl;
34
35 /* A hash table mapping derefs to registers */
36 struct hash_table *regs_table;
37
38 /* A growing array of derefs that we have encountered. There is exactly
39 * one element of this array per element in the hash table. This is
40 * used to make adding register initialization code deterministic.
41 */
42 nir_array derefs_array;
43
44 bool progress;
45 };
46
47 /* The following two functions implement a hash and equality check for
48 * variable dreferences. When the hash or equality function encounters an
49 * array, it ignores the offset and whether it is direct or indirect
50 * entirely.
51 */
52 static uint32_t
53 hash_deref(const void *void_deref)
54 {
55 uint32_t hash = _mesa_fnv32_1a_offset_bias;
56
57 const nir_deref_var *deref_var = void_deref;
58 hash = _mesa_fnv32_1a_accumulate(hash, deref_var->var);
59
60 for (const nir_deref *deref = deref_var->deref.child;
61 deref; deref = deref->child) {
62 if (deref->deref_type == nir_deref_type_struct) {
63 const nir_deref_struct *deref_struct = nir_deref_as_struct(deref);
64 hash = _mesa_fnv32_1a_accumulate(hash, deref_struct->index);
65 }
66 }
67
68 return hash;
69 }
70
71 static bool
72 derefs_equal(const void *void_a, const void *void_b)
73 {
74 const nir_deref_var *a_var = void_a;
75 const nir_deref_var *b_var = void_b;
76
77 if (a_var->var != b_var->var)
78 return false;
79
80 for (const nir_deref *a = a_var->deref.child, *b = b_var->deref.child;
81 a != NULL; a = a->child, b = b->child) {
82 if (a->deref_type != b->deref_type)
83 return false;
84
85 if (a->deref_type == nir_deref_type_struct) {
86 if (nir_deref_as_struct(a)->index != nir_deref_as_struct(b)->index)
87 return false;
88 }
89 /* Do nothing for arrays. They're all the same. */
90
91 assert((a->child == NULL) == (b->child == NULL));
92 if((a->child == NULL) != (b->child == NULL))
93 return false;
94 }
95
96 return true;
97 }
98
99 static nir_register *
100 get_reg_for_deref(nir_deref_var *deref, struct locals_to_regs_state *state)
101 {
102 uint32_t hash = hash_deref(deref);
103
104 assert(deref->var->constant_initializer == NULL);
105
106 struct hash_entry *entry =
107 _mesa_hash_table_search_pre_hashed(state->regs_table, hash, deref);
108 if (entry)
109 return entry->data;
110
111 unsigned array_size = 1;
112 nir_deref *tail = &deref->deref;
113 while (tail->child) {
114 if (tail->child->deref_type == nir_deref_type_array)
115 array_size *= glsl_get_length(tail->type);
116 tail = tail->child;
117 }
118
119 assert(glsl_type_is_vector(tail->type) || glsl_type_is_scalar(tail->type));
120
121 nir_register *reg = nir_local_reg_create(state->impl);
122 reg->num_components = glsl_get_vector_elements(tail->type);
123 reg->num_array_elems = array_size > 1 ? array_size : 0;
124 reg->bit_size = glsl_get_bit_size(tail->type);
125
126 _mesa_hash_table_insert_pre_hashed(state->regs_table, hash, deref, reg);
127 nir_array_add(&state->derefs_array, nir_deref_var *, deref);
128
129 return reg;
130 }
131
132 static nir_src
133 get_deref_reg_src(nir_deref_var *deref, nir_instr *instr,
134 struct locals_to_regs_state *state)
135 {
136 nir_src src;
137
138 src.is_ssa = false;
139 src.reg.reg = get_reg_for_deref(deref, state);
140 src.reg.base_offset = 0;
141 src.reg.indirect = NULL;
142
143 /* It is possible for a user to create a shader that has an array with a
144 * single element and then proceed to access it indirectly. Indirectly
145 * accessing a non-array register is not allowed in NIR. In order to
146 * handle this case we just convert it to a direct reference.
147 */
148 if (src.reg.reg->num_array_elems == 0)
149 return src;
150
151 nir_deref *tail = &deref->deref;
152 while (tail->child != NULL) {
153 const struct glsl_type *parent_type = tail->type;
154 tail = tail->child;
155
156 if (tail->deref_type != nir_deref_type_array)
157 continue;
158
159 nir_deref_array *deref_array = nir_deref_as_array(tail);
160
161 src.reg.base_offset *= glsl_get_length(parent_type);
162 src.reg.base_offset += deref_array->base_offset;
163
164 if (src.reg.indirect) {
165 nir_load_const_instr *load_const =
166 nir_load_const_instr_create(state->shader, 1, 32);
167 load_const->value.u32[0] = glsl_get_length(parent_type);
168 nir_instr_insert_before(instr, &load_const->instr);
169
170 nir_alu_instr *mul = nir_alu_instr_create(state->shader, nir_op_imul);
171 mul->src[0].src = *src.reg.indirect;
172 mul->src[1].src.is_ssa = true;
173 mul->src[1].src.ssa = &load_const->def;
174 mul->dest.write_mask = 1;
175 nir_ssa_dest_init(&mul->instr, &mul->dest.dest, 1, 32, NULL);
176 nir_instr_insert_before(instr, &mul->instr);
177
178 src.reg.indirect->is_ssa = true;
179 src.reg.indirect->ssa = &mul->dest.dest.ssa;
180 }
181
182 if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
183 if (src.reg.indirect == NULL) {
184 src.reg.indirect = ralloc(state->shader, nir_src);
185 nir_src_copy(src.reg.indirect, &deref_array->indirect,
186 state->shader);
187 } else {
188 nir_alu_instr *add = nir_alu_instr_create(state->shader,
189 nir_op_iadd);
190 add->src[0].src = *src.reg.indirect;
191 nir_src_copy(&add->src[1].src, &deref_array->indirect, add);
192 add->dest.write_mask = 1;
193 nir_ssa_dest_init(&add->instr, &add->dest.dest, 1, 32, NULL);
194 nir_instr_insert_before(instr, &add->instr);
195
196 src.reg.indirect->is_ssa = true;
197 src.reg.indirect->ssa = &add->dest.dest.ssa;
198 }
199 }
200 }
201
202 return src;
203 }
204
205 static bool
206 lower_locals_to_regs_block(nir_block *block,
207 struct locals_to_regs_state *state)
208 {
209 nir_foreach_instr_safe(instr, block) {
210 if (instr->type != nir_instr_type_intrinsic)
211 continue;
212
213 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
214
215 switch (intrin->intrinsic) {
216 case nir_intrinsic_load_var: {
217 if (intrin->variables[0]->var->data.mode != nir_var_local)
218 continue;
219
220 nir_alu_instr *mov = nir_alu_instr_create(state->shader, nir_op_imov);
221 mov->src[0].src = get_deref_reg_src(intrin->variables[0],
222 &intrin->instr, state);
223 mov->dest.write_mask = (1 << intrin->num_components) - 1;
224 if (intrin->dest.is_ssa) {
225 nir_ssa_dest_init(&mov->instr, &mov->dest.dest,
226 intrin->num_components,
227 intrin->dest.ssa.bit_size, NULL);
228 nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
229 nir_src_for_ssa(&mov->dest.dest.ssa));
230 } else {
231 nir_dest_copy(&mov->dest.dest, &intrin->dest, &mov->instr);
232 }
233 nir_instr_insert_before(&intrin->instr, &mov->instr);
234
235 nir_instr_remove(&intrin->instr);
236 state->progress = true;
237 break;
238 }
239
240 case nir_intrinsic_store_var: {
241 if (intrin->variables[0]->var->data.mode != nir_var_local)
242 continue;
243
244 nir_src reg_src = get_deref_reg_src(intrin->variables[0],
245 &intrin->instr, state);
246
247 nir_alu_instr *mov = nir_alu_instr_create(state->shader, nir_op_imov);
248 nir_src_copy(&mov->src[0].src, &intrin->src[0], mov);
249 mov->dest.write_mask = nir_intrinsic_write_mask(intrin);
250 mov->dest.dest.is_ssa = false;
251 mov->dest.dest.reg.reg = reg_src.reg.reg;
252 mov->dest.dest.reg.base_offset = reg_src.reg.base_offset;
253 mov->dest.dest.reg.indirect = reg_src.reg.indirect;
254
255 nir_instr_insert_before(&intrin->instr, &mov->instr);
256
257 nir_instr_remove(&intrin->instr);
258 state->progress = true;
259 break;
260 }
261
262 case nir_intrinsic_copy_var:
263 unreachable("There should be no copies whatsoever at this point");
264 break;
265
266 default:
267 continue;
268 }
269 }
270
271 return true;
272 }
273
274 static bool
275 nir_lower_locals_to_regs_impl(nir_function_impl *impl)
276 {
277 struct locals_to_regs_state state;
278
279 state.shader = impl->function->shader;
280 state.impl = impl;
281 state.progress = false;
282 state.regs_table = _mesa_hash_table_create(NULL, hash_deref, derefs_equal);
283 nir_array_init(&state.derefs_array, NULL);
284
285 nir_metadata_require(impl, nir_metadata_dominance);
286
287 nir_foreach_block(block, impl) {
288 lower_locals_to_regs_block(block, &state);
289 }
290
291 nir_metadata_preserve(impl, nir_metadata_block_index |
292 nir_metadata_dominance);
293
294 nir_array_fini(&state.derefs_array);
295 _mesa_hash_table_destroy(state.regs_table, NULL);
296
297 return state.progress;
298 }
299
300 bool
301 nir_lower_locals_to_regs(nir_shader *shader)
302 {
303 bool progress = false;
304
305 nir_foreach_function(function, shader) {
306 if (function->impl)
307 progress = nir_lower_locals_to_regs_impl(function->impl) || progress;
308 }
309
310 return progress;
311 }