2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
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8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "nir/nir_builder.h"
26 #include "nir_constant_expressions.h"
27 #include "nir_control_flow.h"
28 #include "nir_loop_analyze.h"
30 static nir_ssa_def
*clone_alu_and_replace_src_defs(nir_builder
*b
,
31 const nir_alu_instr
*alu
,
32 nir_ssa_def
**src_defs
);
35 * Gets the single block that jumps back to the loop header. Already assumes
36 * there is exactly one such block.
39 find_continue_block(nir_loop
*loop
)
41 nir_block
*header_block
= nir_loop_first_block(loop
);
42 nir_block
*prev_block
=
43 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
45 assert(header_block
->predecessors
->entries
== 2);
47 set_foreach(header_block
->predecessors
, pred_entry
) {
48 if (pred_entry
->key
!= prev_block
)
49 return (nir_block
*)pred_entry
->key
;
52 unreachable("Continue block not found!");
56 * Does a phi have one constant value from outside a loop and one from inside?
59 phi_has_constant_from_outside_and_one_from_inside_loop(nir_phi_instr
*phi
,
60 const nir_block
*entry_block
,
62 uint32_t *continue_val
)
64 /* We already know we have exactly one continue */
65 assert(exec_list_length(&phi
->srcs
) == 2);
70 nir_foreach_phi_src(src
, phi
) {
71 assert(src
->src
.is_ssa
);
72 nir_const_value
*const_src
= nir_src_as_const_value(src
->src
);
76 if (src
->pred
!= entry_block
) {
77 *continue_val
= const_src
->u32
[0];
79 *entry_val
= const_src
->u32
[0];
87 * This optimization detects if statements at the tops of loops where the
88 * condition is a phi node of two constants and moves half of the if to above
89 * the loop and the other half of the if to the end of the loop. A simple for
90 * loop "for (int i = 0; i < 4; i++)", when run through the SPIR-V front-end,
91 * ends up looking something like this:
93 * vec1 32 ssa_0 = load_const (0x00000000)
94 * vec1 32 ssa_1 = load_const (0xffffffff)
97 * vec1 32 ssa_2 = phi block_0: ssa_0, block_7: ssa_5
98 * vec1 32 ssa_3 = phi block_0: ssa_0, block_7: ssa_1
101 * vec1 32 ssa_4 = load_const (0x00000001)
102 * vec1 32 ssa_5 = iadd ssa_2, ssa_4
107 * vec1 32 ssa_6 = load_const (0x00000004)
108 * vec1 32 ssa_7 = ilt ssa_5, ssa_6
118 * This turns it into something like this:
120 * // Stuff from block 1
121 * // Stuff from block 3
124 * vec1 32 ssa_2 = phi block_0: ssa_0, block_7: ssa_5
125 * vec1 32 ssa_6 = load_const (0x00000004)
126 * vec1 32 ssa_7 = ilt ssa_2, ssa_6
134 * // Stuff from block 1
135 * // Stuff from block 2
136 * vec1 32 ssa_4 = load_const (0x00000001)
137 * vec1 32 ssa_5 = iadd ssa_2, ssa_4
141 opt_peel_loop_initial_if(nir_loop
*loop
)
143 nir_block
*header_block
= nir_loop_first_block(loop
);
144 nir_block
*const prev_block
=
145 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
147 /* It would be insane if this were not true */
148 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
150 /* The loop must have exactly one continue block which could be a block
151 * ending in a continue instruction or the "natural" continue from the
152 * last block in the loop back to the top.
154 if (header_block
->predecessors
->entries
!= 2)
157 nir_cf_node
*if_node
= nir_cf_node_next(&header_block
->cf_node
);
158 if (!if_node
|| if_node
->type
!= nir_cf_node_if
)
161 nir_if
*nif
= nir_cf_node_as_if(if_node
);
162 assert(nif
->condition
.is_ssa
);
164 nir_ssa_def
*cond
= nif
->condition
.ssa
;
165 if (cond
->parent_instr
->type
!= nir_instr_type_phi
)
168 nir_phi_instr
*cond_phi
= nir_instr_as_phi(cond
->parent_instr
);
169 if (cond
->parent_instr
->block
!= header_block
)
172 uint32_t entry_val
= 0, continue_val
= 0;
173 if (!phi_has_constant_from_outside_and_one_from_inside_loop(cond_phi
,
179 /* If they both execute or both don't execute, this is a job for
180 * nir_dead_cf, not this pass.
182 if ((entry_val
&& continue_val
) || (!entry_val
&& !continue_val
))
185 struct exec_list
*continue_list
, *entry_list
;
187 continue_list
= &nif
->then_list
;
188 entry_list
= &nif
->else_list
;
190 continue_list
= &nif
->else_list
;
191 entry_list
= &nif
->then_list
;
194 /* We want to be moving the contents of entry_list to above the loop so it
195 * can't contain any break or continue instructions.
197 foreach_list_typed(nir_cf_node
, cf_node
, node
, entry_list
) {
198 nir_foreach_block_in_cf_node(block
, cf_node
) {
199 nir_instr
*last_instr
= nir_block_last_instr(block
);
200 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
)
205 /* We're about to re-arrange a bunch of blocks so make sure that we don't
206 * have deref uses which cross block boundaries. We don't want a deref
207 * accidentally ending up in a phi.
209 nir_rematerialize_derefs_in_use_blocks_impl(
210 nir_cf_node_get_function(&loop
->cf_node
));
212 /* Before we do anything, convert the loop to LCSSA. We're about to
213 * replace a bunch of SSA defs with registers and this will prevent any of
214 * it from leaking outside the loop.
216 nir_convert_loop_to_lcssa(loop
);
218 nir_block
*after_if_block
=
219 nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
));
221 /* Get rid of phis in the header block since we will be duplicating it */
222 nir_lower_phis_to_regs_block(header_block
);
223 /* Get rid of phis after the if since dominance will change */
224 nir_lower_phis_to_regs_block(after_if_block
);
226 /* Get rid of SSA defs in the pieces we're about to move around */
227 nir_lower_ssa_defs_to_regs_block(header_block
);
228 nir_foreach_block_in_cf_node(block
, &nif
->cf_node
)
229 nir_lower_ssa_defs_to_regs_block(block
);
231 nir_cf_list header
, tmp
;
232 nir_cf_extract(&header
, nir_before_block(header_block
),
233 nir_after_block(header_block
));
235 nir_cf_list_clone(&tmp
, &header
, &loop
->cf_node
, NULL
);
236 nir_cf_reinsert(&tmp
, nir_before_cf_node(&loop
->cf_node
));
237 nir_cf_extract(&tmp
, nir_before_cf_list(entry_list
),
238 nir_after_cf_list(entry_list
));
239 nir_cf_reinsert(&tmp
, nir_before_cf_node(&loop
->cf_node
));
241 nir_cf_reinsert(&header
,
242 nir_after_block_before_jump(find_continue_block(loop
)));
244 nir_cf_extract(&tmp
, nir_before_cf_list(continue_list
),
245 nir_after_cf_list(continue_list
));
247 /* Get continue block again as the previous reinsert might have removed the block. */
248 nir_cf_reinsert(&tmp
,
249 nir_after_block_before_jump(find_continue_block(loop
)));
251 nir_cf_node_remove(&nif
->cf_node
);
257 alu_instr_is_comparison(const nir_alu_instr
*alu
)
272 return nir_alu_instr_is_comparison(alu
);
277 alu_instr_is_type_conversion(const nir_alu_instr
*alu
)
279 return nir_op_infos
[alu
->op
].num_inputs
== 1 &&
280 nir_alu_type_get_base_type(nir_op_infos
[alu
->op
].output_type
) !=
281 nir_alu_type_get_base_type(nir_op_infos
[alu
->op
].input_types
[0]);
285 * Splits ALU instructions that have a source that is a phi node
287 * ALU instructions in the header block of a loop that meet the following
288 * criteria can be split.
290 * - The loop has no continue instructions other than the "natural" continue
291 * at the bottom of the loop.
293 * - At least one source of the instruction is a phi node from the header block.
295 * and either this rule
297 * - The phi node selects undef from the block before the loop and a value
298 * from the continue block of the loop.
302 * - The phi node selects a constant from the block before the loop.
304 * - The non-phi source of the ALU instruction comes from a block that
305 * dominates the block before the loop. The most common failure mode for
306 * this check is sources that are generated in the loop header block.
308 * The split process moves the original ALU instruction to the bottom of the
309 * loop. The phi node source is replaced with the value from the phi node
310 * selected from the continue block (i.e., the non-undef value). A new phi
311 * node is added to the header block that selects either undef from the block
312 * before the loop or the result of the (moved) ALU instruction.
314 * The splitting transforms a loop like:
316 * vec1 32 ssa_7 = undefined
317 * vec1 32 ssa_8 = load_const (0x00000001)
318 * vec1 32 ssa_10 = load_const (0x00000000)
322 * // preds: block_0 block_4
323 * vec1 32 ssa_11 = phi block_0: ssa_7, block_4: ssa_15
324 * vec1 32 ssa_12 = phi block_0: ssa_1, block_4: ssa_15
325 * vec1 32 ssa_13 = phi block_0: ssa_10, block_4: ssa_16
326 * vec1 32 ssa_14 = iadd ssa_11, ssa_8
327 * vec1 32 ssa_15 = b32csel ssa_13, ssa_14, ssa_12
334 * vec1 32 ssa_7 = undefined
335 * vec1 32 ssa_8 = load_const (0x00000001)
336 * vec1 32 ssa_10 = load_const (0x00000000)
340 * // preds: block_0 block_4
341 * vec1 32 ssa_11 = phi block_0: ssa_7, block_4: ssa_15
342 * vec1 32 ssa_12 = phi block_0: ssa_1, block_4: ssa_15
343 * vec1 32 ssa_13 = phi block_0: ssa_10, block_4: ssa_16
344 * vec1 32 ssa_21 = phi block_0: sss_7, block_4: ssa_20
345 * vec1 32 ssa_15 = b32csel ssa_13, ssa_21, ssa_12
347 * vec1 32 ssa_20 = iadd ssa_15, ssa_8
351 * If the phi does not select an undef, the instruction is duplicated in the
352 * loop continue block (as in the undef case) and in the previous block. When
353 * the ALU instruction is duplicated in the previous block, the correct source
354 * must be selected from the phi node.
357 opt_split_alu_of_phi(nir_builder
*b
, nir_loop
*loop
)
359 bool progress
= false;
360 nir_block
*header_block
= nir_loop_first_block(loop
);
361 nir_block
*const prev_block
=
362 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
364 /* It would be insane if this were not true */
365 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
367 /* The loop must have exactly one continue block which could be a block
368 * ending in a continue instruction or the "natural" continue from the
369 * last block in the loop back to the top.
371 if (header_block
->predecessors
->entries
!= 2)
374 nir_foreach_instr_safe(instr
, header_block
) {
375 if (instr
->type
!= nir_instr_type_alu
)
378 nir_alu_instr
*const alu
= nir_instr_as_alu(instr
);
380 /* Most ALU ops produce an undefined result if any source is undef.
381 * However, operations like bcsel only produce undefined results of the
382 * first operand is undef. Even in the undefined case, the result
383 * should be one of the other two operands, so the result of the bcsel
384 * should never be replaced with undef.
386 * nir_op_vec{2,3,4}, nir_op_imov, and nir_op_fmov are excluded because
387 * they can easily lead to infinite optimization loops.
389 if (alu
->op
== nir_op_bcsel
||
390 alu
->op
== nir_op_b32csel
||
391 alu
->op
== nir_op_fcsel
||
392 alu
->op
== nir_op_vec2
||
393 alu
->op
== nir_op_vec3
||
394 alu
->op
== nir_op_vec4
||
395 alu
->op
== nir_op_imov
||
396 alu
->op
== nir_op_fmov
||
397 alu_instr_is_comparison(alu
) ||
398 alu_instr_is_type_conversion(alu
))
401 bool has_phi_src_from_prev_block
= false;
402 bool all_non_phi_exist_in_prev_block
= true;
403 bool is_prev_result_undef
= true;
404 bool is_prev_result_const
= true;
405 nir_ssa_def
*prev_srcs
[8]; // FINISHME: Array size?
406 nir_ssa_def
*continue_srcs
[8]; // FINISHME: Array size?
408 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
409 nir_instr
*const src_instr
= alu
->src
[i
].src
.ssa
->parent_instr
;
411 /* If the source is a phi in the loop header block, then the
412 * prev_srcs and continue_srcs will come from the different sources
415 if (src_instr
->type
== nir_instr_type_phi
&&
416 src_instr
->block
== header_block
) {
417 nir_phi_instr
*const phi
= nir_instr_as_phi(src_instr
);
419 /* Only strictly need to NULL out the pointers when the assertions
420 * (below) are compiled in. Debugging a NULL pointer deref in the
421 * wild is easier than debugging a random pointer deref, so set
422 * NULL unconditionally just to be safe.
425 continue_srcs
[i
] = NULL
;
427 nir_foreach_phi_src(src_of_phi
, phi
) {
428 if (src_of_phi
->pred
== prev_block
) {
429 if (src_of_phi
->src
.ssa
->parent_instr
->type
!=
430 nir_instr_type_ssa_undef
) {
431 is_prev_result_undef
= false;
434 if (src_of_phi
->src
.ssa
->parent_instr
->type
!=
435 nir_instr_type_load_const
) {
436 is_prev_result_const
= false;
439 prev_srcs
[i
] = src_of_phi
->src
.ssa
;
440 has_phi_src_from_prev_block
= true;
442 continue_srcs
[i
] = src_of_phi
->src
.ssa
;
445 assert(prev_srcs
[i
] != NULL
);
446 assert(continue_srcs
[i
] != NULL
);
448 /* If the source is not a phi (or a phi in a block other than the
449 * loop header), then the value must exist in prev_block.
451 if (!nir_block_dominates(src_instr
->block
, prev_block
)) {
452 all_non_phi_exist_in_prev_block
= false;
456 prev_srcs
[i
] = alu
->src
[i
].src
.ssa
;
457 continue_srcs
[i
] = alu
->src
[i
].src
.ssa
;
461 if (has_phi_src_from_prev_block
&& all_non_phi_exist_in_prev_block
&&
462 (is_prev_result_undef
|| is_prev_result_const
)) {
463 nir_block
*const continue_block
= find_continue_block(loop
);
464 nir_ssa_def
*prev_value
;
466 if (!is_prev_result_undef
) {
467 b
->cursor
= nir_after_block(prev_block
);
468 prev_value
= clone_alu_and_replace_src_defs(b
, alu
, prev_srcs
);
470 /* Since the undef used as the source of the original ALU
471 * instruction may have different number of components or
472 * bit size than the result of that instruction, a new
473 * undef must be created.
475 nir_ssa_undef_instr
*undef
=
476 nir_ssa_undef_instr_create(b
->shader
,
477 alu
->dest
.dest
.ssa
.num_components
,
478 alu
->dest
.dest
.ssa
.bit_size
);
480 nir_instr_insert_after_block(prev_block
, &undef
->instr
);
482 prev_value
= &undef
->def
;
485 /* Make a copy of the original ALU instruction. Replace the sources
486 * of the new instruction that read a phi with an undef source from
487 * prev_block with the non-undef source of that phi.
489 * Insert the new instruction at the end of the continue block.
491 b
->cursor
= nir_after_block(continue_block
);
493 nir_ssa_def
*const alu_copy
=
494 clone_alu_and_replace_src_defs(b
, alu
, continue_srcs
);
496 /* Make a new phi node that selects a value from prev_block and the
497 * result of the new instruction from continue_block.
499 nir_phi_instr
*const phi
= nir_phi_instr_create(b
->shader
);
500 nir_phi_src
*phi_src
;
502 phi_src
= ralloc(phi
, nir_phi_src
);
503 phi_src
->pred
= prev_block
;
504 phi_src
->src
= nir_src_for_ssa(prev_value
);
505 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
507 phi_src
= ralloc(phi
, nir_phi_src
);
508 phi_src
->pred
= continue_block
;
509 phi_src
->src
= nir_src_for_ssa(alu_copy
);
510 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
512 nir_ssa_dest_init(&phi
->instr
, &phi
->dest
,
513 alu_copy
->num_components
, alu_copy
->bit_size
, NULL
);
515 b
->cursor
= nir_after_phis(header_block
);
516 nir_builder_instr_insert(b
, &phi
->instr
);
518 /* Modify all readers of the original ALU instruction to read the
521 nir_foreach_use_safe(use_src
, &alu
->dest
.dest
.ssa
) {
522 nir_instr_rewrite_src(use_src
->parent_instr
,
524 nir_src_for_ssa(&phi
->dest
.ssa
));
527 nir_foreach_if_use_safe(use_src
, &alu
->dest
.dest
.ssa
) {
528 nir_if_rewrite_condition(use_src
->parent_if
,
529 nir_src_for_ssa(&phi
->dest
.ssa
));
532 /* Since the original ALU instruction no longer has any readers, just
535 nir_instr_remove_v(&alu
->instr
);
546 * Get the SSA value from a phi node that corresponds to a specific block
549 ssa_for_phi_from_block(nir_phi_instr
*phi
, nir_block
*block
)
551 nir_foreach_phi_src(src
, phi
) {
552 if (src
->pred
== block
)
556 assert(!"Block is not a predecessor of phi.");
561 * Simplify a bcsel whose sources are all phi nodes from the loop header block
563 * bcsel instructions in a loop that meet the following criteria can be
564 * converted to phi nodes:
566 * - The loop has no continue instructions other than the "natural" continue
567 * at the bottom of the loop.
569 * - All of the sources of the bcsel are phi nodes in the header block of the
572 * - The phi node representing the condition of the bcsel instruction chooses
573 * only constant values.
575 * The contant value from the condition will select one of the other sources
576 * when entered from outside the loop and the remaining source when entered
577 * from the continue block. Since each of these sources is also a phi node in
578 * the header block, the value of the phi node can be "evaluated." These
579 * evaluated phi nodes provide the sources for a new phi node. All users of
580 * the bcsel result are updated to use the phi node result.
582 * The replacement transforms loops like:
584 * vec1 32 ssa_7 = undefined
585 * vec1 32 ssa_8 = load_const (0x00000001)
586 * vec1 32 ssa_9 = load_const (0x000000c8)
587 * vec1 32 ssa_10 = load_const (0x00000000)
591 * // preds: block_0 block_4
592 * vec1 32 ssa_11 = phi block_0: ssa_1, block_4: ssa_14
593 * vec1 32 ssa_12 = phi block_0: ssa_10, block_4: ssa_15
594 * vec1 32 ssa_13 = phi block_0: ssa_7, block_4: ssa_25
595 * vec1 32 ssa_14 = b32csel ssa_12, ssa_13, ssa_11
596 * vec1 32 ssa_16 = ige32 ssa_14, ssa_9
598 * vec1 32 ssa_15 = load_const (0xffffffff)
600 * vec1 32 ssa_25 = iadd ssa_14, ssa_8
606 * vec1 32 ssa_7 = undefined
607 * vec1 32 ssa_8 = load_const (0x00000001)
608 * vec1 32 ssa_9 = load_const (0x000000c8)
609 * vec1 32 ssa_10 = load_const (0x00000000)
613 * // preds: block_0 block_4
614 * vec1 32 ssa_11 = phi block_0: ssa_1, block_4: ssa_14
615 * vec1 32 ssa_12 = phi block_0: ssa_10, block_4: ssa_15
616 * vec1 32 ssa_13 = phi block_0: ssa_7, block_4: ssa_25
617 * vec1 32 sss_26 = phi block_0: ssa_1, block_4: ssa_25
618 * vec1 32 ssa_16 = ige32 ssa_26, ssa_9
620 * vec1 32 ssa_15 = load_const (0xffffffff)
622 * vec1 32 ssa_25 = iadd ssa_26, ssa_8
627 * It may be possible modify this function to not require a phi node as the
628 * source of the bcsel that is selected when entering from outside the loop.
629 * The only restriction is that the source must be geneated outside the loop
630 * (since it will become the source of a phi node in the header block of the
634 opt_simplify_bcsel_of_phi(nir_builder
*b
, nir_loop
*loop
)
636 bool progress
= false;
637 nir_block
*header_block
= nir_loop_first_block(loop
);
638 nir_block
*const prev_block
=
639 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
641 /* It would be insane if this were not true */
642 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
644 /* The loop must have exactly one continue block which could be a block
645 * ending in a continue instruction or the "natural" continue from the
646 * last block in the loop back to the top.
648 if (header_block
->predecessors
->entries
!= 2)
651 /* We can move any bcsel that can guaranteed to execut on every iteration
652 * of a loop. For now this is accomplished by only taking bcsels from the
653 * header_block. In the future, this could be expanced to include any
654 * bcsel that must come before any break.
656 * For more details, see
657 * https://gitlab.freedesktop.org/mesa/mesa/merge_requests/170#note_110305
659 nir_foreach_instr_safe(instr
, header_block
) {
660 if (instr
->type
!= nir_instr_type_alu
)
663 nir_alu_instr
*const bcsel
= nir_instr_as_alu(instr
);
664 if (bcsel
->op
!= nir_op_bcsel
&&
665 bcsel
->op
!= nir_op_b32csel
&&
666 bcsel
->op
!= nir_op_fcsel
)
670 for (unsigned i
= 0; i
< 3; i
++) {
671 /* FINISHME: The abs and negate cases could be handled by adding
672 * move instructions at the bottom of the continue block and more
673 * phi nodes in the header_block.
675 if (!bcsel
->src
[i
].src
.is_ssa
||
676 bcsel
->src
[i
].src
.ssa
->parent_instr
->type
!= nir_instr_type_phi
||
677 bcsel
->src
[i
].src
.ssa
->parent_instr
->block
!= header_block
||
678 bcsel
->src
[i
].negate
|| bcsel
->src
[i
].abs
) {
687 nir_phi_instr
*const cond_phi
=
688 nir_instr_as_phi(bcsel
->src
[0].src
.ssa
->parent_instr
);
690 uint32_t entry_val
= 0, continue_val
= 0;
691 if (!phi_has_constant_from_outside_and_one_from_inside_loop(cond_phi
,
697 /* If they both execute or both don't execute, this is a job for
698 * nir_dead_cf, not this pass.
700 if ((entry_val
&& continue_val
) || (!entry_val
&& !continue_val
))
703 const unsigned entry_src
= entry_val
? 1 : 2;
704 const unsigned continue_src
= entry_val
? 2 : 1;
706 /* Create a new phi node that selects the value for prev_block from
707 * the bcsel source that is selected by entry_val and the value for
708 * continue_block from the other bcsel source. Both sources have
709 * already been verified to be phi nodes.
711 nir_block
*const continue_block
= find_continue_block(loop
);
712 nir_phi_instr
*const phi
= nir_phi_instr_create(b
->shader
);
713 nir_phi_src
*phi_src
;
715 phi_src
= ralloc(phi
, nir_phi_src
);
716 phi_src
->pred
= prev_block
;
718 nir_src_for_ssa(ssa_for_phi_from_block(nir_instr_as_phi(bcsel
->src
[entry_src
].src
.ssa
->parent_instr
),
720 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
722 phi_src
= ralloc(phi
, nir_phi_src
);
723 phi_src
->pred
= continue_block
;
725 nir_src_for_ssa(ssa_for_phi_from_block(nir_instr_as_phi(bcsel
->src
[continue_src
].src
.ssa
->parent_instr
),
727 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
729 nir_ssa_dest_init(&phi
->instr
,
731 nir_dest_num_components(bcsel
->dest
.dest
),
732 nir_dest_bit_size(bcsel
->dest
.dest
),
735 b
->cursor
= nir_after_phis(header_block
);
736 nir_builder_instr_insert(b
, &phi
->instr
);
738 /* Modify all readers of the bcsel instruction to read the result of
741 nir_foreach_use_safe(use_src
, &bcsel
->dest
.dest
.ssa
) {
742 nir_instr_rewrite_src(use_src
->parent_instr
,
744 nir_src_for_ssa(&phi
->dest
.ssa
));
747 nir_foreach_if_use_safe(use_src
, &bcsel
->dest
.dest
.ssa
) {
748 nir_if_rewrite_condition(use_src
->parent_if
,
749 nir_src_for_ssa(&phi
->dest
.ssa
));
752 /* Since the original bcsel instruction no longer has any readers,
755 nir_instr_remove_v(&bcsel
->instr
);
765 is_block_empty(nir_block
*block
)
767 return nir_cf_node_is_last(&block
->cf_node
) &&
768 exec_list_is_empty(&block
->instr_list
);
772 nir_block_ends_in_continue(nir_block
*block
)
774 if (exec_list_is_empty(&block
->instr_list
))
777 nir_instr
*instr
= nir_block_last_instr(block
);
778 return instr
->type
== nir_instr_type_jump
&&
779 nir_instr_as_jump(instr
)->type
== nir_jump_continue
;
783 * This optimization turns:
807 * The continue should then be removed by nir_opt_trivial_continues() and the
808 * loop can potentially be unrolled.
810 * Note: do_work_2() is only ever blocks and nested loops. We could also nest
811 * other if-statments in the branch which would allow further continues to
812 * be removed. However in practice this can result in increased register
816 opt_if_loop_last_continue(nir_loop
*loop
)
818 /* Get the last if-stament in the loop */
819 nir_block
*last_block
= nir_loop_last_block(loop
);
820 nir_cf_node
*if_node
= nir_cf_node_prev(&last_block
->cf_node
);
822 if (if_node
->type
== nir_cf_node_if
)
825 if_node
= nir_cf_node_prev(if_node
);
828 if (!if_node
|| if_node
->type
!= nir_cf_node_if
)
831 nir_if
*nif
= nir_cf_node_as_if(if_node
);
832 nir_block
*then_block
= nir_if_last_then_block(nif
);
833 nir_block
*else_block
= nir_if_last_else_block(nif
);
835 bool then_ends_in_continue
= nir_block_ends_in_continue(then_block
);
836 bool else_ends_in_continue
= nir_block_ends_in_continue(else_block
);
838 /* If both branches end in a continue do nothing, this should be handled
839 * by nir_opt_dead_cf().
841 if (then_ends_in_continue
&& else_ends_in_continue
)
844 if (!then_ends_in_continue
&& !else_ends_in_continue
)
847 /* if the block after the if/else is empty we bail, otherwise we might end
850 if (&nif
->cf_node
== nir_cf_node_prev(&last_block
->cf_node
) &&
851 exec_list_is_empty(&last_block
->instr_list
))
854 /* Move the last block of the loop inside the last if-statement */
856 nir_cf_extract(&tmp
, nir_after_cf_node(if_node
),
857 nir_after_block(last_block
));
858 if (then_ends_in_continue
) {
859 nir_cursor last_blk_cursor
= nir_after_cf_list(&nif
->else_list
);
860 nir_cf_reinsert(&tmp
,
861 nir_after_block_before_jump(last_blk_cursor
.block
));
863 nir_cursor last_blk_cursor
= nir_after_cf_list(&nif
->then_list
);
864 nir_cf_reinsert(&tmp
,
865 nir_after_block_before_jump(last_blk_cursor
.block
));
868 /* In order to avoid running nir_lower_regs_to_ssa_impl() every time an if
869 * opt makes progress we leave nir_opt_trivial_continues() to remove the
870 * continue now that the end of the loop has been simplified.
876 /* Walk all the phis in the block immediately following the if statement and
880 rewrite_phi_predecessor_blocks(nir_if
*nif
,
881 nir_block
*old_then_block
,
882 nir_block
*old_else_block
,
883 nir_block
*new_then_block
,
884 nir_block
*new_else_block
)
886 nir_block
*after_if_block
=
887 nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
));
889 nir_foreach_instr(instr
, after_if_block
) {
890 if (instr
->type
!= nir_instr_type_phi
)
893 nir_phi_instr
*phi
= nir_instr_as_phi(instr
);
895 foreach_list_typed(nir_phi_src
, src
, node
, &phi
->srcs
) {
896 if (src
->pred
== old_then_block
) {
897 src
->pred
= new_then_block
;
898 } else if (src
->pred
== old_else_block
) {
899 src
->pred
= new_else_block
;
906 * This optimization turns:
921 opt_if_simplification(nir_builder
*b
, nir_if
*nif
)
923 /* Only simplify if the then block is empty and the else block is not. */
924 if (!is_block_empty(nir_if_first_then_block(nif
)) ||
925 is_block_empty(nir_if_first_else_block(nif
)))
928 /* Make sure the condition is a comparison operation. */
929 nir_instr
*src_instr
= nif
->condition
.ssa
->parent_instr
;
930 if (src_instr
->type
!= nir_instr_type_alu
)
933 nir_alu_instr
*alu_instr
= nir_instr_as_alu(src_instr
);
934 if (!nir_alu_instr_is_comparison(alu_instr
))
937 /* Insert the inverted instruction and rewrite the condition. */
938 b
->cursor
= nir_after_instr(&alu_instr
->instr
);
940 nir_ssa_def
*new_condition
=
941 nir_inot(b
, &alu_instr
->dest
.dest
.ssa
);
943 nir_if_rewrite_condition(nif
, nir_src_for_ssa(new_condition
));
945 /* Grab pointers to the last then/else blocks for fixing up the phis. */
946 nir_block
*then_block
= nir_if_last_then_block(nif
);
947 nir_block
*else_block
= nir_if_last_else_block(nif
);
949 rewrite_phi_predecessor_blocks(nif
, then_block
, else_block
, else_block
,
952 /* Finally, move the else block to the then block. */
954 nir_cf_extract(&tmp
, nir_before_cf_list(&nif
->else_list
),
955 nir_after_cf_list(&nif
->else_list
));
956 nir_cf_reinsert(&tmp
, nir_before_cf_list(&nif
->then_list
));
962 * This optimization simplifies potential loop terminators which then allows
963 * other passes such as opt_if_simplification() and loop unrolling to progress
967 * ... then block instructions ...
980 * ... then block instructions ...
983 opt_if_loop_terminator(nir_if
*nif
)
985 nir_block
*break_blk
= NULL
;
986 nir_block
*continue_from_blk
= NULL
;
987 bool continue_from_then
= true;
989 nir_block
*last_then
= nir_if_last_then_block(nif
);
990 nir_block
*last_else
= nir_if_last_else_block(nif
);
992 if (nir_block_ends_in_break(last_then
)) {
993 break_blk
= last_then
;
994 continue_from_blk
= last_else
;
995 continue_from_then
= false;
996 } else if (nir_block_ends_in_break(last_else
)) {
997 break_blk
= last_else
;
998 continue_from_blk
= last_then
;
1001 /* Continue if the if-statement contained no jumps at all */
1005 /* If the continue from block is empty then return as there is nothing to
1008 nir_block
*first_continue_from_blk
= continue_from_then
?
1009 nir_if_first_then_block(nif
) :
1010 nir_if_first_else_block(nif
);
1011 if (is_block_empty(first_continue_from_blk
))
1014 if (!nir_is_trivial_loop_if(nif
, break_blk
))
1017 /* Finally, move the continue from branch after the if-statement. */
1019 nir_cf_extract(&tmp
, nir_before_block(first_continue_from_blk
),
1020 nir_after_block(continue_from_blk
));
1021 nir_cf_reinsert(&tmp
, nir_after_cf_node(&nif
->cf_node
));
1027 evaluate_if_condition(nir_if
*nif
, nir_cursor cursor
, bool *value
)
1029 nir_block
*use_block
= nir_cursor_current_block(cursor
);
1030 if (nir_block_dominates(nir_if_first_then_block(nif
), use_block
)) {
1033 } else if (nir_block_dominates(nir_if_first_else_block(nif
), use_block
)) {
1041 static nir_ssa_def
*
1042 clone_alu_and_replace_src_defs(nir_builder
*b
, const nir_alu_instr
*alu
,
1043 nir_ssa_def
**src_defs
)
1045 nir_alu_instr
*nalu
= nir_alu_instr_create(b
->shader
, alu
->op
);
1046 nalu
->exact
= alu
->exact
;
1048 nir_ssa_dest_init(&nalu
->instr
, &nalu
->dest
.dest
,
1049 alu
->dest
.dest
.ssa
.num_components
,
1050 alu
->dest
.dest
.ssa
.bit_size
, alu
->dest
.dest
.ssa
.name
);
1052 nalu
->dest
.saturate
= alu
->dest
.saturate
;
1053 nalu
->dest
.write_mask
= alu
->dest
.write_mask
;
1055 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
1056 assert(alu
->src
[i
].src
.is_ssa
);
1057 nalu
->src
[i
].src
= nir_src_for_ssa(src_defs
[i
]);
1058 nalu
->src
[i
].negate
= alu
->src
[i
].negate
;
1059 nalu
->src
[i
].abs
= alu
->src
[i
].abs
;
1060 memcpy(nalu
->src
[i
].swizzle
, alu
->src
[i
].swizzle
,
1061 sizeof(nalu
->src
[i
].swizzle
));
1064 nir_builder_instr_insert(b
, &nalu
->instr
);
1066 return &nalu
->dest
.dest
.ssa
;;
1070 * This propagates if condition evaluation down the chain of some alu
1071 * instructions. For example by checking the use of some of the following alu
1072 * instruction we can eventually replace ssa_107 with NIR_TRUE.
1076 * vec1 32 ssa_85 = load_const (0x00000002)
1077 * vec1 32 ssa_86 = ieq ssa_48, ssa_85
1078 * vec1 32 ssa_87 = load_const (0x00000001)
1079 * vec1 32 ssa_88 = ieq ssa_48, ssa_87
1080 * vec1 32 ssa_89 = ior ssa_86, ssa_88
1081 * vec1 32 ssa_90 = ieq ssa_48, ssa_0
1082 * vec1 32 ssa_91 = ior ssa_89, ssa_90
1107 * vec1 32 ssa_107 = inot ssa_91
1117 propagate_condition_eval(nir_builder
*b
, nir_if
*nif
, nir_src
*use_src
,
1118 nir_src
*alu_use
, nir_alu_instr
*alu
,
1119 bool is_if_condition
)
1122 b
->cursor
= nir_before_src(alu_use
, is_if_condition
);
1123 if (!evaluate_if_condition(nif
, b
->cursor
, &bool_value
))
1126 nir_ssa_def
*def
[4] = {0};
1127 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
1128 if (alu
->src
[i
].src
.ssa
== use_src
->ssa
) {
1129 def
[i
] = nir_imm_bool(b
, bool_value
);
1131 def
[i
] = alu
->src
[i
].src
.ssa
;
1135 nir_ssa_def
*nalu
= clone_alu_and_replace_src_defs(b
, alu
, def
);
1137 /* Rewrite use to use new alu instruction */
1138 nir_src new_src
= nir_src_for_ssa(nalu
);
1140 if (is_if_condition
)
1141 nir_if_rewrite_condition(alu_use
->parent_if
, new_src
);
1143 nir_instr_rewrite_src(alu_use
->parent_instr
, alu_use
, new_src
);
1149 can_propagate_through_alu(nir_src
*src
)
1151 if (src
->parent_instr
->type
!= nir_instr_type_alu
)
1154 nir_alu_instr
*alu
= nir_instr_as_alu(src
->parent_instr
);
1162 return src
== &alu
->src
[0].src
;
1169 evaluate_condition_use(nir_builder
*b
, nir_if
*nif
, nir_src
*use_src
,
1170 bool is_if_condition
)
1172 bool progress
= false;
1174 b
->cursor
= nir_before_src(use_src
, is_if_condition
);
1177 if (evaluate_if_condition(nif
, b
->cursor
, &bool_value
)) {
1178 /* Rewrite use to use const */
1179 nir_src imm_src
= nir_src_for_ssa(nir_imm_bool(b
, bool_value
));
1180 if (is_if_condition
)
1181 nir_if_rewrite_condition(use_src
->parent_if
, imm_src
);
1183 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, imm_src
);
1188 if (!is_if_condition
&& can_propagate_through_alu(use_src
)) {
1189 nir_alu_instr
*alu
= nir_instr_as_alu(use_src
->parent_instr
);
1191 nir_foreach_use_safe(alu_use
, &alu
->dest
.dest
.ssa
) {
1192 progress
|= propagate_condition_eval(b
, nif
, use_src
, alu_use
, alu
,
1196 nir_foreach_if_use_safe(alu_use
, &alu
->dest
.dest
.ssa
) {
1197 progress
|= propagate_condition_eval(b
, nif
, use_src
, alu_use
, alu
,
1206 opt_if_evaluate_condition_use(nir_builder
*b
, nir_if
*nif
)
1208 bool progress
= false;
1210 /* Evaluate any uses of the if condition inside the if branches */
1211 assert(nif
->condition
.is_ssa
);
1212 nir_foreach_use_safe(use_src
, nif
->condition
.ssa
) {
1213 progress
|= evaluate_condition_use(b
, nif
, use_src
, false);
1216 nir_foreach_if_use_safe(use_src
, nif
->condition
.ssa
) {
1217 if (use_src
->parent_if
!= nif
)
1218 progress
|= evaluate_condition_use(b
, nif
, use_src
, true);
1225 simple_merge_if(nir_if
*dest_if
, nir_if
*src_if
, bool dest_if_then
,
1228 /* Now merge the if branch */
1229 nir_block
*dest_blk
= dest_if_then
? nir_if_last_then_block(dest_if
)
1230 : nir_if_last_else_block(dest_if
);
1232 struct exec_list
*list
= src_if_then
? &src_if
->then_list
1233 : &src_if
->else_list
;
1235 nir_cf_list if_cf_list
;
1236 nir_cf_extract(&if_cf_list
, nir_before_cf_list(list
),
1237 nir_after_cf_list(list
));
1238 nir_cf_reinsert(&if_cf_list
, nir_after_block(dest_blk
));
1242 opt_if_merge(nir_if
*nif
)
1244 bool progress
= false;
1246 nir_block
*next_blk
= nir_cf_node_cf_tree_next(&nif
->cf_node
);
1247 if (next_blk
&& nif
->condition
.is_ssa
) {
1248 nir_if
*next_if
= nir_block_get_following_if(next_blk
);
1249 if (next_if
&& next_if
->condition
.is_ssa
) {
1251 /* Here we merge two consecutive ifs that have the same
1265 * Note: This only merges if-statements when the block between them
1266 * is empty. The reason we don't try to merge ifs that just have phis
1267 * between them is because this can results in increased register
1268 * pressure. For example when merging if ladders created by indirect
1271 if (nif
->condition
.ssa
== next_if
->condition
.ssa
&&
1272 exec_list_is_empty(&next_blk
->instr_list
)) {
1274 simple_merge_if(nif
, next_if
, true, true);
1275 simple_merge_if(nif
, next_if
, false, false);
1277 nir_block
*new_then_block
= nir_if_last_then_block(nif
);
1278 nir_block
*new_else_block
= nir_if_last_else_block(nif
);
1280 nir_block
*old_then_block
= nir_if_last_then_block(next_if
);
1281 nir_block
*old_else_block
= nir_if_last_else_block(next_if
);
1283 /* Rewrite the predecessor block for any phis following the second
1286 rewrite_phi_predecessor_blocks(next_if
, old_then_block
,
1291 /* Move phis after merged if to avoid them being deleted when we
1292 * remove the merged if-statement.
1294 nir_block
*after_next_if_block
=
1295 nir_cf_node_as_block(nir_cf_node_next(&next_if
->cf_node
));
1297 nir_foreach_instr_safe(instr
, after_next_if_block
) {
1298 if (instr
->type
!= nir_instr_type_phi
)
1301 exec_node_remove(&instr
->node
);
1302 exec_list_push_tail(&next_blk
->instr_list
, &instr
->node
);
1303 instr
->block
= next_blk
;
1306 nir_cf_node_remove(&next_if
->cf_node
);
1317 opt_if_cf_list(nir_builder
*b
, struct exec_list
*cf_list
)
1319 bool progress
= false;
1320 foreach_list_typed(nir_cf_node
, cf_node
, node
, cf_list
) {
1321 switch (cf_node
->type
) {
1322 case nir_cf_node_block
:
1325 case nir_cf_node_if
: {
1326 nir_if
*nif
= nir_cf_node_as_if(cf_node
);
1327 progress
|= opt_if_cf_list(b
, &nif
->then_list
);
1328 progress
|= opt_if_cf_list(b
, &nif
->else_list
);
1329 progress
|= opt_if_loop_terminator(nif
);
1330 progress
|= opt_if_merge(nif
);
1331 progress
|= opt_if_simplification(b
, nif
);
1335 case nir_cf_node_loop
: {
1336 nir_loop
*loop
= nir_cf_node_as_loop(cf_node
);
1337 progress
|= opt_if_cf_list(b
, &loop
->body
);
1338 progress
|= opt_simplify_bcsel_of_phi(b
, loop
);
1339 progress
|= opt_peel_loop_initial_if(loop
);
1340 progress
|= opt_if_loop_last_continue(loop
);
1344 case nir_cf_node_function
:
1345 unreachable("Invalid cf type");
1353 * These optimisations depend on nir_metadata_block_index and therefore must
1354 * not do anything to cause the metadata to become invalid.
1357 opt_if_safe_cf_list(nir_builder
*b
, struct exec_list
*cf_list
)
1359 bool progress
= false;
1360 foreach_list_typed(nir_cf_node
, cf_node
, node
, cf_list
) {
1361 switch (cf_node
->type
) {
1362 case nir_cf_node_block
:
1365 case nir_cf_node_if
: {
1366 nir_if
*nif
= nir_cf_node_as_if(cf_node
);
1367 progress
|= opt_if_safe_cf_list(b
, &nif
->then_list
);
1368 progress
|= opt_if_safe_cf_list(b
, &nif
->else_list
);
1369 progress
|= opt_if_evaluate_condition_use(b
, nif
);
1373 case nir_cf_node_loop
: {
1374 nir_loop
*loop
= nir_cf_node_as_loop(cf_node
);
1375 progress
|= opt_if_safe_cf_list(b
, &loop
->body
);
1376 progress
|= opt_split_alu_of_phi(b
, loop
);
1380 case nir_cf_node_function
:
1381 unreachable("Invalid cf type");
1389 nir_opt_if(nir_shader
*shader
)
1391 bool progress
= false;
1393 nir_foreach_function(function
, shader
) {
1394 if (function
->impl
== NULL
)
1398 nir_builder_init(&b
, function
->impl
);
1400 nir_metadata_require(function
->impl
, nir_metadata_block_index
|
1401 nir_metadata_dominance
);
1402 progress
= opt_if_safe_cf_list(&b
, &function
->impl
->body
);
1403 nir_metadata_preserve(function
->impl
, nir_metadata_block_index
|
1404 nir_metadata_dominance
);
1406 if (opt_if_cf_list(&b
, &function
->impl
->body
)) {
1407 nir_metadata_preserve(function
->impl
, nir_metadata_none
);
1409 /* If that made progress, we're no longer really in SSA form. We
1410 * need to convert registers back into SSA defs and clean up SSA defs
1411 * that don't dominate their uses.
1413 nir_lower_regs_to_ssa_impl(function
->impl
);
1418 function
->impl
->valid_metadata
&= ~nir_metadata_not_properly_reset
;