2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "nir/nir_builder.h"
26 #include "nir_constant_expressions.h"
27 #include "nir_control_flow.h"
28 #include "nir_loop_analyze.h"
30 static nir_ssa_def
*clone_alu_and_replace_src_defs(nir_builder
*b
,
31 const nir_alu_instr
*alu
,
32 nir_ssa_def
**src_defs
);
35 * Gets the single block that jumps back to the loop header. Already assumes
36 * there is exactly one such block.
39 find_continue_block(nir_loop
*loop
)
41 nir_block
*header_block
= nir_loop_first_block(loop
);
42 nir_block
*prev_block
=
43 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
45 assert(header_block
->predecessors
->entries
== 2);
47 set_foreach(header_block
->predecessors
, pred_entry
) {
48 if (pred_entry
->key
!= prev_block
)
49 return (nir_block
*)pred_entry
->key
;
52 unreachable("Continue block not found!");
56 * Does a phi have one constant value from outside a loop and one from inside?
59 phi_has_constant_from_outside_and_one_from_inside_loop(nir_phi_instr
*phi
,
60 const nir_block
*entry_block
,
62 uint32_t *continue_val
)
64 /* We already know we have exactly one continue */
65 assert(exec_list_length(&phi
->srcs
) == 2);
70 nir_foreach_phi_src(src
, phi
) {
71 assert(src
->src
.is_ssa
);
72 nir_const_value
*const_src
= nir_src_as_const_value(src
->src
);
76 if (src
->pred
!= entry_block
) {
77 *continue_val
= const_src
[0].u32
;
79 *entry_val
= const_src
[0].u32
;
87 * This optimization detects if statements at the tops of loops where the
88 * condition is a phi node of two constants and moves half of the if to above
89 * the loop and the other half of the if to the end of the loop. A simple for
90 * loop "for (int i = 0; i < 4; i++)", when run through the SPIR-V front-end,
91 * ends up looking something like this:
93 * vec1 32 ssa_0 = load_const (0x00000000)
94 * vec1 32 ssa_1 = load_const (0xffffffff)
97 * vec1 32 ssa_2 = phi block_0: ssa_0, block_7: ssa_5
98 * vec1 32 ssa_3 = phi block_0: ssa_0, block_7: ssa_1
101 * vec1 32 ssa_4 = load_const (0x00000001)
102 * vec1 32 ssa_5 = iadd ssa_2, ssa_4
107 * vec1 32 ssa_6 = load_const (0x00000004)
108 * vec1 32 ssa_7 = ilt ssa_5, ssa_6
118 * This turns it into something like this:
120 * // Stuff from block 1
121 * // Stuff from block 3
124 * vec1 32 ssa_2 = phi block_0: ssa_0, block_7: ssa_5
125 * vec1 32 ssa_6 = load_const (0x00000004)
126 * vec1 32 ssa_7 = ilt ssa_2, ssa_6
134 * // Stuff from block 1
135 * // Stuff from block 2
136 * vec1 32 ssa_4 = load_const (0x00000001)
137 * vec1 32 ssa_5 = iadd ssa_2, ssa_4
141 opt_peel_loop_initial_if(nir_loop
*loop
)
143 nir_block
*header_block
= nir_loop_first_block(loop
);
144 nir_block
*const prev_block
=
145 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
147 /* It would be insane if this were not true */
148 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
150 /* The loop must have exactly one continue block which could be a block
151 * ending in a continue instruction or the "natural" continue from the
152 * last block in the loop back to the top.
154 if (header_block
->predecessors
->entries
!= 2)
157 nir_cf_node
*if_node
= nir_cf_node_next(&header_block
->cf_node
);
158 if (!if_node
|| if_node
->type
!= nir_cf_node_if
)
161 nir_if
*nif
= nir_cf_node_as_if(if_node
);
162 assert(nif
->condition
.is_ssa
);
164 nir_ssa_def
*cond
= nif
->condition
.ssa
;
165 if (cond
->parent_instr
->type
!= nir_instr_type_phi
)
168 nir_phi_instr
*cond_phi
= nir_instr_as_phi(cond
->parent_instr
);
169 if (cond
->parent_instr
->block
!= header_block
)
172 uint32_t entry_val
= 0, continue_val
= 0;
173 if (!phi_has_constant_from_outside_and_one_from_inside_loop(cond_phi
,
179 /* If they both execute or both don't execute, this is a job for
180 * nir_dead_cf, not this pass.
182 if ((entry_val
&& continue_val
) || (!entry_val
&& !continue_val
))
185 struct exec_list
*continue_list
, *entry_list
;
187 continue_list
= &nif
->then_list
;
188 entry_list
= &nif
->else_list
;
190 continue_list
= &nif
->else_list
;
191 entry_list
= &nif
->then_list
;
194 /* We want to be moving the contents of entry_list to above the loop so it
195 * can't contain any break or continue instructions.
197 foreach_list_typed(nir_cf_node
, cf_node
, node
, entry_list
) {
198 nir_foreach_block_in_cf_node(block
, cf_node
) {
199 nir_instr
*last_instr
= nir_block_last_instr(block
);
200 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
)
205 /* We're about to re-arrange a bunch of blocks so make sure that we don't
206 * have deref uses which cross block boundaries. We don't want a deref
207 * accidentally ending up in a phi.
209 nir_rematerialize_derefs_in_use_blocks_impl(
210 nir_cf_node_get_function(&loop
->cf_node
));
212 /* Before we do anything, convert the loop to LCSSA. We're about to
213 * replace a bunch of SSA defs with registers and this will prevent any of
214 * it from leaking outside the loop.
216 nir_convert_loop_to_lcssa(loop
);
218 nir_block
*after_if_block
=
219 nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
));
221 /* Get rid of phis in the header block since we will be duplicating it */
222 nir_lower_phis_to_regs_block(header_block
);
223 /* Get rid of phis after the if since dominance will change */
224 nir_lower_phis_to_regs_block(after_if_block
);
226 /* Get rid of SSA defs in the pieces we're about to move around */
227 nir_lower_ssa_defs_to_regs_block(header_block
);
228 nir_foreach_block_in_cf_node(block
, &nif
->cf_node
)
229 nir_lower_ssa_defs_to_regs_block(block
);
231 nir_cf_list header
, tmp
;
232 nir_cf_extract(&header
, nir_before_block(header_block
),
233 nir_after_block(header_block
));
235 nir_cf_list_clone(&tmp
, &header
, &loop
->cf_node
, NULL
);
236 nir_cf_reinsert(&tmp
, nir_before_cf_node(&loop
->cf_node
));
237 nir_cf_extract(&tmp
, nir_before_cf_list(entry_list
),
238 nir_after_cf_list(entry_list
));
239 nir_cf_reinsert(&tmp
, nir_before_cf_node(&loop
->cf_node
));
241 nir_cf_reinsert(&header
,
242 nir_after_block_before_jump(find_continue_block(loop
)));
244 bool continue_list_jumps
=
245 nir_block_ends_in_jump(exec_node_data(nir_block
,
246 exec_list_get_tail(continue_list
),
249 nir_cf_extract(&tmp
, nir_before_cf_list(continue_list
),
250 nir_after_cf_list(continue_list
));
252 /* Get continue block again as the previous reinsert might have removed the
253 * block. Also, if both the continue list and the continue block ends in
254 * jump instructions, removes the jump from the latter, as it will not be
255 * executed if we insert the continue list before it. */
257 nir_block
*continue_block
= find_continue_block(loop
);
259 if (continue_list_jumps
) {
260 nir_instr
*last_instr
= nir_block_last_instr(continue_block
);
261 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
)
262 nir_instr_remove(last_instr
);
265 nir_cf_reinsert(&tmp
,
266 nir_after_block_before_jump(continue_block
));
268 nir_cf_node_remove(&nif
->cf_node
);
274 alu_instr_is_comparison(const nir_alu_instr
*alu
)
289 return nir_alu_instr_is_comparison(alu
);
294 alu_instr_is_type_conversion(const nir_alu_instr
*alu
)
296 return nir_op_infos
[alu
->op
].num_inputs
== 1 &&
297 nir_alu_type_get_base_type(nir_op_infos
[alu
->op
].output_type
) !=
298 nir_alu_type_get_base_type(nir_op_infos
[alu
->op
].input_types
[0]);
302 * Splits ALU instructions that have a source that is a phi node
304 * ALU instructions in the header block of a loop that meet the following
305 * criteria can be split.
307 * - The loop has no continue instructions other than the "natural" continue
308 * at the bottom of the loop.
310 * - At least one source of the instruction is a phi node from the header block.
312 * and either this rule
314 * - The phi node selects undef from the block before the loop and a value
315 * from the continue block of the loop.
319 * - The phi node selects a constant from the block before the loop.
321 * - The non-phi source of the ALU instruction comes from a block that
322 * dominates the block before the loop. The most common failure mode for
323 * this check is sources that are generated in the loop header block.
325 * The split process moves the original ALU instruction to the bottom of the
326 * loop. The phi node source is replaced with the value from the phi node
327 * selected from the continue block (i.e., the non-undef value). A new phi
328 * node is added to the header block that selects either undef from the block
329 * before the loop or the result of the (moved) ALU instruction.
331 * The splitting transforms a loop like:
333 * vec1 32 ssa_7 = undefined
334 * vec1 32 ssa_8 = load_const (0x00000001)
335 * vec1 32 ssa_10 = load_const (0x00000000)
339 * // preds: block_0 block_4
340 * vec1 32 ssa_11 = phi block_0: ssa_7, block_4: ssa_15
341 * vec1 32 ssa_12 = phi block_0: ssa_1, block_4: ssa_15
342 * vec1 32 ssa_13 = phi block_0: ssa_10, block_4: ssa_16
343 * vec1 32 ssa_14 = iadd ssa_11, ssa_8
344 * vec1 32 ssa_15 = b32csel ssa_13, ssa_14, ssa_12
351 * vec1 32 ssa_7 = undefined
352 * vec1 32 ssa_8 = load_const (0x00000001)
353 * vec1 32 ssa_10 = load_const (0x00000000)
357 * // preds: block_0 block_4
358 * vec1 32 ssa_11 = phi block_0: ssa_7, block_4: ssa_15
359 * vec1 32 ssa_12 = phi block_0: ssa_1, block_4: ssa_15
360 * vec1 32 ssa_13 = phi block_0: ssa_10, block_4: ssa_16
361 * vec1 32 ssa_21 = phi block_0: sss_7, block_4: ssa_20
362 * vec1 32 ssa_15 = b32csel ssa_13, ssa_21, ssa_12
364 * vec1 32 ssa_20 = iadd ssa_15, ssa_8
368 * If the phi does not select an undef, the instruction is duplicated in the
369 * loop continue block (as in the undef case) and in the previous block. When
370 * the ALU instruction is duplicated in the previous block, the correct source
371 * must be selected from the phi node.
374 opt_split_alu_of_phi(nir_builder
*b
, nir_loop
*loop
)
376 bool progress
= false;
377 nir_block
*header_block
= nir_loop_first_block(loop
);
378 nir_block
*const prev_block
=
379 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
381 /* It would be insane if this were not true */
382 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
384 /* The loop must have exactly one continue block which could be a block
385 * ending in a continue instruction or the "natural" continue from the
386 * last block in the loop back to the top.
388 if (header_block
->predecessors
->entries
!= 2)
391 nir_foreach_instr_safe(instr
, header_block
) {
392 if (instr
->type
!= nir_instr_type_alu
)
395 nir_alu_instr
*const alu
= nir_instr_as_alu(instr
);
397 /* Most ALU ops produce an undefined result if any source is undef.
398 * However, operations like bcsel only produce undefined results of the
399 * first operand is undef. Even in the undefined case, the result
400 * should be one of the other two operands, so the result of the bcsel
401 * should never be replaced with undef.
403 * nir_op_vec{2,3,4} and nir_op_mov are excluded because they can easily
404 * lead to infinite optimization loops.
406 if (alu
->op
== nir_op_bcsel
||
407 alu
->op
== nir_op_b32csel
||
408 alu
->op
== nir_op_fcsel
||
409 alu
->op
== nir_op_vec2
||
410 alu
->op
== nir_op_vec3
||
411 alu
->op
== nir_op_vec4
||
412 alu
->op
== nir_op_mov
||
413 alu_instr_is_comparison(alu
) ||
414 alu_instr_is_type_conversion(alu
))
417 bool has_phi_src_from_prev_block
= false;
418 bool all_non_phi_exist_in_prev_block
= true;
419 bool is_prev_result_undef
= true;
420 bool is_prev_result_const
= true;
421 nir_ssa_def
*prev_srcs
[8]; // FINISHME: Array size?
422 nir_ssa_def
*continue_srcs
[8]; // FINISHME: Array size?
424 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
425 nir_instr
*const src_instr
= alu
->src
[i
].src
.ssa
->parent_instr
;
427 /* If the source is a phi in the loop header block, then the
428 * prev_srcs and continue_srcs will come from the different sources
431 if (src_instr
->type
== nir_instr_type_phi
&&
432 src_instr
->block
== header_block
) {
433 nir_phi_instr
*const phi
= nir_instr_as_phi(src_instr
);
435 /* Only strictly need to NULL out the pointers when the assertions
436 * (below) are compiled in. Debugging a NULL pointer deref in the
437 * wild is easier than debugging a random pointer deref, so set
438 * NULL unconditionally just to be safe.
441 continue_srcs
[i
] = NULL
;
443 nir_foreach_phi_src(src_of_phi
, phi
) {
444 if (src_of_phi
->pred
== prev_block
) {
445 if (src_of_phi
->src
.ssa
->parent_instr
->type
!=
446 nir_instr_type_ssa_undef
) {
447 is_prev_result_undef
= false;
450 if (src_of_phi
->src
.ssa
->parent_instr
->type
!=
451 nir_instr_type_load_const
) {
452 is_prev_result_const
= false;
455 prev_srcs
[i
] = src_of_phi
->src
.ssa
;
456 has_phi_src_from_prev_block
= true;
458 continue_srcs
[i
] = src_of_phi
->src
.ssa
;
461 assert(prev_srcs
[i
] != NULL
);
462 assert(continue_srcs
[i
] != NULL
);
464 /* If the source is not a phi (or a phi in a block other than the
465 * loop header), then the value must exist in prev_block.
467 if (!nir_block_dominates(src_instr
->block
, prev_block
)) {
468 all_non_phi_exist_in_prev_block
= false;
472 prev_srcs
[i
] = alu
->src
[i
].src
.ssa
;
473 continue_srcs
[i
] = alu
->src
[i
].src
.ssa
;
477 if (has_phi_src_from_prev_block
&& all_non_phi_exist_in_prev_block
&&
478 (is_prev_result_undef
|| is_prev_result_const
)) {
479 nir_block
*const continue_block
= find_continue_block(loop
);
480 nir_ssa_def
*prev_value
;
482 if (!is_prev_result_undef
) {
483 b
->cursor
= nir_after_block(prev_block
);
484 prev_value
= clone_alu_and_replace_src_defs(b
, alu
, prev_srcs
);
486 /* Since the undef used as the source of the original ALU
487 * instruction may have different number of components or
488 * bit size than the result of that instruction, a new
489 * undef must be created.
491 nir_ssa_undef_instr
*undef
=
492 nir_ssa_undef_instr_create(b
->shader
,
493 alu
->dest
.dest
.ssa
.num_components
,
494 alu
->dest
.dest
.ssa
.bit_size
);
496 nir_instr_insert_after_block(prev_block
, &undef
->instr
);
498 prev_value
= &undef
->def
;
501 /* Make a copy of the original ALU instruction. Replace the sources
502 * of the new instruction that read a phi with an undef source from
503 * prev_block with the non-undef source of that phi.
505 * Insert the new instruction at the end of the continue block.
507 b
->cursor
= nir_after_block_before_jump(continue_block
);
509 nir_ssa_def
*const alu_copy
=
510 clone_alu_and_replace_src_defs(b
, alu
, continue_srcs
);
512 /* Make a new phi node that selects a value from prev_block and the
513 * result of the new instruction from continue_block.
515 nir_phi_instr
*const phi
= nir_phi_instr_create(b
->shader
);
516 nir_phi_src
*phi_src
;
518 phi_src
= ralloc(phi
, nir_phi_src
);
519 phi_src
->pred
= prev_block
;
520 phi_src
->src
= nir_src_for_ssa(prev_value
);
521 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
523 phi_src
= ralloc(phi
, nir_phi_src
);
524 phi_src
->pred
= continue_block
;
525 phi_src
->src
= nir_src_for_ssa(alu_copy
);
526 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
528 nir_ssa_dest_init(&phi
->instr
, &phi
->dest
,
529 alu_copy
->num_components
, alu_copy
->bit_size
, NULL
);
531 b
->cursor
= nir_after_phis(header_block
);
532 nir_builder_instr_insert(b
, &phi
->instr
);
534 /* Modify all readers of the original ALU instruction to read the
537 nir_foreach_use_safe(use_src
, &alu
->dest
.dest
.ssa
) {
538 nir_instr_rewrite_src(use_src
->parent_instr
,
540 nir_src_for_ssa(&phi
->dest
.ssa
));
543 nir_foreach_if_use_safe(use_src
, &alu
->dest
.dest
.ssa
) {
544 nir_if_rewrite_condition(use_src
->parent_if
,
545 nir_src_for_ssa(&phi
->dest
.ssa
));
548 /* Since the original ALU instruction no longer has any readers, just
551 nir_instr_remove_v(&alu
->instr
);
562 * Get the SSA value from a phi node that corresponds to a specific block
565 ssa_for_phi_from_block(nir_phi_instr
*phi
, nir_block
*block
)
567 nir_foreach_phi_src(src
, phi
) {
568 if (src
->pred
== block
)
572 assert(!"Block is not a predecessor of phi.");
577 * Simplify a bcsel whose sources are all phi nodes from the loop header block
579 * bcsel instructions in a loop that meet the following criteria can be
580 * converted to phi nodes:
582 * - The loop has no continue instructions other than the "natural" continue
583 * at the bottom of the loop.
585 * - All of the sources of the bcsel are phi nodes in the header block of the
588 * - The phi node representing the condition of the bcsel instruction chooses
589 * only constant values.
591 * The contant value from the condition will select one of the other sources
592 * when entered from outside the loop and the remaining source when entered
593 * from the continue block. Since each of these sources is also a phi node in
594 * the header block, the value of the phi node can be "evaluated." These
595 * evaluated phi nodes provide the sources for a new phi node. All users of
596 * the bcsel result are updated to use the phi node result.
598 * The replacement transforms loops like:
600 * vec1 32 ssa_7 = undefined
601 * vec1 32 ssa_8 = load_const (0x00000001)
602 * vec1 32 ssa_9 = load_const (0x000000c8)
603 * vec1 32 ssa_10 = load_const (0x00000000)
607 * // preds: block_0 block_4
608 * vec1 32 ssa_11 = phi block_0: ssa_1, block_4: ssa_14
609 * vec1 32 ssa_12 = phi block_0: ssa_10, block_4: ssa_15
610 * vec1 32 ssa_13 = phi block_0: ssa_7, block_4: ssa_25
611 * vec1 32 ssa_14 = b32csel ssa_12, ssa_13, ssa_11
612 * vec1 32 ssa_16 = ige32 ssa_14, ssa_9
614 * vec1 32 ssa_15 = load_const (0xffffffff)
616 * vec1 32 ssa_25 = iadd ssa_14, ssa_8
622 * vec1 32 ssa_7 = undefined
623 * vec1 32 ssa_8 = load_const (0x00000001)
624 * vec1 32 ssa_9 = load_const (0x000000c8)
625 * vec1 32 ssa_10 = load_const (0x00000000)
629 * // preds: block_0 block_4
630 * vec1 32 ssa_11 = phi block_0: ssa_1, block_4: ssa_14
631 * vec1 32 ssa_12 = phi block_0: ssa_10, block_4: ssa_15
632 * vec1 32 ssa_13 = phi block_0: ssa_7, block_4: ssa_25
633 * vec1 32 sss_26 = phi block_0: ssa_1, block_4: ssa_25
634 * vec1 32 ssa_16 = ige32 ssa_26, ssa_9
636 * vec1 32 ssa_15 = load_const (0xffffffff)
638 * vec1 32 ssa_25 = iadd ssa_26, ssa_8
643 * It may be possible modify this function to not require a phi node as the
644 * source of the bcsel that is selected when entering from outside the loop.
645 * The only restriction is that the source must be geneated outside the loop
646 * (since it will become the source of a phi node in the header block of the
650 opt_simplify_bcsel_of_phi(nir_builder
*b
, nir_loop
*loop
)
652 bool progress
= false;
653 nir_block
*header_block
= nir_loop_first_block(loop
);
654 nir_block
*const prev_block
=
655 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
657 /* It would be insane if this were not true */
658 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
660 /* The loop must have exactly one continue block which could be a block
661 * ending in a continue instruction or the "natural" continue from the
662 * last block in the loop back to the top.
664 if (header_block
->predecessors
->entries
!= 2)
667 /* We can move any bcsel that can guaranteed to execut on every iteration
668 * of a loop. For now this is accomplished by only taking bcsels from the
669 * header_block. In the future, this could be expanced to include any
670 * bcsel that must come before any break.
672 * For more details, see
673 * https://gitlab.freedesktop.org/mesa/mesa/merge_requests/170#note_110305
675 nir_foreach_instr_safe(instr
, header_block
) {
676 if (instr
->type
!= nir_instr_type_alu
)
679 nir_alu_instr
*const bcsel
= nir_instr_as_alu(instr
);
680 if (bcsel
->op
!= nir_op_bcsel
&&
681 bcsel
->op
!= nir_op_b32csel
&&
682 bcsel
->op
!= nir_op_fcsel
)
686 for (unsigned i
= 0; i
< 3; i
++) {
687 /* FINISHME: The abs and negate cases could be handled by adding
688 * move instructions at the bottom of the continue block and more
689 * phi nodes in the header_block.
691 if (!bcsel
->src
[i
].src
.is_ssa
||
692 bcsel
->src
[i
].src
.ssa
->parent_instr
->type
!= nir_instr_type_phi
||
693 bcsel
->src
[i
].src
.ssa
->parent_instr
->block
!= header_block
||
694 bcsel
->src
[i
].negate
|| bcsel
->src
[i
].abs
) {
703 nir_phi_instr
*const cond_phi
=
704 nir_instr_as_phi(bcsel
->src
[0].src
.ssa
->parent_instr
);
706 uint32_t entry_val
= 0, continue_val
= 0;
707 if (!phi_has_constant_from_outside_and_one_from_inside_loop(cond_phi
,
713 /* If they both execute or both don't execute, this is a job for
714 * nir_dead_cf, not this pass.
716 if ((entry_val
&& continue_val
) || (!entry_val
&& !continue_val
))
719 const unsigned entry_src
= entry_val
? 1 : 2;
720 const unsigned continue_src
= entry_val
? 2 : 1;
722 /* Create a new phi node that selects the value for prev_block from
723 * the bcsel source that is selected by entry_val and the value for
724 * continue_block from the other bcsel source. Both sources have
725 * already been verified to be phi nodes.
727 nir_block
*const continue_block
= find_continue_block(loop
);
728 nir_phi_instr
*const phi
= nir_phi_instr_create(b
->shader
);
729 nir_phi_src
*phi_src
;
731 phi_src
= ralloc(phi
, nir_phi_src
);
732 phi_src
->pred
= prev_block
;
734 nir_src_for_ssa(ssa_for_phi_from_block(nir_instr_as_phi(bcsel
->src
[entry_src
].src
.ssa
->parent_instr
),
736 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
738 phi_src
= ralloc(phi
, nir_phi_src
);
739 phi_src
->pred
= continue_block
;
741 nir_src_for_ssa(ssa_for_phi_from_block(nir_instr_as_phi(bcsel
->src
[continue_src
].src
.ssa
->parent_instr
),
743 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
745 nir_ssa_dest_init(&phi
->instr
,
747 nir_dest_num_components(bcsel
->dest
.dest
),
748 nir_dest_bit_size(bcsel
->dest
.dest
),
751 b
->cursor
= nir_after_phis(header_block
);
752 nir_builder_instr_insert(b
, &phi
->instr
);
754 /* Modify all readers of the bcsel instruction to read the result of
757 nir_foreach_use_safe(use_src
, &bcsel
->dest
.dest
.ssa
) {
758 nir_instr_rewrite_src(use_src
->parent_instr
,
760 nir_src_for_ssa(&phi
->dest
.ssa
));
763 nir_foreach_if_use_safe(use_src
, &bcsel
->dest
.dest
.ssa
) {
764 nir_if_rewrite_condition(use_src
->parent_if
,
765 nir_src_for_ssa(&phi
->dest
.ssa
));
768 /* Since the original bcsel instruction no longer has any readers,
771 nir_instr_remove_v(&bcsel
->instr
);
781 is_block_empty(nir_block
*block
)
783 return nir_cf_node_is_last(&block
->cf_node
) &&
784 exec_list_is_empty(&block
->instr_list
);
788 nir_block_ends_in_continue(nir_block
*block
)
790 if (exec_list_is_empty(&block
->instr_list
))
793 nir_instr
*instr
= nir_block_last_instr(block
);
794 return instr
->type
== nir_instr_type_jump
&&
795 nir_instr_as_jump(instr
)->type
== nir_jump_continue
;
799 * This optimization turns:
823 * The continue should then be removed by nir_opt_trivial_continues() and the
824 * loop can potentially be unrolled.
826 * Note: Unless the function param aggressive_last_continue==true do_work_2()
827 * is only ever blocks and nested loops. We avoid nesting other if-statments
828 * in the branch as this can result in increased register pressure, and in
829 * the i965 driver it causes a large amount of spilling in shader-db.
830 * For RADV however nesting these if-statements allows further continues to be
831 * remove and provides a significant FPS boost in Doom, which is why we have
832 * opted for this special bool to enable more aggresive optimisations.
833 * TODO: The GCM pass solves most of the spilling regressions in i965, if it
834 * is ever enabled we should consider removing the aggressive_last_continue
838 opt_if_loop_last_continue(nir_loop
*loop
, bool aggressive_last_continue
)
841 bool then_ends_in_continue
= false;
842 bool else_ends_in_continue
= false;
844 /* Scan the control flow of the loop from the last to the first node
845 * looking for an if-statement we can optimise.
847 nir_block
*last_block
= nir_loop_last_block(loop
);
848 nir_cf_node
*if_node
= nir_cf_node_prev(&last_block
->cf_node
);
850 if (if_node
->type
== nir_cf_node_if
) {
851 nif
= nir_cf_node_as_if(if_node
);
852 nir_block
*then_block
= nir_if_last_then_block(nif
);
853 nir_block
*else_block
= nir_if_last_else_block(nif
);
855 then_ends_in_continue
= nir_block_ends_in_continue(then_block
);
856 else_ends_in_continue
= nir_block_ends_in_continue(else_block
);
858 /* If both branches end in a jump do nothing, this should be handled
859 * by nir_opt_dead_cf().
861 if ((then_ends_in_continue
|| nir_block_ends_in_break(then_block
)) &&
862 (else_ends_in_continue
|| nir_block_ends_in_break(else_block
)))
865 /* If continue found stop scanning and attempt optimisation, or
867 if (then_ends_in_continue
|| else_ends_in_continue
||
868 !aggressive_last_continue
)
872 if_node
= nir_cf_node_prev(if_node
);
875 /* If we didn't find an if to optimise return */
876 if (!then_ends_in_continue
&& !else_ends_in_continue
)
879 /* If there is nothing after the if-statement we bail */
880 if (&nif
->cf_node
== nir_cf_node_prev(&last_block
->cf_node
) &&
881 exec_list_is_empty(&last_block
->instr_list
))
884 /* Move the last block of the loop inside the last if-statement */
886 nir_cf_extract(&tmp
, nir_after_cf_node(if_node
),
887 nir_after_block(last_block
));
888 if (then_ends_in_continue
)
889 nir_cf_reinsert(&tmp
, nir_after_cf_list(&nif
->else_list
));
891 nir_cf_reinsert(&tmp
, nir_after_cf_list(&nif
->then_list
));
893 /* In order to avoid running nir_lower_regs_to_ssa_impl() every time an if
894 * opt makes progress we leave nir_opt_trivial_continues() to remove the
895 * continue now that the end of the loop has been simplified.
901 /* Walk all the phis in the block immediately following the if statement and
905 rewrite_phi_predecessor_blocks(nir_if
*nif
,
906 nir_block
*old_then_block
,
907 nir_block
*old_else_block
,
908 nir_block
*new_then_block
,
909 nir_block
*new_else_block
)
911 nir_block
*after_if_block
=
912 nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
));
914 nir_foreach_instr(instr
, after_if_block
) {
915 if (instr
->type
!= nir_instr_type_phi
)
918 nir_phi_instr
*phi
= nir_instr_as_phi(instr
);
920 foreach_list_typed(nir_phi_src
, src
, node
, &phi
->srcs
) {
921 if (src
->pred
== old_then_block
) {
922 src
->pred
= new_then_block
;
923 } else if (src
->pred
== old_else_block
) {
924 src
->pred
= new_else_block
;
931 * This optimization turns:
946 opt_if_simplification(nir_builder
*b
, nir_if
*nif
)
948 /* Only simplify if the then block is empty and the else block is not. */
949 if (!is_block_empty(nir_if_first_then_block(nif
)) ||
950 is_block_empty(nir_if_first_else_block(nif
)))
953 /* Make sure the condition is a comparison operation. */
954 nir_instr
*src_instr
= nif
->condition
.ssa
->parent_instr
;
955 if (src_instr
->type
!= nir_instr_type_alu
)
958 nir_alu_instr
*alu_instr
= nir_instr_as_alu(src_instr
);
959 if (!nir_alu_instr_is_comparison(alu_instr
))
962 /* Insert the inverted instruction and rewrite the condition. */
963 b
->cursor
= nir_after_instr(&alu_instr
->instr
);
965 nir_ssa_def
*new_condition
=
966 nir_inot(b
, &alu_instr
->dest
.dest
.ssa
);
968 nir_if_rewrite_condition(nif
, nir_src_for_ssa(new_condition
));
970 /* Grab pointers to the last then/else blocks for fixing up the phis. */
971 nir_block
*then_block
= nir_if_last_then_block(nif
);
972 nir_block
*else_block
= nir_if_last_else_block(nif
);
974 rewrite_phi_predecessor_blocks(nif
, then_block
, else_block
, else_block
,
977 /* Finally, move the else block to the then block. */
979 nir_cf_extract(&tmp
, nir_before_cf_list(&nif
->else_list
),
980 nir_after_cf_list(&nif
->else_list
));
981 nir_cf_reinsert(&tmp
, nir_before_cf_list(&nif
->then_list
));
987 * This optimization simplifies potential loop terminators which then allows
988 * other passes such as opt_if_simplification() and loop unrolling to progress
992 * ... then block instructions ...
1005 * ... then block instructions ...
1008 opt_if_loop_terminator(nir_if
*nif
)
1010 nir_block
*break_blk
= NULL
;
1011 nir_block
*continue_from_blk
= NULL
;
1012 bool continue_from_then
= true;
1014 nir_block
*last_then
= nir_if_last_then_block(nif
);
1015 nir_block
*last_else
= nir_if_last_else_block(nif
);
1017 if (nir_block_ends_in_break(last_then
)) {
1018 break_blk
= last_then
;
1019 continue_from_blk
= last_else
;
1020 continue_from_then
= false;
1021 } else if (nir_block_ends_in_break(last_else
)) {
1022 break_blk
= last_else
;
1023 continue_from_blk
= last_then
;
1026 /* Continue if the if-statement contained no jumps at all */
1030 /* If the continue from block is empty then return as there is nothing to
1033 nir_block
*first_continue_from_blk
= continue_from_then
?
1034 nir_if_first_then_block(nif
) :
1035 nir_if_first_else_block(nif
);
1036 if (is_block_empty(first_continue_from_blk
))
1039 if (!nir_is_trivial_loop_if(nif
, break_blk
))
1042 /* Even though this if statement has a jump on one side, we may still have
1043 * phis afterwards. Single-source phis can be produced by loop unrolling
1044 * or dead control-flow passes and are perfectly legal. Run a quick phi
1045 * removal on the block after the if to clean up any such phis.
1047 nir_opt_remove_phis_block(nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
)));
1049 /* Finally, move the continue from branch after the if-statement. */
1051 nir_cf_extract(&tmp
, nir_before_block(first_continue_from_blk
),
1052 nir_after_block(continue_from_blk
));
1053 nir_cf_reinsert(&tmp
, nir_after_cf_node(&nif
->cf_node
));
1059 evaluate_if_condition(nir_if
*nif
, nir_cursor cursor
, bool *value
)
1061 nir_block
*use_block
= nir_cursor_current_block(cursor
);
1062 if (nir_block_dominates(nir_if_first_then_block(nif
), use_block
)) {
1065 } else if (nir_block_dominates(nir_if_first_else_block(nif
), use_block
)) {
1073 static nir_ssa_def
*
1074 clone_alu_and_replace_src_defs(nir_builder
*b
, const nir_alu_instr
*alu
,
1075 nir_ssa_def
**src_defs
)
1077 nir_alu_instr
*nalu
= nir_alu_instr_create(b
->shader
, alu
->op
);
1078 nalu
->exact
= alu
->exact
;
1080 nir_ssa_dest_init(&nalu
->instr
, &nalu
->dest
.dest
,
1081 alu
->dest
.dest
.ssa
.num_components
,
1082 alu
->dest
.dest
.ssa
.bit_size
, alu
->dest
.dest
.ssa
.name
);
1084 nalu
->dest
.saturate
= alu
->dest
.saturate
;
1085 nalu
->dest
.write_mask
= alu
->dest
.write_mask
;
1087 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
1088 assert(alu
->src
[i
].src
.is_ssa
);
1089 nalu
->src
[i
].src
= nir_src_for_ssa(src_defs
[i
]);
1090 nalu
->src
[i
].negate
= alu
->src
[i
].negate
;
1091 nalu
->src
[i
].abs
= alu
->src
[i
].abs
;
1092 memcpy(nalu
->src
[i
].swizzle
, alu
->src
[i
].swizzle
,
1093 sizeof(nalu
->src
[i
].swizzle
));
1096 nir_builder_instr_insert(b
, &nalu
->instr
);
1098 return &nalu
->dest
.dest
.ssa
;;
1102 * This propagates if condition evaluation down the chain of some alu
1103 * instructions. For example by checking the use of some of the following alu
1104 * instruction we can eventually replace ssa_107 with NIR_TRUE.
1108 * vec1 32 ssa_85 = load_const (0x00000002)
1109 * vec1 32 ssa_86 = ieq ssa_48, ssa_85
1110 * vec1 32 ssa_87 = load_const (0x00000001)
1111 * vec1 32 ssa_88 = ieq ssa_48, ssa_87
1112 * vec1 32 ssa_89 = ior ssa_86, ssa_88
1113 * vec1 32 ssa_90 = ieq ssa_48, ssa_0
1114 * vec1 32 ssa_91 = ior ssa_89, ssa_90
1139 * vec1 32 ssa_107 = inot ssa_91
1149 propagate_condition_eval(nir_builder
*b
, nir_if
*nif
, nir_src
*use_src
,
1150 nir_src
*alu_use
, nir_alu_instr
*alu
,
1151 bool is_if_condition
)
1154 b
->cursor
= nir_before_src(alu_use
, is_if_condition
);
1155 if (!evaluate_if_condition(nif
, b
->cursor
, &bool_value
))
1158 nir_ssa_def
*def
[4] = {0};
1159 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
1160 if (alu
->src
[i
].src
.ssa
== use_src
->ssa
) {
1161 def
[i
] = nir_imm_bool(b
, bool_value
);
1163 def
[i
] = alu
->src
[i
].src
.ssa
;
1167 nir_ssa_def
*nalu
= clone_alu_and_replace_src_defs(b
, alu
, def
);
1169 /* Rewrite use to use new alu instruction */
1170 nir_src new_src
= nir_src_for_ssa(nalu
);
1172 if (is_if_condition
)
1173 nir_if_rewrite_condition(alu_use
->parent_if
, new_src
);
1175 nir_instr_rewrite_src(alu_use
->parent_instr
, alu_use
, new_src
);
1181 can_propagate_through_alu(nir_src
*src
)
1183 if (src
->parent_instr
->type
!= nir_instr_type_alu
)
1186 nir_alu_instr
*alu
= nir_instr_as_alu(src
->parent_instr
);
1194 return src
== &alu
->src
[0].src
;
1201 evaluate_condition_use(nir_builder
*b
, nir_if
*nif
, nir_src
*use_src
,
1202 bool is_if_condition
)
1204 bool progress
= false;
1206 b
->cursor
= nir_before_src(use_src
, is_if_condition
);
1209 if (evaluate_if_condition(nif
, b
->cursor
, &bool_value
)) {
1210 /* Rewrite use to use const */
1211 nir_src imm_src
= nir_src_for_ssa(nir_imm_bool(b
, bool_value
));
1212 if (is_if_condition
)
1213 nir_if_rewrite_condition(use_src
->parent_if
, imm_src
);
1215 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, imm_src
);
1220 if (!is_if_condition
&& can_propagate_through_alu(use_src
)) {
1221 nir_alu_instr
*alu
= nir_instr_as_alu(use_src
->parent_instr
);
1223 nir_foreach_use_safe(alu_use
, &alu
->dest
.dest
.ssa
) {
1224 progress
|= propagate_condition_eval(b
, nif
, use_src
, alu_use
, alu
,
1228 nir_foreach_if_use_safe(alu_use
, &alu
->dest
.dest
.ssa
) {
1229 progress
|= propagate_condition_eval(b
, nif
, use_src
, alu_use
, alu
,
1238 opt_if_evaluate_condition_use(nir_builder
*b
, nir_if
*nif
)
1240 bool progress
= false;
1242 /* Evaluate any uses of the if condition inside the if branches */
1243 assert(nif
->condition
.is_ssa
);
1244 nir_foreach_use_safe(use_src
, nif
->condition
.ssa
) {
1245 progress
|= evaluate_condition_use(b
, nif
, use_src
, false);
1248 nir_foreach_if_use_safe(use_src
, nif
->condition
.ssa
) {
1249 if (use_src
->parent_if
!= nif
)
1250 progress
|= evaluate_condition_use(b
, nif
, use_src
, true);
1257 simple_merge_if(nir_if
*dest_if
, nir_if
*src_if
, bool dest_if_then
,
1260 /* Now merge the if branch */
1261 nir_block
*dest_blk
= dest_if_then
? nir_if_last_then_block(dest_if
)
1262 : nir_if_last_else_block(dest_if
);
1264 struct exec_list
*list
= src_if_then
? &src_if
->then_list
1265 : &src_if
->else_list
;
1267 nir_cf_list if_cf_list
;
1268 nir_cf_extract(&if_cf_list
, nir_before_cf_list(list
),
1269 nir_after_cf_list(list
));
1270 nir_cf_reinsert(&if_cf_list
, nir_after_block(dest_blk
));
1274 opt_if_merge(nir_if
*nif
)
1276 bool progress
= false;
1278 nir_block
*next_blk
= nir_cf_node_cf_tree_next(&nif
->cf_node
);
1279 if (next_blk
&& nif
->condition
.is_ssa
) {
1280 nir_if
*next_if
= nir_block_get_following_if(next_blk
);
1281 if (next_if
&& next_if
->condition
.is_ssa
) {
1283 /* Here we merge two consecutive ifs that have the same
1297 * Note: This only merges if-statements when the block between them
1298 * is empty. The reason we don't try to merge ifs that just have phis
1299 * between them is because this can results in increased register
1300 * pressure. For example when merging if ladders created by indirect
1303 if (nif
->condition
.ssa
== next_if
->condition
.ssa
&&
1304 exec_list_is_empty(&next_blk
->instr_list
)) {
1306 simple_merge_if(nif
, next_if
, true, true);
1307 simple_merge_if(nif
, next_if
, false, false);
1309 nir_block
*new_then_block
= nir_if_last_then_block(nif
);
1310 nir_block
*new_else_block
= nir_if_last_else_block(nif
);
1312 nir_block
*old_then_block
= nir_if_last_then_block(next_if
);
1313 nir_block
*old_else_block
= nir_if_last_else_block(next_if
);
1315 /* Rewrite the predecessor block for any phis following the second
1318 rewrite_phi_predecessor_blocks(next_if
, old_then_block
,
1323 /* Move phis after merged if to avoid them being deleted when we
1324 * remove the merged if-statement.
1326 nir_block
*after_next_if_block
=
1327 nir_cf_node_as_block(nir_cf_node_next(&next_if
->cf_node
));
1329 nir_foreach_instr_safe(instr
, after_next_if_block
) {
1330 if (instr
->type
!= nir_instr_type_phi
)
1333 exec_node_remove(&instr
->node
);
1334 exec_list_push_tail(&next_blk
->instr_list
, &instr
->node
);
1335 instr
->block
= next_blk
;
1338 nir_cf_node_remove(&next_if
->cf_node
);
1349 opt_if_cf_list(nir_builder
*b
, struct exec_list
*cf_list
,
1350 bool aggressive_last_continue
)
1352 bool progress
= false;
1353 foreach_list_typed(nir_cf_node
, cf_node
, node
, cf_list
) {
1354 switch (cf_node
->type
) {
1355 case nir_cf_node_block
:
1358 case nir_cf_node_if
: {
1359 nir_if
*nif
= nir_cf_node_as_if(cf_node
);
1360 progress
|= opt_if_cf_list(b
, &nif
->then_list
,
1361 aggressive_last_continue
);
1362 progress
|= opt_if_cf_list(b
, &nif
->else_list
,
1363 aggressive_last_continue
);
1364 progress
|= opt_if_loop_terminator(nif
);
1365 progress
|= opt_if_merge(nif
);
1366 progress
|= opt_if_simplification(b
, nif
);
1370 case nir_cf_node_loop
: {
1371 nir_loop
*loop
= nir_cf_node_as_loop(cf_node
);
1372 progress
|= opt_if_cf_list(b
, &loop
->body
,
1373 aggressive_last_continue
);
1374 progress
|= opt_simplify_bcsel_of_phi(b
, loop
);
1375 progress
|= opt_peel_loop_initial_if(loop
);
1376 progress
|= opt_if_loop_last_continue(loop
,
1377 aggressive_last_continue
);
1381 case nir_cf_node_function
:
1382 unreachable("Invalid cf type");
1390 * These optimisations depend on nir_metadata_block_index and therefore must
1391 * not do anything to cause the metadata to become invalid.
1394 opt_if_safe_cf_list(nir_builder
*b
, struct exec_list
*cf_list
)
1396 bool progress
= false;
1397 foreach_list_typed(nir_cf_node
, cf_node
, node
, cf_list
) {
1398 switch (cf_node
->type
) {
1399 case nir_cf_node_block
:
1402 case nir_cf_node_if
: {
1403 nir_if
*nif
= nir_cf_node_as_if(cf_node
);
1404 progress
|= opt_if_safe_cf_list(b
, &nif
->then_list
);
1405 progress
|= opt_if_safe_cf_list(b
, &nif
->else_list
);
1406 progress
|= opt_if_evaluate_condition_use(b
, nif
);
1410 case nir_cf_node_loop
: {
1411 nir_loop
*loop
= nir_cf_node_as_loop(cf_node
);
1412 progress
|= opt_if_safe_cf_list(b
, &loop
->body
);
1413 progress
|= opt_split_alu_of_phi(b
, loop
);
1417 case nir_cf_node_function
:
1418 unreachable("Invalid cf type");
1426 nir_opt_if(nir_shader
*shader
, bool aggressive_last_continue
)
1428 bool progress
= false;
1430 nir_foreach_function(function
, shader
) {
1431 if (function
->impl
== NULL
)
1435 nir_builder_init(&b
, function
->impl
);
1437 nir_metadata_require(function
->impl
, nir_metadata_block_index
|
1438 nir_metadata_dominance
);
1439 progress
= opt_if_safe_cf_list(&b
, &function
->impl
->body
);
1440 nir_metadata_preserve(function
->impl
, nir_metadata_block_index
|
1441 nir_metadata_dominance
);
1443 if (opt_if_cf_list(&b
, &function
->impl
->body
,
1444 aggressive_last_continue
)) {
1445 nir_metadata_preserve(function
->impl
, nir_metadata_none
);
1447 /* If that made progress, we're no longer really in SSA form. We
1448 * need to convert registers back into SSA defs and clean up SSA defs
1449 * that don't dominate their uses.
1451 nir_lower_regs_to_ssa_impl(function
->impl
);
1456 function
->impl
->valid_metadata
&= ~nir_metadata_not_properly_reset
;