src/compiler/nir/nir_opt_peephole_select.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Jason Ekstrand (jason@jlekstrand.net)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow.h"
  30
  31 /*
  32  * Implements a small peephole optimization that looks for
  33  *
  34  * if (cond) {
  35  *    <then SSA defs>
  36  * } else {
  37  *    <else SSA defs>
  38  * }
  39  * phi
  40  * ...
  41  * phi
  42  *
  43  * and replaces it with:
  44  *
  45  * <then SSA defs>
  46  * <else SSA defs>
  47  * bcsel
  48  * ...
  49  * bcsel
  50  *
  51  * where the SSA defs are ALU operations or other cheap instructions (not
  52  * texturing, for example).
  53  *
  54  * If the number of ALU operations in the branches is greater than the limit
  55  * parameter, then the optimization is skipped.  In limit=0 mode, the SSA defs
  56  * must only be MOVs which we expect to get copy-propagated away once they're
  57  * out of the inner blocks.
  58  */
  59
  60 static bool
  61 block_check_for_allowed_instrs(nir_block *block, unsigned *count,
  62                                bool alu_ok, bool indirect_load_ok,
  63                                bool expensive_alu_ok)
  64 {
  65    nir_foreach_instr(instr, block) {
  66       switch (instr->type) {
  67       case nir_instr_type_intrinsic: {
  68          nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
  69
  70          switch (intrin->intrinsic) {
  71          case nir_intrinsic_load_deref: {
  72             nir_deref_instr *const deref = nir_src_as_deref(intrin->src[0]);
  73
  74             switch (deref->mode) {
  75             case nir_var_shader_in:
  76             case nir_var_uniform:
  77                /* Don't try to remove flow control around an indirect load
  78                 * because that flow control may be trying to avoid invalid
  79                 * loads.
  80                 */
  81                if (!indirect_load_ok && nir_deref_instr_has_indirect(deref))
  82                   return false;
  83
  84                break;
  85
  86             default:
  87                return false;
  88             }
  89             break;
  90          }
  91
  92          case nir_intrinsic_load_uniform:
  93             if (!alu_ok)
  94                return false;
  95             break;
  96
  97          default:
  98             return false;
  99          }
 100
 101          break;
 102       }
 103
 104       case nir_instr_type_deref:
 105       case nir_instr_type_load_const:
 106          break;
 107
 108       case nir_instr_type_alu: {
 109          nir_alu_instr *mov = nir_instr_as_alu(instr);
 110          switch (mov->op) {
 111          case nir_op_mov:
 112          case nir_op_fneg:
 113          case nir_op_ineg:
 114          case nir_op_fabs:
 115          case nir_op_iabs:
 116          case nir_op_vec2:
 117          case nir_op_vec3:
 118          case nir_op_vec4:
 119             break;
 120
 121          case nir_op_fcos:
 122          case nir_op_fdiv:
 123          case nir_op_fexp2:
 124          case nir_op_flog2:
 125          case nir_op_fmod:
 126          case nir_op_fpow:
 127          case nir_op_frcp:
 128          case nir_op_frem:
 129          case nir_op_frsq:
 130          case nir_op_fsin:
 131          case nir_op_idiv:
 132          case nir_op_irem:
 133          case nir_op_udiv:
 134             if (!alu_ok || !expensive_alu_ok)
 135                return false;
 136
 137             break;
 138
 139          default:
 140             if (!alu_ok) {
 141                /* It must be a move-like operation. */
 142                return false;
 143             }
 144             break;
 145          }
 146
 147          /* It must be SSA */
 148          if (!mov->dest.dest.is_ssa)
 149             return false;
 150
 151          if (alu_ok) {
 152             (*count)++;
 153          } else {
 154             /* Can't handle saturate */
 155             if (mov->dest.saturate)
 156                return false;
 157
 158             /* It cannot have any if-uses */
 159             if (!list_empty(&mov->dest.dest.ssa.if_uses))
 160                return false;
 161
 162             /* The only uses of this definition must be phis in the successor */
 163             nir_foreach_use(use, &mov->dest.dest.ssa) {
 164                if (use->parent_instr->type != nir_instr_type_phi ||
 165                    use->parent_instr->block != block->successors[0])
 166                   return false;
 167             }
 168          }
 169          break;
 170       }
 171
 172       default:
 173          return false;
 174       }
 175    }
 176
 177    return true;
 178 }
 179
 180 static bool
 181 nir_opt_peephole_select_block(nir_block *block, nir_shader *shader,
 182                               unsigned limit, bool indirect_load_ok,
 183                               bool expensive_alu_ok)
 184 {
 185    if (nir_cf_node_is_first(&block->cf_node))
 186       return false;
 187
 188    nir_cf_node *prev_node = nir_cf_node_prev(&block->cf_node);
 189    if (prev_node->type != nir_cf_node_if)
 190       return false;
 191
 192    nir_if *if_stmt = nir_cf_node_as_if(prev_node);
 193
 194    if (if_stmt->control == nir_selection_control_dont_flatten)
 195       return false;
 196
 197    nir_block *then_block = nir_if_first_then_block(if_stmt);
 198    nir_block *else_block = nir_if_first_else_block(if_stmt);
 199
 200    /* We can only have one block in each side ... */
 201    if (nir_if_last_then_block(if_stmt) != then_block ||
 202        nir_if_last_else_block(if_stmt) != else_block)
 203       return false;
 204
 205    if (if_stmt->control == nir_selection_control_flatten) {
 206       /* Override driver defaults */
 207       indirect_load_ok = true;
 208       expensive_alu_ok = true;
 209    }
 210
 211    /* ... and those blocks must only contain "allowed" instructions. */
 212    unsigned count = 0;
 213    if (!block_check_for_allowed_instrs(then_block, &count, limit != 0,
 214                                        indirect_load_ok, expensive_alu_ok) ||
 215        !block_check_for_allowed_instrs(else_block, &count, limit != 0,
 216                                        indirect_load_ok, expensive_alu_ok))
 217       return false;
 218
 219    if (count > limit && if_stmt->control != nir_selection_control_flatten)
 220       return false;
 221
 222    /* At this point, we know that the previous CFG node is an if-then
 223     * statement containing only moves to phi nodes in this block.  We can
 224     * just remove that entire CF node and replace all of the phi nodes with
 225     * selects.
 226     */
 227
 228    nir_block *prev_block = nir_cf_node_as_block(nir_cf_node_prev(prev_node));
 229
 230    /* First, we move the remaining instructions from the blocks to the
 231     * block before.  We have already guaranteed that this is safe by
 232     * calling block_check_for_allowed_instrs()
 233     */
 234    nir_foreach_instr_safe(instr, then_block) {
 235       exec_node_remove(&instr->node);
 236       instr->block = prev_block;
 237       exec_list_push_tail(&prev_block->instr_list, &instr->node);
 238    }
 239
 240    nir_foreach_instr_safe(instr, else_block) {
 241       exec_node_remove(&instr->node);
 242       instr->block = prev_block;
 243       exec_list_push_tail(&prev_block->instr_list, &instr->node);
 244    }
 245
 246    nir_foreach_instr_safe(instr, block) {
 247       if (instr->type != nir_instr_type_phi)
 248          break;
 249
 250       nir_phi_instr *phi = nir_instr_as_phi(instr);
 251       nir_alu_instr *sel = nir_alu_instr_create(shader, nir_op_bcsel);
 252       nir_src_copy(&sel->src[0].src, &if_stmt->condition, sel);
 253       /* Splat the condition to all channels */
 254       memset(sel->src[0].swizzle, 0, sizeof sel->src[0].swizzle);
 255
 256       assert(exec_list_length(&phi->srcs) == 2);
 257       nir_foreach_phi_src(src, phi) {
 258          assert(src->pred == then_block || src->pred == else_block);
 259          assert(src->src.is_ssa);
 260
 261          unsigned idx = src->pred == then_block ? 1 : 2;
 262          nir_src_copy(&sel->src[idx].src, &src->src, sel);
 263       }
 264
 265       nir_ssa_dest_init(&sel->instr, &sel->dest.dest,
 266                         phi->dest.ssa.num_components,
 267                         phi->dest.ssa.bit_size, phi->dest.ssa.name);
 268       sel->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1;
 269
 270       nir_ssa_def_rewrite_uses(&phi->dest.ssa,
 271                                nir_src_for_ssa(&sel->dest.dest.ssa));
 272
 273       nir_instr_insert_before(&phi->instr, &sel->instr);
 274       nir_instr_remove(&phi->instr);
 275    }
 276
 277    nir_cf_node_remove(&if_stmt->cf_node);
 278    return true;
 279 }
 280
 281 static bool
 282 nir_opt_peephole_select_impl(nir_function_impl *impl, unsigned limit,
 283                              bool indirect_load_ok, bool expensive_alu_ok)
 284 {
 285    nir_shader *shader = impl->function->shader;
 286    bool progress = false;
 287
 288    nir_foreach_block_safe(block, impl) {
 289       progress |= nir_opt_peephole_select_block(block, shader, limit,
 290                                                 indirect_load_ok,
 291                                                 expensive_alu_ok);
 292    }
 293
 294    if (progress) {
 295       nir_metadata_preserve(impl, nir_metadata_none);
 296    } else {
 297 #ifndef NDEBUG
 298       impl->valid_metadata &= ~nir_metadata_not_properly_reset;
 299 #endif
 300    }
 301
 302    return progress;
 303 }
 304
 305 bool
 306 nir_opt_peephole_select(nir_shader *shader, unsigned limit,
 307                         bool indirect_load_ok, bool expensive_alu_ok)
 308 {
 309    bool progress = false;
 310
 311    nir_foreach_function(function, shader) {
 312       if (function->impl)
 313          progress |= nir_opt_peephole_select_impl(function->impl, limit,
 314                                                   indirect_load_ok,
 315                                                   expensive_alu_ok);
 316    }
 317
 318    return progress;
 319 }