radeonsi: remove obsolete TODO comment related to compute-based culling
[mesa.git] / src / compiler / shader_info.h
1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25 #ifndef SHADER_INFO_H
26 #define SHADER_INFO_H
27
28 #include "shader_enums.h"
29 #include <stdint.h>
30
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34
35 struct spirv_supported_capabilities {
36 bool address;
37 bool atomic_storage;
38 bool demote_to_helper_invocation;
39 bool derivative_group;
40 bool descriptor_array_dynamic_indexing;
41 bool descriptor_array_non_uniform_indexing;
42 bool descriptor_indexing;
43 bool device_group;
44 bool draw_parameters;
45 bool float64;
46 bool fragment_shader_sample_interlock;
47 bool fragment_shader_pixel_interlock;
48 bool geometry_streams;
49 bool image_ms_array;
50 bool image_read_without_format;
51 bool image_write_without_format;
52 bool int8;
53 bool int16;
54 bool int64;
55 bool int64_atomics;
56 bool integer_functions2;
57 bool kernel;
58 bool min_lod;
59 bool multiview;
60 bool physical_storage_buffer_address;
61 bool post_depth_coverage;
62 bool runtime_descriptor_array;
63 bool float_controls;
64 bool shader_clock;
65 bool shader_viewport_index_layer;
66 bool stencil_export;
67 bool storage_8bit;
68 bool storage_16bit;
69 bool storage_image_ms;
70 bool subgroup_arithmetic;
71 bool subgroup_ballot;
72 bool subgroup_basic;
73 bool subgroup_quad;
74 bool subgroup_shuffle;
75 bool subgroup_vote;
76 bool tessellation;
77 bool transform_feedback;
78 bool variable_pointers;
79 bool vk_memory_model;
80 bool vk_memory_model_device_scope;
81 bool float16;
82 bool amd_fragment_mask;
83 bool amd_gcn_shader;
84 bool amd_shader_ballot;
85 bool amd_trinary_minmax;
86 bool amd_image_read_write_lod;
87 bool amd_shader_explicit_vertex_parameter;
88 };
89
90 typedef struct shader_info {
91 const char *name;
92
93 /* Descriptive name provided by the client; may be NULL */
94 const char *label;
95
96 /** The shader stage, such as MESA_SHADER_VERTEX. */
97 gl_shader_stage stage:8;
98
99 /** The shader stage in a non SSO linked program that follows this stage,
100 * such as MESA_SHADER_FRAGMENT.
101 */
102 gl_shader_stage next_stage:8;
103
104 /* Number of textures used by this shader */
105 uint8_t num_textures;
106 /* Number of uniform buffers used by this shader */
107 uint8_t num_ubos;
108 /* Number of atomic buffers used by this shader */
109 uint8_t num_abos;
110 /* Number of shader storage buffers (max .driver_location + 1) used by this
111 * shader. In the case of nir_lower_atomics_to_ssbo being used, this will
112 * be the number of actual SSBOs in gl_program->info, and the lowered SSBOs
113 * and atomic counters in nir_shader->info.
114 */
115 uint8_t num_ssbos;
116 /* Number of images used by this shader */
117 uint8_t num_images;
118 /* Index of the last MSAA image. */
119 int8_t last_msaa_image;
120
121 /* Which inputs are actually read */
122 uint64_t inputs_read;
123 /* Which outputs are actually written */
124 uint64_t outputs_written;
125 /* Which outputs are actually read */
126 uint64_t outputs_read;
127 /* Which system values are actually read */
128 uint64_t system_values_read;
129
130 /* Which patch inputs are actually read */
131 uint32_t patch_inputs_read;
132 /* Which patch outputs are actually written */
133 uint32_t patch_outputs_written;
134 /* Which patch outputs are read */
135 uint32_t patch_outputs_read;
136
137 /** Bitfield of which textures are used */
138 uint32_t textures_used;
139
140 /** Bitfield of which textures are used by texelFetch() */
141 uint32_t textures_used_by_txf;
142
143 /** Bitfield of which images are used */
144 uint32_t images_used;
145
146 /* SPV_KHR_float_controls: execution mode for floating point ops */
147 uint16_t float_controls_execution_mode;
148
149 /* The size of the gl_ClipDistance[] array, if declared. */
150 uint8_t clip_distance_array_size:4;
151
152 /* The size of the gl_CullDistance[] array, if declared. */
153 uint8_t cull_distance_array_size:4;
154
155 /* Whether or not this shader ever uses textureGather() */
156 bool uses_texture_gather:1;
157
158 /**
159 * True if this shader uses the fddx/fddy opcodes.
160 *
161 * Note that this does not include the "fine" and "coarse" variants.
162 */
163 bool uses_fddx_fddy:1;
164
165 /**
166 * True if this shader uses 64-bit ALU operations
167 */
168 bool uses_64bit:1;
169
170 /* Whether the first UBO is the default uniform buffer, i.e. uniforms. */
171 bool first_ubo_is_default_ubo:1;
172
173 /* Whether or not separate shader objects were used */
174 bool separate_shader:1;
175
176 /** Was this shader linked with any transform feedback varyings? */
177 bool has_transform_feedback_varyings:1;
178
179 /* Whether flrp has been lowered. */
180 bool flrp_lowered:1;
181
182 /* Whether the shader writes memory, including transform feedback. */
183 bool writes_memory:1;
184
185 union {
186 struct {
187 /* Which inputs are doubles */
188 uint64_t double_inputs;
189
190 /* For AMD-specific driver-internal shaders. It replaces vertex
191 * buffer loads with code generating VS inputs from scalar registers.
192 *
193 * Valid values: SI_VS_BLIT_SGPRS_POS_*
194 */
195 uint8_t blit_sgprs_amd:4;
196
197 /* True if the shader writes position in window space coordinates pre-transform */
198 bool window_space_position:1;
199 } vs;
200
201 struct {
202 /** The output primitive type (GL enum value) */
203 uint16_t output_primitive;
204
205 /** The input primitive type (GL enum value) */
206 uint16_t input_primitive;
207
208 /** The maximum number of vertices the geometry shader might write. */
209 uint16_t vertices_out;
210
211 /** 1 .. MAX_GEOMETRY_SHADER_INVOCATIONS */
212 uint8_t invocations;
213
214 /** The number of vertices recieves per input primitive (max. 6) */
215 uint8_t vertices_in:3;
216
217 /** Whether or not this shader uses EndPrimitive */
218 bool uses_end_primitive:1;
219
220 /** Whether or not this shader uses non-zero streams */
221 bool uses_streams:1;
222 } gs;
223
224 struct {
225 bool uses_discard:1;
226 bool uses_demote:1;
227
228 /**
229 * True if this fragment shader requires helper invocations. This
230 * can be caused by the use of ALU derivative ops, texture
231 * instructions which do implicit derivatives, and the use of quad
232 * subgroup operations.
233 */
234 bool needs_helper_invocations:1;
235
236 /**
237 * Whether any inputs are declared with the "sample" qualifier.
238 */
239 bool uses_sample_qualifier:1;
240
241 /**
242 * Whether early fragment tests are enabled as defined by
243 * ARB_shader_image_load_store.
244 */
245 bool early_fragment_tests:1;
246
247 /**
248 * Defined by INTEL_conservative_rasterization.
249 */
250 bool inner_coverage:1;
251
252 bool post_depth_coverage:1;
253
254 /**
255 * \name ARB_fragment_coord_conventions
256 * @{
257 */
258 bool pixel_center_integer:1;
259 bool origin_upper_left:1;
260 /*@}*/
261
262 bool pixel_interlock_ordered:1;
263 bool pixel_interlock_unordered:1;
264 bool sample_interlock_ordered:1;
265 bool sample_interlock_unordered:1;
266
267 /**
268 * Flags whether NIR's base types on the FS color outputs should be
269 * ignored.
270 *
271 * GLSL requires that fragment shader output base types match the
272 * render target's base types for the behavior to be defined. From
273 * the GL 4.6 spec:
274 *
275 * "If the values written by the fragment shader do not match the
276 * format(s) of the corresponding color buffer(s), the result is
277 * undefined."
278 *
279 * However, for NIR shaders translated from TGSI, we don't have the
280 * output types any more, so the driver will need to do whatever
281 * fixups are necessary to handle effectively untyped data being
282 * output from the FS.
283 */
284 bool untyped_color_outputs:1;
285
286 /** gl_FragDepth layout for ARB_conservative_depth. */
287 enum gl_frag_depth_layout depth_layout:3;
288 } fs;
289
290 struct {
291 uint16_t local_size[3];
292
293 bool local_size_variable:1;
294 uint8_t user_data_components_amd:3;
295
296 /*
297 * Arrangement of invocations used to calculate derivatives in a compute
298 * shader. From NV_compute_shader_derivatives.
299 */
300 enum gl_derivative_group derivative_group:2;
301
302 /**
303 * Size of shared variables accessed by the compute shader.
304 */
305 unsigned shared_size;
306
307 /**
308 * pointer size is:
309 * AddressingModelLogical: 0 (default)
310 * AddressingModelPhysical32: 32
311 * AddressingModelPhysical64: 64
312 */
313 unsigned ptr_size;
314 } cs;
315
316 /* Applies to both TCS and TES. */
317 struct {
318 uint16_t primitive_mode; /* GL_TRIANGLES, GL_QUADS or GL_ISOLINES */
319
320 /** The number of vertices in the TCS output patch. */
321 uint8_t tcs_vertices_out;
322 enum gl_tess_spacing spacing:2;
323
324 /** Is the vertex order counterclockwise? */
325 bool ccw:1;
326 bool point_mode:1;
327 } tess;
328 };
329 } shader_info;
330
331 #ifdef __cplusplus
332 }
333 #endif
334
335 #endif /* SHADER_INFO_H */