src/cpu/SConscript

   1 # -*- mode:python -*-
   2
   3 # Copyright (c) 2006 The Regents of The University of Michigan
   4 # All rights reserved.
   5 #
   6 # Redistribution and use in source and binary forms, with or without
   7 # modification, are permitted provided that the following conditions are
   8 # met: redistributions of source code must retain the above copyright
   9 # notice, this list of conditions and the following disclaimer;
  10 # redistributions in binary form must reproduce the above copyright
  11 # notice, this list of conditions and the following disclaimer in the
  12 # documentation and/or other materials provided with the distribution;
  13 # neither the name of the copyright holders nor the names of its
  14 # contributors may be used to endorse or promote products derived from
  15 # this software without specific prior written permission.
  16 #
  17 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 #
  29 # Authors: Steve Reinhardt
  30
  31 Import('*')
  32
  33 if env['TARGET_ISA'] == 'no':
  34     Return()
  35
  36 #################################################################
  37 #
  38 # Generate StaticInst execute() method signatures.
  39 #
  40 # There must be one signature for each CPU model compiled in.
  41 # Since the set of compiled-in models is flexible, we generate a
  42 # header containing the appropriate set of signatures on the fly.
  43 #
  44 #################################################################
  45
  46 # Template for execute() signature.
  47 exec_sig_template = '''
  48 virtual Fault execute(%(type)s *xc, Trace::InstRecord *traceData) const = 0;
  49 virtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const
  50 { panic("eaComp not defined!"); M5_DUMMY_RETURN };
  51 virtual Fault initiateAcc(%(type)s *xc, Trace::InstRecord *traceData) const
  52 { panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
  53 virtual Fault completeAcc(Packet *pkt, %(type)s *xc,
  54                           Trace::InstRecord *traceData) const
  55 { panic("completeAcc not defined!"); M5_DUMMY_RETURN };
  56 '''
  57
  58 mem_ini_sig_template = '''
  59 virtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const
  60 { panic("eaComp not defined!"); M5_DUMMY_RETURN };
  61 virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
  62 '''
  63
  64 mem_comp_sig_template = '''
  65 virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };
  66 '''
  67
  68 # Generate a temporary CPU list, including the CheckerCPU if
  69 # it's enabled.  This isn't used for anything else other than StaticInst
  70 # headers.
  71 temp_cpu_list = env['CPU_MODELS'][:]
  72
  73 if env['USE_CHECKER']:
  74     temp_cpu_list.append('CheckerCPU')
  75     SimObject('CheckerCPU.py')
  76
  77 # Generate header.
  78 def gen_cpu_exec_signatures(target, source, env):
  79     f = open(str(target[0]), 'w')
  80     print >> f, '''
  81 #ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__
  82 #define __CPU_STATIC_INST_EXEC_SIGS_HH__
  83 '''
  84     for cpu in temp_cpu_list:
  85         xc_type = CpuModel.dict[cpu].strings['CPU_exec_context']
  86         print >> f, exec_sig_template % { 'type' : xc_type }
  87     print >> f, '''
  88 #endif  // __CPU_STATIC_INST_EXEC_SIGS_HH__
  89 '''
  90
  91 # Generate string that gets printed when header is rebuilt
  92 def gen_sigs_string(target, source, env):
  93     return " [GENERATE] static_inst_exec_sigs.hh: " \
  94            + ', '.join(temp_cpu_list)
  95
  96 # Add command to generate header to environment.
  97 env.Command('static_inst_exec_sigs.hh', (),
  98             Action(gen_cpu_exec_signatures, gen_sigs_string,
  99                    varlist = temp_cpu_list))
 100
 101 env.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER']))
 102 env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
 103
 104 # List of suppported CPUs by the Checker.  Errors out if USE_CHECKER=True
 105 # and one of these are not being used.
 106 CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
 107
 108 SimObject('BaseCPU.py')
 109 SimObject('FuncUnit.py')
 110 SimObject('ExeTracer.py')
 111 SimObject('IntelTrace.py')
 112 SimObject('NativeTrace.py')
 113
 114 Source('activity.cc')
 115 Source('base.cc')
 116 Source('cpuevent.cc')
 117 Source('exetrace.cc')
 118 Source('func_unit.cc')
 119 Source('inteltrace.cc')
 120 Source('nativetrace.cc')
 121 Source('pc_event.cc')
 122 Source('quiesce_event.cc')
 123 Source('static_inst.cc')
 124 Source('simple_thread.cc')
 125 Source('thread_context.cc')
 126 Source('thread_state.cc')
 127
 128 if env['FULL_SYSTEM']:
 129     SimObject('IntrControl.py')
 130
 131     Source('intr_control.cc')
 132     Source('profile.cc')
 133
 134     if env['TARGET_ISA'] == 'sparc':
 135         SimObject('LegionTrace.py')
 136         Source('legiontrace.cc')
 137
 138 if env['USE_CHECKER']:
 139     Source('checker/cpu.cc')
 140     TraceFlag('Checker')
 141     checker_supports = False
 142     for i in CheckerSupportedCPUList:
 143         if i in env['CPU_MODELS']:
 144             checker_supports = True
 145     if not checker_supports:
 146         print "Checker only supports CPU models",
 147         for i in CheckerSupportedCPUList:
 148             print i,
 149         print ", please set USE_CHECKER=False or use one of those CPU models"
 150         Exit(1)
 151
 152 TraceFlag('Activity')
 153 TraceFlag('Commit')
 154 TraceFlag('Context')
 155 TraceFlag('Decode')
 156 TraceFlag('DynInst')
 157 TraceFlag('ExecEnable')
 158 TraceFlag('ExecCPSeq')
 159 TraceFlag('ExecEffAddr')
 160 TraceFlag('ExecFaulting', 'Trace faulting instructions')
 161 TraceFlag('ExecFetchSeq')
 162 TraceFlag('ExecOpClass')
 163 TraceFlag('ExecRegDelta')
 164 TraceFlag('ExecResult')
 165 TraceFlag('ExecSpeculative')
 166 TraceFlag('ExecSymbol')
 167 TraceFlag('ExecThread')
 168 TraceFlag('ExecTicks')
 169 TraceFlag('ExecMicro')
 170 TraceFlag('ExecMacro')
 171 TraceFlag('Fetch')
 172 TraceFlag('IntrControl')
 173 TraceFlag('PCEvent')
 174 TraceFlag('Quiesce')
 175
 176 CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
 177     'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecFaulting' ])
 178 CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
 179     'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecFaulting' ])