2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Steve Reinhardt
36 #include "base/cprintf.hh"
37 #include "base/loader/symtab.hh"
38 #include "base/misc.hh"
39 #include "base/output.hh"
40 #include "cpu/base.hh"
41 #include "cpu/cpuevent.hh"
42 #include "cpu/thread_context.hh"
43 #include "cpu/profile.hh"
44 #include "sim/param.hh"
45 #include "sim/process.hh"
46 #include "sim/sim_events.hh"
47 #include "sim/system.hh"
49 #include "base/trace.hh"
53 vector
<BaseCPU
*> BaseCPU::cpuList
;
55 // This variable reflects the max number of threads in any CPU. Be
56 // careful to only use it once all the CPUs that you care about have
58 int maxThreadsPerCPU
= 1;
61 BaseCPU::BaseCPU(Params
*p
)
62 : MemObject(p
->name
), clock(p
->clock
), checkInterrupts(true),
63 params(p
), number_of_threads(p
->numberOfThreads
), system(p
->system
)
65 BaseCPU::BaseCPU(Params
*p
)
66 : MemObject(p
->name
), clock(p
->clock
), params(p
),
67 number_of_threads(p
->numberOfThreads
), system(p
->system
)
70 DPRINTF(FullCPU
, "BaseCPU: Creating object, mem address %#x.\n", this);
72 // add self to global list of CPUs
73 cpuList
.push_back(this);
75 DPRINTF(FullCPU
, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
78 if (number_of_threads
> maxThreadsPerCPU
)
79 maxThreadsPerCPU
= number_of_threads
;
81 // allocate per-thread instruction-based event queues
82 comInstEventQueue
= new EventQueue
*[number_of_threads
];
83 for (int i
= 0; i
< number_of_threads
; ++i
)
84 comInstEventQueue
[i
] = new EventQueue("instruction-based event queue");
87 // set up instruction-count-based termination events, if any
89 if (p
->max_insts_any_thread
!= 0)
90 for (int i
= 0; i
< number_of_threads
; ++i
)
91 new SimLoopExitEvent(comInstEventQueue
[i
], p
->max_insts_any_thread
,
92 "a thread reached the max instruction count");
94 if (p
->max_insts_all_threads
!= 0) {
95 // allocate & initialize shared downcounter: each event will
96 // decrement this when triggered; simulation will terminate
97 // when counter reaches 0
98 int *counter
= new int;
99 *counter
= number_of_threads
;
100 for (int i
= 0; i
< number_of_threads
; ++i
)
101 new CountedExitEvent(comInstEventQueue
[i
],
102 "all threads reached the max instruction count",
103 p
->max_insts_all_threads
, *counter
);
106 // allocate per-thread load-based event queues
107 comLoadEventQueue
= new EventQueue
*[number_of_threads
];
108 for (int i
= 0; i
< number_of_threads
; ++i
)
109 comLoadEventQueue
[i
] = new EventQueue("load-based event queue");
112 // set up instruction-count-based termination events, if any
114 if (p
->max_loads_any_thread
!= 0)
115 for (int i
= 0; i
< number_of_threads
; ++i
)
116 new SimLoopExitEvent(comLoadEventQueue
[i
], p
->max_loads_any_thread
,
117 "a thread reached the max load count");
119 if (p
->max_loads_all_threads
!= 0) {
120 // allocate & initialize shared downcounter: each event will
121 // decrement this when triggered; simulation will terminate
122 // when counter reaches 0
123 int *counter
= new int;
124 *counter
= number_of_threads
;
125 for (int i
= 0; i
< number_of_threads
; ++i
)
126 new CountedExitEvent(comLoadEventQueue
[i
],
127 "all threads reached the max load count",
128 p
->max_loads_all_threads
, *counter
);
132 memset(interrupts
, 0, sizeof(interrupts
));
136 functionTracingEnabled
= false;
137 if (p
->functionTrace
) {
138 functionTraceStream
= simout
.find(csprintf("ftrace.%s", name()));
139 currentFunctionStart
= currentFunctionEnd
= 0;
140 functionEntryTick
= p
->functionTraceStart
;
142 if (p
->functionTraceStart
== 0) {
143 functionTracingEnabled
= true;
146 new EventWrapper
<BaseCPU
, &BaseCPU::enableFunctionTrace
>(this,
148 e
->schedule(p
->functionTraceStart
);
154 profileEvent
= new ProfileEvent(this, params
->profile
);
159 BaseCPU::Params::Params()
168 BaseCPU::enableFunctionTrace()
170 functionTracingEnabled
= true;
180 if (!params
->deferRegistration
)
181 registerThreadContexts();
188 if (!params
->deferRegistration
&& profileEvent
)
189 profileEvent
->schedule(curTick
);
197 using namespace Stats
;
200 .name(name() + ".numCycles")
201 .desc("number of cpu cycles simulated")
204 int size
= threadContexts
.size();
206 for (int i
= 0; i
< size
; ++i
) {
207 stringstream namestr
;
208 ccprintf(namestr
, "%s.ctx%d", name(), i
);
209 threadContexts
[i
]->regStats(namestr
.str());
211 } else if (size
== 1)
212 threadContexts
[0]->regStats(name());
220 BaseCPU::registerThreadContexts()
222 for (int i
= 0; i
< threadContexts
.size(); ++i
) {
223 ThreadContext
*tc
= threadContexts
[i
];
226 int id
= params
->cpu_id
;
230 tc
->setCpuId(system
->registerThreadContext(tc
, id
));
232 tc
->setCpuId(tc
->getProcessPtr()->registerThreadContext(tc
));
241 panic("This CPU doesn't support sampling!");
245 BaseCPU::takeOverFrom(BaseCPU
*oldCPU
)
247 assert(threadContexts
.size() == oldCPU
->threadContexts
.size());
249 for (int i
= 0; i
< threadContexts
.size(); ++i
) {
250 ThreadContext
*newTC
= threadContexts
[i
];
251 ThreadContext
*oldTC
= oldCPU
->threadContexts
[i
];
253 newTC
->takeOverFrom(oldTC
);
255 CpuEvent::replaceThreadContext(oldTC
, newTC
);
257 assert(newTC
->readCpuId() == oldTC
->readCpuId());
259 system
->replaceThreadContext(newTC
, newTC
->readCpuId());
261 assert(newTC
->getProcessPtr() == oldTC
->getProcessPtr());
262 newTC
->getProcessPtr()->replaceThreadContext(newTC
, newTC
->readCpuId());
267 for (int i
= 0; i
< TheISA::NumInterruptLevels
; ++i
)
268 interrupts
[i
] = oldCPU
->interrupts
[i
];
269 intstatus
= oldCPU
->intstatus
;
271 for (int i
= 0; i
< threadContexts
.size(); ++i
)
272 threadContexts
[i
]->profileClear();
275 profileEvent
->schedule(curTick
);
281 BaseCPU::ProfileEvent::ProfileEvent(BaseCPU
*_cpu
, int _interval
)
282 : Event(&mainEventQueue
), cpu(_cpu
), interval(_interval
)
286 BaseCPU::ProfileEvent::process()
288 for (int i
= 0, size
= cpu
->threadContexts
.size(); i
< size
; ++i
) {
289 ThreadContext
*tc
= cpu
->threadContexts
[i
];
293 schedule(curTick
+ interval
);
297 BaseCPU::post_interrupt(int int_num
, int index
)
299 DPRINTF(Interrupt
, "Interrupt %d:%d posted\n", int_num
, index
);
301 if (int_num
< 0 || int_num
>= TheISA::NumInterruptLevels
)
302 panic("int_num out of bounds\n");
304 if (index
< 0 || index
>= sizeof(uint64_t) * 8)
305 panic("int_num out of bounds\n");
307 checkInterrupts
= true;
308 interrupts
[int_num
] |= 1 << index
;
309 intstatus
|= (ULL(1) << int_num
);
313 BaseCPU::clear_interrupt(int int_num
, int index
)
315 DPRINTF(Interrupt
, "Interrupt %d:%d cleared\n", int_num
, index
);
317 if (int_num
< 0 || int_num
>= TheISA::NumInterruptLevels
)
318 panic("int_num out of bounds\n");
320 if (index
< 0 || index
>= sizeof(uint64_t) * 8)
321 panic("int_num out of bounds\n");
323 interrupts
[int_num
] &= ~(1 << index
);
324 if (interrupts
[int_num
] == 0)
325 intstatus
&= ~(ULL(1) << int_num
);
329 BaseCPU::clear_interrupts()
331 DPRINTF(Interrupt
, "Interrupts all cleared\n");
333 memset(interrupts
, 0, sizeof(interrupts
));
339 BaseCPU::serialize(std::ostream
&os
)
341 SERIALIZE_ARRAY(interrupts
, TheISA::NumInterruptLevels
);
342 SERIALIZE_SCALAR(intstatus
);
346 BaseCPU::unserialize(Checkpoint
*cp
, const std::string
§ion
)
348 UNSERIALIZE_ARRAY(interrupts
, TheISA::NumInterruptLevels
);
349 UNSERIALIZE_SCALAR(intstatus
);
352 #endif // FULL_SYSTEM
355 BaseCPU::traceFunctionsInternal(Addr pc
)
357 if (!debugSymbolTable
)
360 // if pc enters different function, print new function symbol and
361 // update saved range. Otherwise do nothing.
362 if (pc
< currentFunctionStart
|| pc
>= currentFunctionEnd
) {
364 bool found
= debugSymbolTable
->findNearestSymbol(pc
, sym_str
,
365 currentFunctionStart
,
369 // no symbol found: use addr as label
370 sym_str
= csprintf("0x%x", pc
);
371 currentFunctionStart
= pc
;
372 currentFunctionEnd
= pc
+ 1;
375 ccprintf(*functionTraceStream
, " (%d)\n%d: %s",
376 curTick
- functionEntryTick
, curTick
, sym_str
);
377 functionEntryTick
= curTick
;
382 DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU
)