2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Steve Reinhardt
36 #include "base/cprintf.hh"
37 #include "base/loader/symtab.hh"
38 #include "base/misc.hh"
39 #include "base/output.hh"
40 #include "cpu/base.hh"
41 #include "cpu/cpuevent.hh"
42 #include "cpu/thread_context.hh"
43 #include "cpu/profile.hh"
44 #include "sim/sim_exit.hh"
45 #include "sim/param.hh"
46 #include "sim/process.hh"
47 #include "sim/sim_events.hh"
48 #include "sim/system.hh"
50 #include "base/trace.hh"
53 #include "sim/stat_control.hh"
57 vector
<BaseCPU
*> BaseCPU::cpuList
;
59 // This variable reflects the max number of threads in any CPU. Be
60 // careful to only use it once all the CPUs that you care about have
62 int maxThreadsPerCPU
= 1;
64 CPUProgressEvent::CPUProgressEvent(EventQueue
*q
, Tick ival
,
66 : Event(q
, Event::Stat_Event_Pri
), interval(ival
),
67 lastNumInst(0), cpu(_cpu
)
70 schedule(curTick
+ interval
);
74 CPUProgressEvent::process()
76 Counter temp
= cpu
->totalInstructions();
78 double ipc
= double(temp
- lastNumInst
) / (interval
/ cpu
->cycles(1));
80 DPRINTFN("%s progress event, instructions committed: %lli, IPC: %0.8d\n",
81 cpu
->name(), temp
- lastNumInst
, ipc
);
84 cprintf("%lli: %s progress event, instructions committed: %lli\n",
85 curTick
, cpu
->name(), temp
- lastNumInst
);
88 schedule(curTick
+ interval
);
92 CPUProgressEvent::description()
94 return "CPU Progress event";
98 BaseCPU::BaseCPU(Params
*p
)
99 : MemObject(p
->name
), clock(p
->clock
), checkInterrupts(true),
100 params(p
), number_of_threads(p
->numberOfThreads
), system(p
->system
),
103 BaseCPU::BaseCPU(Params
*p
)
104 : MemObject(p
->name
), clock(p
->clock
), params(p
),
105 number_of_threads(p
->numberOfThreads
), system(p
->system
),
109 // currentTick = curTick;
110 DPRINTF(FullCPU
, "BaseCPU: Creating object, mem address %#x.\n", this);
112 // add self to global list of CPUs
113 cpuList
.push_back(this);
115 DPRINTF(FullCPU
, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
118 if (number_of_threads
> maxThreadsPerCPU
)
119 maxThreadsPerCPU
= number_of_threads
;
121 // allocate per-thread instruction-based event queues
122 comInstEventQueue
= new EventQueue
*[number_of_threads
];
123 for (int i
= 0; i
< number_of_threads
; ++i
)
124 comInstEventQueue
[i
] = new EventQueue("instruction-based event queue");
127 // set up instruction-count-based termination events, if any
129 if (p
->max_insts_any_thread
!= 0)
130 for (int i
= 0; i
< number_of_threads
; ++i
)
131 schedExitSimLoop("a thread reached the max instruction count",
132 p
->max_insts_any_thread
, 0,
133 comInstEventQueue
[i
]);
135 if (p
->max_insts_all_threads
!= 0) {
136 // allocate & initialize shared downcounter: each event will
137 // decrement this when triggered; simulation will terminate
138 // when counter reaches 0
139 int *counter
= new int;
140 *counter
= number_of_threads
;
141 for (int i
= 0; i
< number_of_threads
; ++i
)
142 new CountedExitEvent(comInstEventQueue
[i
],
143 "all threads reached the max instruction count",
144 p
->max_insts_all_threads
, *counter
);
147 // allocate per-thread load-based event queues
148 comLoadEventQueue
= new EventQueue
*[number_of_threads
];
149 for (int i
= 0; i
< number_of_threads
; ++i
)
150 comLoadEventQueue
[i
] = new EventQueue("load-based event queue");
153 // set up instruction-count-based termination events, if any
155 if (p
->max_loads_any_thread
!= 0)
156 for (int i
= 0; i
< number_of_threads
; ++i
)
157 schedExitSimLoop("a thread reached the max load count",
158 p
->max_loads_any_thread
, 0,
159 comLoadEventQueue
[i
]);
161 if (p
->max_loads_all_threads
!= 0) {
162 // allocate & initialize shared downcounter: each event will
163 // decrement this when triggered; simulation will terminate
164 // when counter reaches 0
165 int *counter
= new int;
166 *counter
= number_of_threads
;
167 for (int i
= 0; i
< number_of_threads
; ++i
)
168 new CountedExitEvent(comLoadEventQueue
[i
],
169 "all threads reached the max load count",
170 p
->max_loads_all_threads
, *counter
);
173 functionTracingEnabled
= false;
174 if (p
->functionTrace
) {
175 functionTraceStream
= simout
.find(csprintf("ftrace.%s", name()));
176 currentFunctionStart
= currentFunctionEnd
= 0;
177 functionEntryTick
= p
->functionTraceStart
;
179 if (p
->functionTraceStart
== 0) {
180 functionTracingEnabled
= true;
183 new EventWrapper
<BaseCPU
, &BaseCPU::enableFunctionTrace
>(this,
185 e
->schedule(p
->functionTraceStart
);
191 profileEvent
= new ProfileEvent(this, params
->profile
);
195 BaseCPU::Params::Params()
204 BaseCPU::enableFunctionTrace()
206 functionTracingEnabled
= true;
216 if (!params
->deferRegistration
)
217 registerThreadContexts();
224 if (!params
->deferRegistration
&& profileEvent
)
225 profileEvent
->schedule(curTick
);
228 if (params
->progress_interval
) {
229 new CPUProgressEvent(&mainEventQueue
, params
->progress_interval
,
238 using namespace Stats
;
241 .name(name() + ".numCycles")
242 .desc("number of cpu cycles simulated")
245 int size
= threadContexts
.size();
247 for (int i
= 0; i
< size
; ++i
) {
248 stringstream namestr
;
249 ccprintf(namestr
, "%s.ctx%d", name(), i
);
250 threadContexts
[i
]->regStats(namestr
.str());
252 } else if (size
== 1)
253 threadContexts
[0]->regStats(name());
262 Tick next_tick
= curTick
- phase
+ clock
- 1;
263 next_tick
-= (next_tick
% clock
);
269 BaseCPU::nextCycle(Tick begin_tick
)
271 Tick next_tick
= begin_tick
;
272 next_tick
-= (next_tick
% clock
);
275 while (next_tick
< curTick
)
278 assert(next_tick
>= curTick
);
283 BaseCPU::registerThreadContexts()
285 for (int i
= 0; i
< threadContexts
.size(); ++i
) {
286 ThreadContext
*tc
= threadContexts
[i
];
289 int id
= params
->cpu_id
;
293 tc
->setCpuId(system
->registerThreadContext(tc
, id
));
295 tc
->setCpuId(tc
->getProcessPtr()->registerThreadContext(tc
));
304 // panic("This CPU doesn't support sampling!");
306 if (profileEvent
&& profileEvent
->scheduled())
307 profileEvent
->deschedule();
312 BaseCPU::takeOverFrom(BaseCPU
*oldCPU
)
314 assert(threadContexts
.size() == oldCPU
->threadContexts
.size());
316 for (int i
= 0; i
< threadContexts
.size(); ++i
) {
317 ThreadContext
*newTC
= threadContexts
[i
];
318 ThreadContext
*oldTC
= oldCPU
->threadContexts
[i
];
320 newTC
->takeOverFrom(oldTC
);
322 CpuEvent::replaceThreadContext(oldTC
, newTC
);
324 assert(newTC
->readCpuId() == oldTC
->readCpuId());
326 system
->replaceThreadContext(newTC
, newTC
->readCpuId());
328 assert(newTC
->getProcessPtr() == oldTC
->getProcessPtr());
329 newTC
->getProcessPtr()->replaceThreadContext(newTC
, newTC
->readCpuId());
332 // TheISA::compareXCs(oldXC, newXC);
336 interrupts
= oldCPU
->interrupts
;
337 checkInterrupts
= oldCPU
->checkInterrupts
;
339 for (int i
= 0; i
< threadContexts
.size(); ++i
)
340 threadContexts
[i
]->profileClear();
342 // The Sampler must take care of this!
344 // profileEvent->schedule(curTick);
350 BaseCPU::ProfileEvent::ProfileEvent(BaseCPU
*_cpu
, int _interval
)
351 : Event(&mainEventQueue
), cpu(_cpu
), interval(_interval
)
355 BaseCPU::ProfileEvent::process()
357 for (int i
= 0, size
= cpu
->threadContexts
.size(); i
< size
; ++i
) {
358 ThreadContext
*tc
= cpu
->threadContexts
[i
];
362 schedule(curTick
+ interval
);
366 BaseCPU::post_interrupt(int int_num
, int index
)
368 checkInterrupts
= true;
369 interrupts
.post(int_num
, index
);
373 BaseCPU::clear_interrupt(int int_num
, int index
)
375 interrupts
.clear(int_num
, index
);
379 BaseCPU::clear_interrupts()
381 interrupts
.clear_all();
386 BaseCPU::serialize(std::ostream
&os
)
388 interrupts
.serialize(os
);
392 BaseCPU::unserialize(Checkpoint
*cp
, const std::string
§ion
)
394 interrupts
.unserialize(cp
, section
);
397 #endif // FULL_SYSTEM
400 BaseCPU::traceFunctionsInternal(Addr pc
)
402 if (!debugSymbolTable
)
405 // if pc enters different function, print new function symbol and
406 // update saved range. Otherwise do nothing.
407 if (pc
< currentFunctionStart
|| pc
>= currentFunctionEnd
) {
409 bool found
= debugSymbolTable
->findNearestSymbol(pc
, sym_str
,
410 currentFunctionStart
,
414 // no symbol found: use addr as label
415 sym_str
= csprintf("0x%x", pc
);
416 currentFunctionStart
= pc
;
417 currentFunctionEnd
= pc
+ 1;
420 ccprintf(*functionTraceStream
, " (%d)\n%d: %s",
421 curTick
- functionEntryTick
, curTick
, sym_str
);
422 functionEntryTick
= curTick
;
427 DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU
)