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36 #include "base/cprintf.hh"
37 #include "base/trace.hh"
38 #include "config/the_isa.hh"
39 #include "cpu/base_dyn_inst.hh"
40 #include "cpu/exetrace.hh"
41 #include "mem/request.hh"
42 #include "sim/faults.hh"
47 #include "base/hashmap.hh"
49 unsigned int MyHashFunc(const BaseDynInst *addr)
51 unsigned a = (unsigned)addr;
52 unsigned hash = (((a >> 14) ^ ((a >> 2) & 0xffff))) & 0x7FFFFFFF;
57 typedef m5::hash_map<const BaseDynInst *, const BaseDynInst *, MyHashFunc>
64 BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst,
65 TheISA::PCState _pc, TheISA::PCState _predPC,
66 InstSeqNum seq_num, ImplCPU *cpu)
67 : staticInst(_staticInst), traceData(NULL), cpu(cpu)
79 BaseDynInst<Impl>::BaseDynInst(TheISA::ExtMachInst inst,
80 TheISA::PCState _pc, TheISA::PCState _predPC,
81 InstSeqNum seq_num, ImplCPU *cpu)
82 : staticInst(inst, _pc.instAddr()), traceData(NULL), cpu(cpu)
94 BaseDynInst<Impl>::BaseDynInst(StaticInstPtr &_staticInst)
95 : staticInst(_staticInst), traceData(NULL)
101 template <class Impl>
103 BaseDynInst<Impl>::initVars()
107 effAddrValid = false;
110 isUncacheable = false;
114 instResult.integer = 0;
126 // Eventually make this a parameter.
129 // Also make this a parameter, or perhaps get it from xc or cpu.
132 // Initialize the fault to be NoFault.
138 if (cpu->instcount > 1500) {
143 assert(cpu->instcount <= 1500);
147 "DynInst: [sn:%lli] Instruction created. Instcount for %s = %i\n",
148 seqNum, cpu->name(), cpu->instcount);
152 cpu->snList.insert(seqNum);
156 template <class Impl>
157 BaseDynInst<Impl>::~BaseDynInst()
173 "DynInst: [sn:%lli] Instruction destroyed. Instcount for %s = %i\n",
174 seqNum, cpu->name(), cpu->instcount);
177 cpu->snList.erase(seqNum);
182 template <class Impl>
184 BaseDynInst<Impl>::dumpSNList()
186 std::set<InstSeqNum>::iterator sn_it = cpu->snList.begin();
189 while (sn_it != cpu->snList.end()) {
190 cprintf("%i: [sn:%lli] not destroyed\n", count, (*sn_it));
197 template <class Impl>
199 BaseDynInst<Impl>::dump()
201 cprintf("T%d : %#08d `", threadNumber, pc.instAddr());
202 std::cout << staticInst->disassemble(pc.instAddr());
206 template <class Impl>
208 BaseDynInst<Impl>::dump(std::string &outstring)
210 std::ostringstream s;
211 s << "T" << threadNumber << " : 0x" << pc.instAddr() << " "
212 << staticInst->disassemble(pc.instAddr());
217 template <class Impl>
219 BaseDynInst<Impl>::markSrcRegReady()
221 DPRINTF(IQ, "[sn:%lli] has %d ready out of %d sources. RTI %d)\n",
222 seqNum, readyRegs+1, numSrcRegs(), readyToIssue());
223 if (++readyRegs == numSrcRegs()) {
228 template <class Impl>
230 BaseDynInst<Impl>::markSrcRegReady(RegIndex src_idx)
232 _readySrcRegIdx[src_idx] = true;
237 template <class Impl>
239 BaseDynInst<Impl>::eaSrcsReady()
241 // For now I am assuming that src registers 1..n-1 are the ones that the
242 // EA calc depends on. (i.e. src reg 0 is the source of the data to be
245 for (int i = 1; i < numSrcRegs(); ++i) {
246 if (!_readySrcRegIdx[i])