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43 #ifndef __CPU_BASE_DYN_INST_IMPL_HH__
44 #define __CPU_BASE_DYN_INST_IMPL_HH__
51 #include "base/cprintf.hh"
52 #include "base/trace.hh"
53 #include "config/the_isa.hh"
54 #include "cpu/base_dyn_inst.hh"
55 #include "cpu/exetrace.hh"
56 #include "debug/DynInst.hh"
57 #include "debug/IQ.hh"
58 #include "mem/request.hh"
59 #include "sim/faults.hh"
62 BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst,
63 StaticInstPtr _macroop,
64 TheISA::PCState _pc, TheISA::PCState _predPC,
65 InstSeqNum seq_num, ImplCPU *cpu)
66 : staticInst(_staticInst), cpu(cpu), traceData(NULL), macroop(_macroop)
77 BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst,
78 StaticInstPtr _macroop)
79 : staticInst(_staticInst), traceData(NULL), macroop(_macroop)
87 BaseDynInst<Impl>::initVars()
98 instFlags[RecordResult] = true;
99 instFlags[Predicate] = true;
104 // Eventually make this a parameter.
107 // Also make this a parameter, or perhaps get it from xc or cpu.
110 // Initialize the fault to be NoFault.
116 if (cpu->instcount > 1500) {
121 assert(cpu->instcount <= 1500);
125 "DynInst: [sn:%lli] Instruction created. Instcount for %s = %i\n",
126 seqNum, cpu->name(), cpu->instcount);
130 cpu->snList.insert(seqNum);
136 template <class Impl>
137 BaseDynInst<Impl>::~BaseDynInst()
153 "DynInst: [sn:%lli] Instruction destroyed. Instcount for %s = %i\n",
154 seqNum, cpu->name(), cpu->instcount);
157 cpu->snList.erase(seqNum);
165 template <class Impl>
167 BaseDynInst<Impl>::dumpSNList()
169 std::set<InstSeqNum>::iterator sn_it = cpu->snList.begin();
172 while (sn_it != cpu->snList.end()) {
173 cprintf("%i: [sn:%lli] not destroyed\n", count, (*sn_it));
180 template <class Impl>
182 BaseDynInst<Impl>::dump()
184 cprintf("T%d : %#08d `", threadNumber, pc.instAddr());
185 std::cout << staticInst->disassemble(pc.instAddr());
189 template <class Impl>
191 BaseDynInst<Impl>::dump(std::string &outstring)
193 std::ostringstream s;
194 s << "T" << threadNumber << " : 0x" << pc.instAddr() << " "
195 << staticInst->disassemble(pc.instAddr());
200 template <class Impl>
202 BaseDynInst<Impl>::markSrcRegReady()
204 DPRINTF(IQ, "[sn:%lli] has %d ready out of %d sources. RTI %d)\n",
205 seqNum, readyRegs+1, numSrcRegs(), readyToIssue());
206 if (++readyRegs == numSrcRegs()) {
211 template <class Impl>
213 BaseDynInst<Impl>::markSrcRegReady(RegIndex src_idx)
215 _readySrcRegIdx[src_idx] = true;
220 template <class Impl>
222 BaseDynInst<Impl>::eaSrcsReady()
224 // For now I am assuming that src registers 1..n-1 are the ones that the
225 // EA calc depends on. (i.e. src reg 0 is the source of the data to be
228 for (int i = 1; i < numSrcRegs(); ++i) {
229 if (!_readySrcRegIdx[i])
236 #endif//__CPU_BASE_DYN_INST_IMPL_HH__