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43 #ifndef __CPU_BASE_DYN_INST_IMPL_HH__
44 #define __CPU_BASE_DYN_INST_IMPL_HH__
51 #include "base/cprintf.hh"
52 #include "base/trace.hh"
53 #include "config/the_isa.hh"
54 #include "cpu/base_dyn_inst.hh"
55 #include "cpu/exetrace.hh"
56 #include "debug/DynInst.hh"
57 #include "debug/IQ.hh"
58 #include "mem/request.hh"
59 #include "sim/faults.hh"
62 BaseDynInst<Impl>::BaseDynInst(const StaticInstPtr &_staticInst,
63 const StaticInstPtr &_macroop,
64 TheISA::PCState _pc, TheISA::PCState _predPC,
65 InstSeqNum seq_num, ImplCPU *cpu)
66 : staticInst(_staticInst), cpu(cpu), traceData(NULL), macroop(_macroop)
77 BaseDynInst<Impl>::BaseDynInst(const StaticInstPtr &_staticInst,
78 const StaticInstPtr &_macroop)
79 : staticInst(_staticInst), traceData(NULL), macroop(_macroop)
87 BaseDynInst<Impl>::initVars()
99 instFlags[RecordResult] = true;
100 instFlags[Predicate] = true;
105 // Eventually make this a parameter.
108 // Also make this a parameter, or perhaps get it from xc or cpu.
111 // Initialize the fault to be NoFault.
117 if (cpu->instcount > 1500) {
122 assert(cpu->instcount <= 1500);
126 "DynInst: [sn:%lli] Instruction created. Instcount for %s = %i\n",
127 seqNum, cpu->name(), cpu->instcount);
131 cpu->snList.insert(seqNum);
137 template <class Impl>
138 BaseDynInst<Impl>::~BaseDynInst()
154 "DynInst: [sn:%lli] Instruction destroyed. Instcount for %s = %i\n",
155 seqNum, cpu->name(), cpu->instcount);
158 cpu->snList.erase(seqNum);
166 template <class Impl>
168 BaseDynInst<Impl>::dumpSNList()
170 std::set<InstSeqNum>::iterator sn_it = cpu->snList.begin();
173 while (sn_it != cpu->snList.end()) {
174 cprintf("%i: [sn:%lli] not destroyed\n", count, (*sn_it));
181 template <class Impl>
183 BaseDynInst<Impl>::dump()
185 cprintf("T%d : %#08d `", threadNumber, pc.instAddr());
186 std::cout << staticInst->disassemble(pc.instAddr());
190 template <class Impl>
192 BaseDynInst<Impl>::dump(std::string &outstring)
194 std::ostringstream s;
195 s << "T" << threadNumber << " : 0x" << pc.instAddr() << " "
196 << staticInst->disassemble(pc.instAddr());
201 template <class Impl>
203 BaseDynInst<Impl>::markSrcRegReady()
205 DPRINTF(IQ, "[sn:%lli] has %d ready out of %d sources. RTI %d)\n",
206 seqNum, readyRegs+1, numSrcRegs(), readyToIssue());
207 if (++readyRegs == numSrcRegs()) {
212 template <class Impl>
214 BaseDynInst<Impl>::markSrcRegReady(RegIndex src_idx)
216 _readySrcRegIdx[src_idx] = true;
221 template <class Impl>
223 BaseDynInst<Impl>::eaSrcsReady()
225 // For now I am assuming that src registers 1..n-1 are the ones that the
226 // EA calc depends on. (i.e. src reg 0 is the source of the data to be
229 for (int i = 1; i < numSrcRegs(); ++i) {
230 if (!_readySrcRegIdx[i])
237 #endif//__CPU_BASE_DYN_INST_IMPL_HH__