2 * Copyright (c) 2006 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include "cpu/base.hh"
35 #include "cpu/checker/cpu.hh"
36 #include "cpu/simple_thread.hh"
37 #include "cpu/thread_context.hh"
38 #include "cpu/static_inst.hh"
39 #include "mem/packet_impl.hh"
40 #include "sim/byteswap.hh"
43 #include "arch/vtophys.hh"
44 #include "kern/kernel_stats.hh"
48 //The CheckerCPU does alpha only
49 using namespace AlphaISA
;
56 CheckerCPU::CheckerCPU(Params
*p
)
57 : BaseCPU(p
), thread(NULL
), tc(NULL
)
67 changedPC
= willChangePC
= changedNextPC
= false;
69 exitOnError
= p
->exitOnError
;
70 warnOnlyOnLoadError
= p
->warnOnlyOnLoadError
;
82 CheckerCPU::~CheckerCPU()
87 CheckerCPU::setMemory(MemObject
*mem
)
91 thread
= new SimpleThread(this, /* thread_num */ 0, process
,
94 thread
->setStatus(ThreadContext::Suspended
);
96 threadContexts
.push_back(tc
);
101 CheckerCPU::setSystem(System
*system
)
106 thread
= new SimpleThread(this, 0, systemPtr
, itb
, dtb
, false);
108 thread
->setStatus(ThreadContext::Suspended
);
109 tc
= thread
->getTC();
110 threadContexts
.push_back(tc
);
111 delete thread
->kernelStats
;
112 thread
->kernelStats
= NULL
;
117 CheckerCPU::setIcachePort(Port
*icache_port
)
119 icachePort
= icache_port
;
123 CheckerCPU::setDcachePort(Port
*dcache_port
)
125 dcachePort
= dcache_port
;
129 CheckerCPU::serialize(ostream
&os
)
132 BaseCPU::serialize(os);
133 SERIALIZE_SCALAR(inst);
134 nameOut(os, csprintf("%s.xc", name()));
135 thread->serialize(os);
136 cacheCompletionEvent.serialize(os);
141 CheckerCPU::unserialize(Checkpoint
*cp
, const string
§ion
)
144 BaseCPU::unserialize(cp, section);
145 UNSERIALIZE_SCALAR(inst);
146 thread->unserialize(cp, csprintf("%s.xc", section));
151 CheckerCPU::copySrcTranslate(Addr src
)
153 panic("Unimplemented!");
157 CheckerCPU::copy(Addr dest
)
159 panic("Unimplemented!");
164 CheckerCPU::read(Addr addr
, T
&data
, unsigned flags
)
166 // need to fill in CPU & thread IDs here
167 memReq
= new Request();
169 memReq
->setVirt(0, addr
, sizeof(T
), flags
, thread
->readPC());
171 // translate to physical address
172 translateDataReadReq(memReq
);
174 Packet
*pkt
= new Packet(memReq
, Packet::ReadReq
, Packet::Broadcast
);
176 pkt
->dataStatic(&data
);
178 if (!(memReq
->isUncacheable())) {
179 // Access memory to see if we have the same data
180 dcachePort
->sendFunctional(pkt
);
182 // Assume the data is correct if it's an uncached access
183 memcpy(&data
, &unverifiedResult
.integer
, sizeof(T
));
191 #ifndef DOXYGEN_SHOULD_SKIP_THIS
195 CheckerCPU::read(Addr addr
, uint64_t &data
, unsigned flags
);
199 CheckerCPU::read(Addr addr
, uint32_t &data
, unsigned flags
);
203 CheckerCPU::read(Addr addr
, uint16_t &data
, unsigned flags
);
207 CheckerCPU::read(Addr addr
, uint8_t &data
, unsigned flags
);
209 #endif //DOXYGEN_SHOULD_SKIP_THIS
213 CheckerCPU::read(Addr addr
, double &data
, unsigned flags
)
215 return read(addr
, *(uint64_t*)&data
, flags
);
220 CheckerCPU::read(Addr addr
, float &data
, unsigned flags
)
222 return read(addr
, *(uint32_t*)&data
, flags
);
227 CheckerCPU::read(Addr addr
, int32_t &data
, unsigned flags
)
229 return read(addr
, (uint32_t&)data
, flags
);
234 CheckerCPU::write(T data
, Addr addr
, unsigned flags
, uint64_t *res
)
236 // need to fill in CPU & thread IDs here
237 memReq
= new Request();
239 memReq
->setVirt(0, addr
, sizeof(T
), flags
, thread
->readPC());
241 // translate to physical address
242 thread
->translateDataWriteReq(memReq
);
244 // Can compare the write data and result only if it's cacheable,
245 // not a store conditional, or is a store conditional that
247 // @todo: Verify that actual memory matches up with these values.
248 // Right now it only verifies that the instruction data is the
249 // same as what was in the request that got sent to memory; there
250 // is no verification that it is the same as what is in memory.
251 // This is because the LSQ would have to be snooped in the CPU to
254 !(unverifiedReq
->isUncacheable()) &&
255 (!(unverifiedReq
->isLocked()) ||
256 ((unverifiedReq
->isLocked()) &&
257 unverifiedReq
->getScResult() == 1))) {
260 // This code would work if the LSQ allowed for snooping.
261 Packet *pkt = new Packet(memReq, Packet::ReadReq, Packet::Broadcast);
262 pkt.dataStatic(&inst_data);
264 dcachePort->sendFunctional(pkt);
268 memcpy(&inst_data
, unverifiedMemData
, sizeof(T
));
270 if (data
!= inst_data
) {
271 warn("%lli: Store value does not match value in memory! "
272 "Instruction: %#x, memory: %#x",
273 curTick
, inst_data
, data
);
278 // Assume the result was the same as the one passed in. This checker
279 // doesn't check if the SC should succeed or fail, it just checks the
281 if (res
&& unverifiedReq
->scResultValid())
282 *res
= unverifiedReq
->getScResult();
288 #ifndef DOXYGEN_SHOULD_SKIP_THIS
291 CheckerCPU::write(uint64_t data
, Addr addr
, unsigned flags
, uint64_t *res
);
295 CheckerCPU::write(uint32_t data
, Addr addr
, unsigned flags
, uint64_t *res
);
299 CheckerCPU::write(uint16_t data
, Addr addr
, unsigned flags
, uint64_t *res
);
303 CheckerCPU::write(uint8_t data
, Addr addr
, unsigned flags
, uint64_t *res
);
305 #endif //DOXYGEN_SHOULD_SKIP_THIS
309 CheckerCPU::write(double data
, Addr addr
, unsigned flags
, uint64_t *res
)
311 return write(*(uint64_t*)&data
, addr
, flags
, res
);
316 CheckerCPU::write(float data
, Addr addr
, unsigned flags
, uint64_t *res
)
318 return write(*(uint32_t*)&data
, addr
, flags
, res
);
323 CheckerCPU::write(int32_t data
, Addr addr
, unsigned flags
, uint64_t *res
)
325 return write((uint32_t)data
, addr
, flags
, res
);
331 CheckerCPU::dbg_vtophys(Addr addr
)
333 return vtophys(tc
, addr
);
335 #endif // FULL_SYSTEM
338 CheckerCPU::translateInstReq(Request
*req
)
341 return (thread
->translateInstReq(req
) == NoFault
);
343 thread
->translateInstReq(req
);
349 CheckerCPU::translateDataReadReq(Request
*req
)
351 thread
->translateDataReadReq(req
);
353 if (req
->getVaddr() != unverifiedReq
->getVaddr()) {
354 warn("%lli: Request virtual addresses do not match! Inst: %#x, "
356 curTick
, unverifiedReq
->getVaddr(), req
->getVaddr());
359 req
->setPaddr(unverifiedReq
->getPaddr());
361 if (checkFlags(req
)) {
362 warn("%lli: Request flags do not match! Inst: %#x, checker: %#x",
363 curTick
, unverifiedReq
->getFlags(), req
->getFlags());
369 CheckerCPU::translateDataWriteReq(Request
*req
)
371 thread
->translateDataWriteReq(req
);
373 if (req
->getVaddr() != unverifiedReq
->getVaddr()) {
374 warn("%lli: Request virtual addresses do not match! Inst: %#x, "
376 curTick
, unverifiedReq
->getVaddr(), req
->getVaddr());
379 req
->setPaddr(unverifiedReq
->getPaddr());
381 if (checkFlags(req
)) {
382 warn("%lli: Request flags do not match! Inst: %#x, checker: %#x",
383 curTick
, unverifiedReq
->getFlags(), req
->getFlags());
389 CheckerCPU::checkFlags(Request
*req
)
391 // Remove any dynamic flags that don't have to do with the request itself.
392 unsigned flags
= unverifiedReq
->getFlags();
393 unsigned mask
= LOCKED
| PHYSICAL
| VPTE
| ALTMODE
| UNCACHEABLE
| NO_FAULT
;
394 flags
= flags
& (mask
);
395 if (flags
== req
->getFlags()) {
403 CheckerCPU::dumpAndExit()
405 warn("%lli: Checker PC:%#x, next PC:%#x",
406 curTick
, thread
->readPC(), thread
->readNextPC());
407 panic("Checker found an error!");