Minor fixes.
[gem5.git] / src / cpu / checker / thread_context.hh
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31 #ifndef __CPU_CHECKER_THREAD_CONTEXT_HH__
32 #define __CPU_CHECKER_THREAD_CONTEXT_HH__
33
34 #include "cpu/checker/cpu.hh"
35 #include "cpu/simple_thread.hh"
36 #include "cpu/thread_context.hh"
37
38 class EndQuiesceEvent;
39 namespace Kernel {
40 class Statistics;
41 };
42
43 /**
44 * Derived ThreadContext class for use with the Checker. The template
45 * parameter is the ThreadContext class used by the specific CPU being
46 * verified. This CheckerThreadContext is then used by the main CPU
47 * in place of its usual ThreadContext class. It handles updating the
48 * checker's state any time state is updated externally through the
49 * ThreadContext.
50 */
51 template <class TC>
52 class CheckerThreadContext : public ThreadContext
53 {
54 public:
55 CheckerThreadContext(TC *actual_tc,
56 CheckerCPU *checker_cpu)
57 : actualTC(actual_tc), checkerTC(checker_cpu->thread),
58 checkerCPU(checker_cpu)
59 { }
60
61 private:
62 /** The main CPU's ThreadContext, or class that implements the
63 * ThreadContext interface. */
64 TC *actualTC;
65 /** The checker's own SimpleThread. Will be updated any time
66 * anything uses this ThreadContext to externally update a
67 * thread's state. */
68 SimpleThread *checkerTC;
69 /** Pointer to the checker CPU. */
70 CheckerCPU *checkerCPU;
71
72 public:
73
74 BaseCPU *getCpuPtr() { return actualTC->getCpuPtr(); }
75
76 void setCpuId(int id)
77 {
78 actualTC->setCpuId(id);
79 checkerTC->setCpuId(id);
80 }
81
82 int readCpuId() { return actualTC->readCpuId(); }
83
84 #if FULL_SYSTEM
85 System *getSystemPtr() { return actualTC->getSystemPtr(); }
86
87 PhysicalMemory *getPhysMemPtr() { return actualTC->getPhysMemPtr(); }
88
89 AlphaITB *getITBPtr() { return actualTC->getITBPtr(); }
90
91 AlphaDTB *getDTBPtr() { return actualTC->getDTBPtr(); }
92
93 Kernel::Statistics *getKernelStats() { return actualTC->getKernelStats(); }
94
95 FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
96
97 VirtualPort *getVirtPort(ThreadContext *tc = NULL)
98 { return actualTC->getVirtPort(); }
99
100 void delVirtPort(VirtualPort *vp) { actualTC->delVirtPort(vp); }
101 #else
102 TranslatingPort *getMemPort() { return actualTC->getMemPort(); }
103
104 Process *getProcessPtr() { return actualTC->getProcessPtr(); }
105 #endif
106
107 Status status() const { return actualTC->status(); }
108
109 void setStatus(Status new_status)
110 {
111 actualTC->setStatus(new_status);
112 checkerTC->setStatus(new_status);
113 }
114
115 /// Set the status to Active. Optional delay indicates number of
116 /// cycles to wait before beginning execution.
117 void activate(int delay = 1) { actualTC->activate(delay); }
118
119 /// Set the status to Suspended.
120 void suspend() { actualTC->suspend(); }
121
122 /// Set the status to Unallocated.
123 void deallocate(int delay = 0) { actualTC->deallocate(delay); }
124
125 /// Set the status to Halted.
126 void halt() { actualTC->halt(); }
127
128 #if FULL_SYSTEM
129 void dumpFuncProfile() { actualTC->dumpFuncProfile(); }
130 #endif
131
132 void takeOverFrom(ThreadContext *oldContext)
133 {
134 actualTC->takeOverFrom(oldContext);
135 checkerTC->takeOverFrom(oldContext);
136 }
137
138 void regStats(const std::string &name) { actualTC->regStats(name); }
139
140 void serialize(std::ostream &os) { actualTC->serialize(os); }
141 void unserialize(Checkpoint *cp, const std::string &section)
142 { actualTC->unserialize(cp, section); }
143
144 #if FULL_SYSTEM
145 EndQuiesceEvent *getQuiesceEvent() { return actualTC->getQuiesceEvent(); }
146
147 Tick readLastActivate() { return actualTC->readLastActivate(); }
148 Tick readLastSuspend() { return actualTC->readLastSuspend(); }
149
150 void profileClear() { return actualTC->profileClear(); }
151 void profileSample() { return actualTC->profileSample(); }
152 #endif
153
154 int getThreadNum() { return actualTC->getThreadNum(); }
155
156 // @todo: Do I need this?
157 MachInst getInst() { return actualTC->getInst(); }
158
159 // @todo: Do I need this?
160 void copyArchRegs(ThreadContext *tc)
161 {
162 actualTC->copyArchRegs(tc);
163 checkerTC->copyArchRegs(tc);
164 }
165
166 void clearArchRegs()
167 {
168 actualTC->clearArchRegs();
169 checkerTC->clearArchRegs();
170 }
171
172 //
173 // New accessors for new decoder.
174 //
175 uint64_t readIntReg(int reg_idx)
176 { return actualTC->readIntReg(reg_idx); }
177
178 FloatReg readFloatReg(int reg_idx, int width)
179 { return actualTC->readFloatReg(reg_idx, width); }
180
181 FloatReg readFloatReg(int reg_idx)
182 { return actualTC->readFloatReg(reg_idx); }
183
184 FloatRegBits readFloatRegBits(int reg_idx, int width)
185 { return actualTC->readFloatRegBits(reg_idx, width); }
186
187 FloatRegBits readFloatRegBits(int reg_idx)
188 { return actualTC->readFloatRegBits(reg_idx); }
189
190 void setIntReg(int reg_idx, uint64_t val)
191 {
192 actualTC->setIntReg(reg_idx, val);
193 checkerTC->setIntReg(reg_idx, val);
194 }
195
196 void setFloatReg(int reg_idx, FloatReg val, int width)
197 {
198 actualTC->setFloatReg(reg_idx, val, width);
199 checkerTC->setFloatReg(reg_idx, val, width);
200 }
201
202 void setFloatReg(int reg_idx, FloatReg val)
203 {
204 actualTC->setFloatReg(reg_idx, val);
205 checkerTC->setFloatReg(reg_idx, val);
206 }
207
208 void setFloatRegBits(int reg_idx, FloatRegBits val, int width)
209 {
210 actualTC->setFloatRegBits(reg_idx, val, width);
211 checkerTC->setFloatRegBits(reg_idx, val, width);
212 }
213
214 void setFloatRegBits(int reg_idx, FloatRegBits val)
215 {
216 actualTC->setFloatRegBits(reg_idx, val);
217 checkerTC->setFloatRegBits(reg_idx, val);
218 }
219
220 uint64_t readPC() { return actualTC->readPC(); }
221
222 void setPC(uint64_t val)
223 {
224 actualTC->setPC(val);
225 checkerTC->setPC(val);
226 checkerCPU->recordPCChange(val);
227 }
228
229 uint64_t readNextPC() { return actualTC->readNextPC(); }
230
231 void setNextPC(uint64_t val)
232 {
233 actualTC->setNextPC(val);
234 checkerTC->setNextPC(val);
235 checkerCPU->recordNextPCChange(val);
236 }
237
238 uint64_t readNextNPC() { return actualTC->readNextNPC(); }
239
240 void setNextNPC(uint64_t val)
241 {
242 actualTC->setNextNPC(val);
243 checkerTC->setNextNPC(val);
244 checkerCPU->recordNextPCChange(val);
245 }
246
247 MiscReg readMiscReg(int misc_reg)
248 { return actualTC->readMiscReg(misc_reg); }
249
250 MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault)
251 { return actualTC->readMiscRegWithEffect(misc_reg, fault); }
252
253 Fault setMiscReg(int misc_reg, const MiscReg &val)
254 {
255 checkerTC->setMiscReg(misc_reg, val);
256 return actualTC->setMiscReg(misc_reg, val);
257 }
258
259 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
260 {
261 checkerTC->setMiscRegWithEffect(misc_reg, val);
262 return actualTC->setMiscRegWithEffect(misc_reg, val);
263 }
264
265 unsigned readStCondFailures()
266 { return actualTC->readStCondFailures(); }
267
268 void setStCondFailures(unsigned sc_failures)
269 {
270 checkerTC->setStCondFailures(sc_failures);
271 actualTC->setStCondFailures(sc_failures);
272 }
273 #if FULL_SYSTEM
274 bool inPalMode() { return actualTC->inPalMode(); }
275 #endif
276
277 // @todo: Fix this!
278 bool misspeculating() { return actualTC->misspeculating(); }
279
280 #if !FULL_SYSTEM
281 IntReg getSyscallArg(int i) { return actualTC->getSyscallArg(i); }
282
283 // used to shift args for indirect syscall
284 void setSyscallArg(int i, IntReg val)
285 {
286 checkerTC->setSyscallArg(i, val);
287 actualTC->setSyscallArg(i, val);
288 }
289
290 void setSyscallReturn(SyscallReturn return_value)
291 {
292 checkerTC->setSyscallReturn(return_value);
293 actualTC->setSyscallReturn(return_value);
294 }
295
296 Counter readFuncExeInst() { return actualTC->readFuncExeInst(); }
297 #endif
298 void changeRegFileContext(RegFile::ContextParam param,
299 RegFile::ContextVal val)
300 {
301 actualTC->changeRegFileContext(param, val);
302 checkerTC->changeRegFileContext(param, val);
303 }
304 };
305
306 #endif // __CPU_CHECKER_EXEC_CONTEXT_HH__