Move checker's exec_context.hh to match the other changes. Also add in some more...
[gem5.git] / src / cpu / checker / thread_context.hh
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __CPU_CHECKER_EXEC_CONTEXT_HH__
30 #define __CPU_CHECKER_EXEC_CONTEXT_HH__
31
32 #include "cpu/checker/cpu.hh"
33 #include "cpu/cpu_exec_context.hh"
34 #include "cpu/thread_context.hh"
35
36 class EndQuiesceEvent;
37 namespace Kernel {
38 class Statistics;
39 };
40
41 /**
42 * Derived ThreadContext class for use with the Checker. The template
43 * parameter is the ThreadContext class used by the specific CPU being
44 * verified. This CheckerThreadContext is then used by the main CPU in
45 * place of its usual ThreadContext class. It handles updating the
46 * checker's state any time state is updated through the ThreadContext.
47 */
48 template <class TC>
49 class CheckerThreadContext : public ThreadContext
50 {
51 public:
52 CheckerThreadContext(TC *actual_tc,
53 CheckerCPU *checker_cpu)
54 : actualTC(actual_tc), checkerTC(checker_cpu->cpuXC),
55 checkerCPU(checker_cpu)
56 { }
57
58 private:
59 TC *actualTC;
60 CPUExecContext *checkerTC;
61 CheckerCPU *checkerCPU;
62
63 public:
64
65 BaseCPU *getCpuPtr() { return actualTC->getCpuPtr(); }
66
67 void setCpuId(int id)
68 {
69 actualTC->setCpuId(id);
70 checkerTC->setCpuId(id);
71 }
72
73 int readCpuId() { return actualTC->readCpuId(); }
74
75 TranslatingPort *getMemPort() { return actualTC->getMemPort(); }
76
77 #if FULL_SYSTEM
78 System *getSystemPtr() { return actualTC->getSystemPtr(); }
79
80 PhysicalMemory *getPhysMemPtr() { return actualTC->getPhysMemPtr(); }
81
82 AlphaITB *getITBPtr() { return actualTC->getITBPtr(); }
83
84 AlphaDTB *getDTBPtr() { return actualTC->getDTBPtr(); }
85
86 Kernel::Statistics *getKernelStats() { return actualTC->getKernelStats(); }
87 #else
88 Process *getProcessPtr() { return actualTC->getProcessPtr(); }
89 #endif
90
91 Status status() const { return actualTC->status(); }
92
93 void setStatus(Status new_status)
94 {
95 actualTC->setStatus(new_status);
96 checkerTC->setStatus(new_status);
97 }
98
99 /// Set the status to Active. Optional delay indicates number of
100 /// cycles to wait before beginning execution.
101 void activate(int delay = 1) { actualTC->activate(delay); }
102
103 /// Set the status to Suspended.
104 void suspend() { actualTC->suspend(); }
105
106 /// Set the status to Unallocated.
107 void deallocate() { actualTC->deallocate(); }
108
109 /// Set the status to Halted.
110 void halt() { actualTC->halt(); }
111
112 #if FULL_SYSTEM
113 void dumpFuncProfile() { actualTC->dumpFuncProfile(); }
114 #endif
115
116 void takeOverFrom(ThreadContext *oldContext)
117 {
118 actualTC->takeOverFrom(oldContext);
119 checkerTC->takeOverFrom(oldContext);
120 }
121
122 void regStats(const std::string &name) { actualTC->regStats(name); }
123
124 void serialize(std::ostream &os) { actualTC->serialize(os); }
125 void unserialize(Checkpoint *cp, const std::string &section)
126 { actualTC->unserialize(cp, section); }
127
128 #if FULL_SYSTEM
129 EndQuiesceEvent *getQuiesceEvent() { return actualTC->getQuiesceEvent(); }
130
131 Tick readLastActivate() { return actualTC->readLastActivate(); }
132 Tick readLastSuspend() { return actualTC->readLastSuspend(); }
133
134 void profileClear() { return actualTC->profileClear(); }
135 void profileSample() { return actualTC->profileSample(); }
136 #endif
137
138 int getThreadNum() { return actualTC->getThreadNum(); }
139
140 // @todo: Do I need this?
141 MachInst getInst() { return actualTC->getInst(); }
142
143 // @todo: Do I need this?
144 void copyArchRegs(ThreadContext *tc)
145 {
146 actualTC->copyArchRegs(tc);
147 checkerTC->copyArchRegs(tc);
148 }
149
150 void clearArchRegs()
151 {
152 actualTC->clearArchRegs();
153 checkerTC->clearArchRegs();
154 }
155
156 //
157 // New accessors for new decoder.
158 //
159 uint64_t readIntReg(int reg_idx)
160 { return actualTC->readIntReg(reg_idx); }
161
162 FloatReg readFloatReg(int reg_idx, int width)
163 { return actualTC->readFloatReg(reg_idx, width); }
164
165 FloatReg readFloatReg(int reg_idx)
166 { return actualTC->readFloatReg(reg_idx); }
167
168 FloatRegBits readFloatRegBits(int reg_idx, int width)
169 { return actualTC->readFloatRegBits(reg_idx, width); }
170
171 FloatRegBits readFloatRegBits(int reg_idx)
172 { return actualTC->readFloatRegBits(reg_idx); }
173
174 void setIntReg(int reg_idx, uint64_t val)
175 {
176 actualTC->setIntReg(reg_idx, val);
177 checkerTC->setIntReg(reg_idx, val);
178 }
179
180 void setFloatReg(int reg_idx, FloatReg val, int width)
181 {
182 actualTC->setFloatReg(reg_idx, val, width);
183 checkerTC->setFloatReg(reg_idx, val, width);
184 }
185
186 void setFloatReg(int reg_idx, FloatReg val)
187 {
188 actualTC->setFloatReg(reg_idx, val);
189 checkerTC->setFloatReg(reg_idx, val);
190 }
191
192 void setFloatRegBits(int reg_idx, FloatRegBits val, int width)
193 {
194 actualTC->setFloatRegBits(reg_idx, val, width);
195 checkerTC->setFloatRegBits(reg_idx, val, width);
196 }
197
198 void setFloatRegBits(int reg_idx, FloatRegBits val)
199 {
200 actualTC->setFloatRegBits(reg_idx, val);
201 checkerTC->setFloatRegBits(reg_idx, val);
202 }
203
204 uint64_t readPC() { return actualTC->readPC(); }
205
206 void setPC(uint64_t val)
207 {
208 actualTC->setPC(val);
209 checkerTC->setPC(val);
210 checkerCPU->recordPCChange(val);
211 }
212
213 uint64_t readNextPC() { return actualTC->readNextPC(); }
214
215 void setNextPC(uint64_t val)
216 {
217 actualTC->setNextPC(val);
218 checkerTC->setNextPC(val);
219 checkerCPU->recordNextPCChange(val);
220 }
221
222 uint64_t readNextNPC() { return actualTC->readNextNPC(); }
223
224 void setNextNPC(uint64_t val)
225 {
226 actualTC->setNextNPC(val);
227 checkerTC->setNextNPC(val);
228 checkerCPU->recordNextPCChange(val);
229 }
230
231 MiscReg readMiscReg(int misc_reg)
232 { return actualTC->readMiscReg(misc_reg); }
233
234 MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault)
235 { return actualTC->readMiscRegWithEffect(misc_reg, fault); }
236
237 Fault setMiscReg(int misc_reg, const MiscReg &val)
238 {
239 checkerTC->setMiscReg(misc_reg, val);
240 return actualTC->setMiscReg(misc_reg, val);
241 }
242
243 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
244 {
245 checkerTC->setMiscRegWithEffect(misc_reg, val);
246 return actualTC->setMiscRegWithEffect(misc_reg, val);
247 }
248
249 unsigned readStCondFailures()
250 { return actualTC->readStCondFailures(); }
251
252 void setStCondFailures(unsigned sc_failures)
253 {
254 checkerTC->setStCondFailures(sc_failures);
255 actualTC->setStCondFailures(sc_failures);
256 }
257 #if FULL_SYSTEM
258 bool inPalMode() { return actualTC->inPalMode(); }
259 #endif
260
261 // @todo: Fix this!
262 bool misspeculating() { return actualTC->misspeculating(); }
263
264 #if !FULL_SYSTEM
265 IntReg getSyscallArg(int i) { return actualTC->getSyscallArg(i); }
266
267 // used to shift args for indirect syscall
268 void setSyscallArg(int i, IntReg val)
269 {
270 checkerTC->setSyscallArg(i, val);
271 actualTC->setSyscallArg(i, val);
272 }
273
274 void setSyscallReturn(SyscallReturn return_value)
275 {
276 checkerTC->setSyscallReturn(return_value);
277 actualTC->setSyscallReturn(return_value);
278 }
279
280 Counter readFuncExeInst() { return actualTC->readFuncExeInst(); }
281 #endif
282 void changeRegFileContext(RegFile::ContextParam param,
283 RegFile::ContextVal val)
284 {
285 actualTC->changeRegFileContext(param, val);
286 checkerTC->changeRegFileContext(param, val);
287 }
288 };
289
290 #endif // __CPU_CHECKER_EXEC_CONTEXT_HH__