2 * Copyright (c) 2006 The Regents of The University of Michigan
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31 #ifndef __CPU_CHECKER_THREAD_CONTEXT_HH__
32 #define __CPU_CHECKER_THREAD_CONTEXT_HH__
34 #include "arch/types.hh"
35 #include "cpu/checker/cpu.hh"
36 #include "cpu/simple_thread.hh"
37 #include "cpu/thread_context.hh"
39 class EndQuiesceEvent;
45 * Derived ThreadContext class for use with the Checker. The template
46 * parameter is the ThreadContext class used by the specific CPU being
47 * verified. This CheckerThreadContext is then used by the main CPU
48 * in place of its usual ThreadContext class. It handles updating the
49 * checker's state any time state is updated externally through the
53 class CheckerThreadContext : public ThreadContext
56 CheckerThreadContext(TC *actual_tc,
57 CheckerCPU *checker_cpu)
58 : actualTC(actual_tc), checkerTC(checker_cpu->thread),
59 checkerCPU(checker_cpu)
63 /** The main CPU's ThreadContext, or class that implements the
64 * ThreadContext interface. */
66 /** The checker's own SimpleThread. Will be updated any time
67 * anything uses this ThreadContext to externally update a
69 SimpleThread *checkerTC;
70 /** Pointer to the checker CPU. */
71 CheckerCPU *checkerCPU;
75 BaseCPU *getCpuPtr() { return actualTC->getCpuPtr(); }
79 actualTC->setCpuId(id);
80 checkerTC->setCpuId(id);
83 int readCpuId() { return actualTC->readCpuId(); }
86 System *getSystemPtr() { return actualTC->getSystemPtr(); }
88 PhysicalMemory *getPhysMemPtr() { return actualTC->getPhysMemPtr(); }
90 AlphaITB *getITBPtr() { return actualTC->getITBPtr(); }
92 AlphaDTB *getDTBPtr() { return actualTC->getDTBPtr(); }
94 Kernel::Statistics *getKernelStats() { return actualTC->getKernelStats(); }
96 FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
98 VirtualPort *getVirtPort(ThreadContext *tc = NULL)
99 { return actualTC->getVirtPort(); }
101 void delVirtPort(VirtualPort *vp) { actualTC->delVirtPort(vp); }
103 TranslatingPort *getMemPort() { return actualTC->getMemPort(); }
105 Process *getProcessPtr() { return actualTC->getProcessPtr(); }
108 Status status() const { return actualTC->status(); }
110 void setStatus(Status new_status)
112 actualTC->setStatus(new_status);
113 checkerTC->setStatus(new_status);
116 /// Set the status to Active. Optional delay indicates number of
117 /// cycles to wait before beginning execution.
118 void activate(int delay = 1) { actualTC->activate(delay); }
120 /// Set the status to Suspended.
121 void suspend() { actualTC->suspend(); }
123 /// Set the status to Unallocated.
124 void deallocate(int delay = 0) { actualTC->deallocate(delay); }
126 /// Set the status to Halted.
127 void halt() { actualTC->halt(); }
130 void dumpFuncProfile() { actualTC->dumpFuncProfile(); }
133 void takeOverFrom(ThreadContext *oldContext)
135 actualTC->takeOverFrom(oldContext);
136 checkerTC->copyState(oldContext);
139 void regStats(const std::string &name) { actualTC->regStats(name); }
141 void serialize(std::ostream &os) { actualTC->serialize(os); }
142 void unserialize(Checkpoint *cp, const std::string §ion)
143 { actualTC->unserialize(cp, section); }
146 EndQuiesceEvent *getQuiesceEvent() { return actualTC->getQuiesceEvent(); }
148 Tick readLastActivate() { return actualTC->readLastActivate(); }
149 Tick readLastSuspend() { return actualTC->readLastSuspend(); }
151 void profileClear() { return actualTC->profileClear(); }
152 void profileSample() { return actualTC->profileSample(); }
155 int getThreadNum() { return actualTC->getThreadNum(); }
157 // @todo: Do I need this?
158 MachInst getInst() { return actualTC->getInst(); }
160 // @todo: Do I need this?
161 void copyArchRegs(ThreadContext *tc)
163 actualTC->copyArchRegs(tc);
164 checkerTC->copyArchRegs(tc);
169 actualTC->clearArchRegs();
170 checkerTC->clearArchRegs();
174 // New accessors for new decoder.
176 uint64_t readIntReg(int reg_idx)
177 { return actualTC->readIntReg(reg_idx); }
179 FloatReg readFloatReg(int reg_idx, int width)
180 { return actualTC->readFloatReg(reg_idx, width); }
182 FloatReg readFloatReg(int reg_idx)
183 { return actualTC->readFloatReg(reg_idx); }
185 FloatRegBits readFloatRegBits(int reg_idx, int width)
186 { return actualTC->readFloatRegBits(reg_idx, width); }
188 FloatRegBits readFloatRegBits(int reg_idx)
189 { return actualTC->readFloatRegBits(reg_idx); }
191 void setIntReg(int reg_idx, uint64_t val)
193 actualTC->setIntReg(reg_idx, val);
194 checkerTC->setIntReg(reg_idx, val);
197 void setFloatReg(int reg_idx, FloatReg val, int width)
199 actualTC->setFloatReg(reg_idx, val, width);
200 checkerTC->setFloatReg(reg_idx, val, width);
203 void setFloatReg(int reg_idx, FloatReg val)
205 actualTC->setFloatReg(reg_idx, val);
206 checkerTC->setFloatReg(reg_idx, val);
209 void setFloatRegBits(int reg_idx, FloatRegBits val, int width)
211 actualTC->setFloatRegBits(reg_idx, val, width);
212 checkerTC->setFloatRegBits(reg_idx, val, width);
215 void setFloatRegBits(int reg_idx, FloatRegBits val)
217 actualTC->setFloatRegBits(reg_idx, val);
218 checkerTC->setFloatRegBits(reg_idx, val);
221 uint64_t readPC() { return actualTC->readPC(); }
223 void setPC(uint64_t val)
225 actualTC->setPC(val);
226 checkerTC->setPC(val);
227 checkerCPU->recordPCChange(val);
230 uint64_t readNextPC() { return actualTC->readNextPC(); }
232 void setNextPC(uint64_t val)
234 actualTC->setNextPC(val);
235 checkerTC->setNextPC(val);
236 checkerCPU->recordNextPCChange(val);
239 uint64_t readNextNPC() { return actualTC->readNextNPC(); }
241 void setNextNPC(uint64_t val)
243 actualTC->setNextNPC(val);
244 checkerTC->setNextNPC(val);
245 checkerCPU->recordNextPCChange(val);
248 MiscReg readMiscReg(int misc_reg)
249 { return actualTC->readMiscReg(misc_reg); }
251 MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault)
252 { return actualTC->readMiscRegWithEffect(misc_reg, fault); }
254 Fault setMiscReg(int misc_reg, const MiscReg &val)
256 checkerTC->setMiscReg(misc_reg, val);
257 return actualTC->setMiscReg(misc_reg, val);
260 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
262 checkerTC->setMiscRegWithEffect(misc_reg, val);
263 return actualTC->setMiscRegWithEffect(misc_reg, val);
266 unsigned readStCondFailures()
267 { return actualTC->readStCondFailures(); }
269 void setStCondFailures(unsigned sc_failures)
271 checkerTC->setStCondFailures(sc_failures);
272 actualTC->setStCondFailures(sc_failures);
275 bool inPalMode() { return actualTC->inPalMode(); }
279 bool misspeculating() { return actualTC->misspeculating(); }
282 IntReg getSyscallArg(int i) { return actualTC->getSyscallArg(i); }
284 // used to shift args for indirect syscall
285 void setSyscallArg(int i, IntReg val)
287 checkerTC->setSyscallArg(i, val);
288 actualTC->setSyscallArg(i, val);
291 void setSyscallReturn(SyscallReturn return_value)
293 checkerTC->setSyscallReturn(return_value);
294 actualTC->setSyscallReturn(return_value);
297 Counter readFuncExeInst() { return actualTC->readFuncExeInst(); }
299 void changeRegFileContext(TheISA::RegContextParam param,
300 TheISA::RegContextVal val)
302 actualTC->changeRegFileContext(param, val);
303 checkerTC->changeRegFileContext(param, val);
307 #endif // __CPU_CHECKER_EXEC_CONTEXT_HH__