Ruby Debug Flags: Remove one, add another
[gem5.git] / src / cpu / decode_cache.hh
1 /*
2 * Copyright (c) 2011 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 #ifndef __CPU_DECODE_CACHE_HH__
32 #define __CPU_DECODE_CACHE_HH__
33
34 #include "arch/isa_traits.hh"
35 #include "arch/types.hh"
36 #include "base/hashmap.hh"
37 #include "config/the_isa.hh"
38 #include "cpu/static_inst.hh"
39
40 typedef StaticInstPtr (*DecodeInstFunc)(TheISA::ExtMachInst);
41
42 template <DecodeInstFunc decodeInstFunc>
43 class DecodeCache
44 {
45 private:
46 typedef TheISA::ExtMachInst ExtMachInst;
47
48 /// Hash of decoded instructions.
49 typedef m5::hash_map<ExtMachInst, StaticInstPtr> InstMap;
50 InstMap instMap;
51
52 /// A table of instructions which are already been decoded, indexed by
53 /// page offset.
54 class DecodePage
55 {
56 protected:
57 StaticInstPtr instructions[TheISA::PageBytes];
58
59 // A helper function to compute the index of an address in the table.
60 Addr offset(Addr addr) { return addr & (TheISA::PageBytes - 1); }
61
62 public:
63 /// Decode the given instruction. First attempt to find it in the
64 /// table, then in the generic decode cache, and finally call the
65 /// actual decode function.
66 ///
67 /// @param mach_inst The predecoded instruction to decode.
68 /// @param addr The address the instruction came from.
69 /// @param cache A cache of already decoded instructions.
70 /// @retval The decoded instruction object.
71 StaticInstPtr
72 decode(const ExtMachInst &mach_inst, Addr addr, InstMap &instMap)
73 {
74 StaticInstPtr si = instructions[offset(addr)];
75 if (si && (si->machInst == mach_inst)) {
76 return si;
77 }
78
79 InstMap::iterator iter = instMap.find(mach_inst);
80 if (iter != instMap.end()) {
81 si = iter->second;
82 } else {
83 si = decodeInstFunc(mach_inst);
84 instMap[mach_inst] = si;
85 }
86
87 instructions[offset(addr)] = si;
88 return si;
89 }
90 };
91
92 /// A store of DecodePages. Basically a slightly smarter hash_map.
93 class DecodePages
94 {
95 protected:
96 typedef typename m5::hash_map<Addr, DecodePage *> PageMap;
97 typedef typename PageMap::iterator PageIt;
98 PageIt recent[2];
99 PageMap pageMap;
100
101 /// Update the small cache of recent lookups.
102 /// @param recentest The most recent result;
103 void
104 update(PageIt recentest)
105 {
106 recent[1] = recent[0];
107 recent[0] = recentest;
108 }
109
110 public:
111 /// Constructor
112 DecodePages()
113 {
114 recent[0] = recent[1] = pageMap.end();
115 }
116
117 /// Attempt to find the DecodePage which goes with a particular
118 /// address. First check the small cache of recent results, then
119 /// actually look in the hash_map.
120 /// @param addr The address to look up.
121 DecodePage *
122 findPage(Addr addr)
123 {
124 Addr page_addr = addr & ~(TheISA::PageBytes - 1);
125
126 // Check against recent lookups.
127 if (recent[0] != pageMap.end()) {
128 if (recent[0]->first == page_addr)
129 return recent[0]->second;
130 if (recent[1] != pageMap.end() &&
131 recent[1]->first == page_addr) {
132 update(recent[1]);
133 // recent[1] has just become recent[0].
134 return recent[0]->second;
135 }
136 }
137
138 // Actually look in the has_map.
139 PageIt it = pageMap.find(page_addr);
140 if (it != pageMap.end()) {
141 update(it);
142 return it->second;
143 }
144
145 // Didn't find it so return NULL.
146 return NULL;
147 }
148
149 void
150 addPage(Addr addr, DecodePage *page)
151 {
152 Addr page_addr = addr & ~(TheISA::PageBytes - 1);
153 typename PageMap::value_type to_insert(page_addr, page);
154 update(pageMap.insert(to_insert).first);
155 }
156 } decodePages;
157
158 public:
159 /// Decode a machine instruction.
160 /// @param mach_inst The binary instruction to decode.
161 /// @retval A pointer to the corresponding StaticInst object.
162 StaticInstPtr
163 decode(ExtMachInst mach_inst, Addr addr)
164 {
165 // Try to find a matching address based table of instructions.
166 DecodePage *page = decodePages.findPage(addr);
167 if (!page) {
168 // Nothing was found, so create a new one.
169 page = new DecodePage;
170 decodePages.addPage(addr, page);
171 }
172
173 // Use the table to decode the instruction. It will fall back to other
174 // mechanisms if it needs to.
175 return page->decode(mach_inst, addr, instMap);
176 }
177 };
178
179 #endif // __CPU_DECODE_CACHE_HH__