cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass
[gem5.git] / src / cpu / decode_cache.hh
1 /*
2 * Copyright (c) 2011 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 #ifndef __CPU_DECODE_CACHE_HH__
32 #define __CPU_DECODE_CACHE_HH__
33
34 #include <unordered_map>
35
36 #include "arch/isa_traits.hh"
37 #include "arch/types.hh"
38 #include "config/the_isa.hh"
39 #include "cpu/static_inst_fwd.hh"
40
41 namespace TheISA
42 {
43 class Decoder;
44 }
45
46 namespace DecodeCache
47 {
48
49 /// Hash for decoded instructions.
50 typedef std::unordered_map<TheISA::ExtMachInst, StaticInstPtr> InstMap;
51
52 /// A sparse map from an Addr to a Value, stored in page chunks.
53 template<class Value>
54 class AddrMap
55 {
56 protected:
57 // A pages worth of cache entries.
58 struct CachePage {
59 Value items[TheISA::PageBytes];
60 };
61 // A map of cache pages which allows a sparse mapping.
62 typedef typename std::unordered_map<Addr, CachePage *> PageMap;
63 typedef typename PageMap::iterator PageIt;
64 // Mini cache of recent lookups.
65 PageIt recent[2];
66 PageMap pageMap;
67
68 /// Update the mini cache of recent lookups.
69 /// @param recentest The most recent result;
70 void
71 update(PageIt recentest)
72 {
73 recent[1] = recent[0];
74 recent[0] = recentest;
75 }
76
77 /// Attempt to find the CacheePage which goes with a particular
78 /// address. First check the small cache of recent results, then
79 /// actually look in the hash map.
80 /// @param addr The address to look up.
81 CachePage *
82 getPage(Addr addr)
83 {
84 Addr page_addr = addr & ~(TheISA::PageBytes - 1);
85
86 // Check against recent lookups.
87 if (recent[0] != pageMap.end()) {
88 if (recent[0]->first == page_addr)
89 return recent[0]->second;
90 if (recent[1] != pageMap.end() &&
91 recent[1]->first == page_addr) {
92 update(recent[1]);
93 // recent[1] has just become recent[0].
94 return recent[0]->second;
95 }
96 }
97
98 // Actually look in the has_map.
99 PageIt it = pageMap.find(page_addr);
100 if (it != pageMap.end()) {
101 update(it);
102 return it->second;
103 }
104
105 // Didn't find an existing page, so add a new one.
106 CachePage *newPage = new CachePage;
107 page_addr = page_addr & ~(TheISA::PageBytes - 1);
108 typename PageMap::value_type to_insert(page_addr, newPage);
109 update(pageMap.insert(to_insert).first);
110 return newPage;
111 }
112
113 public:
114 /// Constructor
115 AddrMap()
116 {
117 recent[0] = recent[1] = pageMap.end();
118 }
119
120 Value &
121 lookup(Addr addr)
122 {
123 CachePage *page = getPage(addr);
124 return page->items[addr & (TheISA::PageBytes - 1)];
125 }
126 };
127
128 } // namespace DecodeCache
129
130 #endif // __CPU_DECODE_CACHE_HH__