2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
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31 #error "Cannot include this file"
34 * The ExecContext is not a usable class. It is simply here for
35 * documentation purposes. It shows the interface that is used by the
36 * ISA to access and change CPU state.
39 // The register accessor methods provide the index of the
40 // instruction's operand (e.g., 0 or 1), not the architectural
41 // register index, to simplify the implementation of register
42 // renaming. We find the architectural register index by indexing
43 // into the instruction's own operand index table. Note that a
44 // raw pointer to the StaticInst is provided instead of a
45 // ref-counted StaticInstPtr to reduce overhead. This is fine as
46 // long as these methods don't copy the pointer into any long-term
47 // storage (which is pretty hard to imagine they would have reason
50 /** Reads an integer register. */
51 uint64_t readIntRegOperand(const StaticInst *si, int idx);
53 /** Reads a floating point register of a specific width. */
54 FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width);
56 /** Reads a floating point register of single register width. */
57 FloatReg readFloatRegOperand(const StaticInst *si, int idx);
59 /** Reads a floating point register of a specific width in its
60 * binary format, instead of by value. */
61 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
64 /** Reads a floating point register in its binary format, instead
66 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx);
68 /** Sets an integer register to a value. */
69 void setIntRegOperand(const StaticInst *si, int idx, uint64_t val);
71 /** Sets a floating point register of a specific width to a value. */
72 void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
75 /** Sets a floating point register of single width to a value. */
76 void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val);
78 /** Sets the bits of a floating point register of a specific width
79 * to a binary value. */
80 void setFloatRegOperandBits(const StaticInst *si, int idx,
81 FloatRegBits val, int width);
83 /** Sets the bits of a floating point register of single width
84 * to a binary value. */
85 void setFloatRegOperandBits(const StaticInst *si, int idx,
90 /** Reads the NextPC. */
91 uint64_t readNextPC();
92 /** Reads the Next-NextPC. Only for architectures like SPARC or MIPS. */
93 uint64_t readNextNPC();
96 void setPC(uint64_t val);
97 /** Sets the NextPC. */
98 void setNextPC(uint64_t val);
99 /** Sets the Next-NextPC. Only for architectures like SPARC or MIPS. */
100 void setNextNPC(uint64_t val);
102 /** Reads a miscellaneous register. */
103 MiscReg readMiscRegNoEffect(int misc_reg);
105 /** Reads a miscellaneous register, handling any architectural
106 * side effects due to reading that register. */
107 MiscReg readMiscReg(int misc_reg);
109 /** Sets a miscellaneous register. */
110 void setMiscRegNoEffect(int misc_reg, const MiscReg &val);
112 /** Sets a miscellaneous register, handling any architectural
113 * side effects due to writing that register. */
114 void setMiscReg(int misc_reg, const MiscReg &val);
116 /** Records the effective address of the instruction. Only valid
119 /** Returns the effective address of the instruction. Only valid
123 /** Returns a pointer to the ThreadContext. */
124 ThreadContext *tcBase();
126 /** Reads an address, creating a memory request with the given
127 * flags. Stores result of read in data. */
129 Fault read(Addr addr, T &data, unsigned flags);
131 /** Writes to an address, creating a memory request with the given
132 * flags. Writes data to memory. For store conditionals, returns
133 * the result of the store in res. */
135 Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
137 /** Prefetches an address, creating a memory request with the
139 void prefetch(Addr addr, unsigned flags);
141 /** Hints to the memory system that an address will be written to
142 * soon, with the given size. Creates a memory request with the
144 void writeHint(Addr addr, int size, unsigned flags);
147 /** Somewhat Alpha-specific function that handles returning from
148 * an error or interrupt. */
152 * Check for special simulator handling of specific PAL calls. If
153 * return value is false, actual PAL call will be suppressed.
155 bool simPalCheck(int palFunc);
157 /** Executes a syscall specified by the callnum. */
158 void syscall(int64_t callnum);