2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
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31 #error "Cannot include this file"
34 * The ExecContext is not a usable class. It is simply here for
35 * documentation purposes. It shows the interface that is used by the
36 * ISA to access and change CPU state.
39 // The register accessor methods provide the index of the
40 // instruction's operand (e.g., 0 or 1), not the architectural
41 // register index, to simplify the implementation of register
42 // renaming. We find the architectural register index by indexing
43 // into the instruction's own operand index table. Note that a
44 // raw pointer to the StaticInst is provided instead of a
45 // ref-counted StaticInstPtr to reduce overhead. This is fine as
46 // long as these methods don't copy the pointer into any long-term
47 // storage (which is pretty hard to imagine they would have reason
50 /** Reads an integer register. */
51 uint64_t readIntReg(const StaticInst *si, int idx);
53 /** Reads a floating point register of a specific width. */
54 FloatReg readFloatReg(const StaticInst *si, int idx, int width);
56 /** Reads a floating point register of single register width. */
57 FloatReg readFloatReg(const StaticInst *si, int idx);
59 /** Reads a floating point register of a specific width in its
60 * binary format, instead of by value. */
61 FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width);
63 /** Reads a floating point register in its binary format, instead
65 FloatRegBits readFloatRegBits(const StaticInst *si, int idx);
67 /** Sets an integer register to a value. */
68 void setIntReg(const StaticInst *si, int idx, uint64_t val);
70 /** Sets a floating point register of a specific width to a value. */
71 void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width);
73 /** Sets a floating point register of single width to a value. */
74 void setFloatReg(const StaticInst *si, int idx, FloatReg val);
76 /** Sets the bits of a floating point register of a specific width
77 * to a binary value. */
78 void setFloatRegBits(const StaticInst *si, int idx,
79 FloatRegBits val, int width);
81 /** Sets the bits of a floating point register of single width
82 * to a binary value. */
83 void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val);
87 /** Reads the NextPC. */
88 uint64_t readNextPC();
89 /** Reads the Next-NextPC. Only for architectures like SPARC or MIPS. */
90 uint64_t readNextNPC();
93 void setPC(uint64_t val);
94 /** Sets the NextPC. */
95 void setNextPC(uint64_t val);
96 /** Sets the Next-NextPC. Only for architectures like SPARC or MIPS. */
97 void setNextNPC(uint64_t val);
99 /** Reads a miscellaneous register. */
100 MiscReg readMiscReg(int misc_reg);
102 /** Reads a miscellaneous register, handling any architectural
103 * side effects due to reading that register. */
104 MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault);
106 /** Sets a miscellaneous register. */
107 Fault setMiscReg(int misc_reg, const MiscReg &val);
109 /** Sets a miscellaneous register, handling any architectural
110 * side effects due to writing that register. */
111 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val);
113 /** Records the effective address of the instruction. Only valid
116 /** Returns the effective address of the instruction. Only valid
120 /** Returns a pointer to the ThreadContext. */
121 ThreadContext *tcBase();
123 /** Reads an address, creating a memory request with the given
124 * flags. Stores result of read in data. */
126 Fault read(Addr addr, T &data, unsigned flags);
128 /** Writes to an address, creating a memory request with the given
129 * flags. Writes data to memory. For store conditionals, returns
130 * the result of the store in res. */
132 Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
134 /** Prefetches an address, creating a memory request with the
136 void prefetch(Addr addr, unsigned flags);
138 /** Hints to the memory system that an address will be written to
139 * soon, with the given size. Creates a memory request with the
141 void writeHint(Addr addr, int size, unsigned flags);
144 /** Somewhat Alpha-specific function that handles returning from
145 * an error or interrupt. */
147 /** Reads the interrupt flags. */
149 /** Sets the interrupt flags to a value. */
150 void setIntrFlag(int val);
153 * Check for special simulator handling of specific PAL calls. If
154 * return value is false, actual PAL call will be suppressed.
156 bool simPalCheck(int palFunc);
158 /** Executes a syscall specified by the callnum. */
159 void syscall(int64_t callnum);