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44 #ifndef __CPU_EXEC_CONTEXT_HH__
45 #define __CPU_EXEC_CONTEXT_HH__
47 #include "arch/registers.hh"
48 #include "base/types.hh"
49 #include "config/the_isa.hh"
50 #include "cpu/static_inst_fwd.hh"
51 #include "cpu/translation.hh"
52 #include "sim/fault_fwd.hh"
55 * The ExecContext is an abstract base class the provides the
56 * interface used by the ISA to manipulate the state of the CPU model.
58 * Register accessor methods in this class typically provide the index
59 * of the instruction's operand (e.g., 0 or 1), not the architectural
60 * register index, to simplify the implementation of register
61 * renaming. The architectural register index can be found by
62 * indexing into the instruction's own operand index table.
64 * @note The methods in this class typically take a raw pointer to the
65 * StaticInst is provided instead of a ref-counted StaticInstPtr to
66 * reduce overhead as an argument. This is fine as long as the
67 * implementation doesn't copy the pointer into any long-term storage
68 * (which is pretty hard to imagine they would have reason to do).
72 typedef TheISA::IntReg IntReg;
73 typedef TheISA::PCState PCState;
74 typedef TheISA::FloatReg FloatReg;
75 typedef TheISA::FloatRegBits FloatRegBits;
76 typedef TheISA::MiscReg MiscReg;
78 typedef TheISA::CCReg CCReg;
83 * @name Integer Register Interfaces
87 /** Reads an integer register. */
88 virtual IntReg readIntRegOperand(const StaticInst *si, int idx) = 0;
90 /** Sets an integer register to a value. */
91 virtual void setIntRegOperand(const StaticInst *si,
92 int idx, IntReg val) = 0;
99 * @name Floating Point Register Interfaces
102 /** Reads a floating point register of single register width. */
103 virtual FloatReg readFloatRegOperand(const StaticInst *si, int idx) = 0;
105 /** Reads a floating point register in its binary format, instead
107 virtual FloatRegBits readFloatRegOperandBits(const StaticInst *si,
110 /** Sets a floating point register of single width to a value. */
111 virtual void setFloatRegOperand(const StaticInst *si,
112 int idx, FloatReg val) = 0;
114 /** Sets the bits of a floating point register of single width
115 * to a binary value. */
116 virtual void setFloatRegOperandBits(const StaticInst *si,
117 int idx, FloatRegBits val) = 0;
123 * @name Condition Code Registers
125 virtual CCReg readCCRegOperand(const StaticInst *si, int idx) = 0;
126 virtual void setCCRegOperand(const StaticInst *si, int idx, CCReg val) = 0;
131 * @name Misc Register Interfaces
133 virtual MiscReg readMiscRegOperand(const StaticInst *si, int idx) = 0;
134 virtual void setMiscRegOperand(const StaticInst *si,
135 int idx, const MiscReg &val) = 0;
138 * Reads a miscellaneous register, handling any architectural
139 * side effects due to reading that register.
141 virtual MiscReg readMiscReg(int misc_reg) = 0;
144 * Sets a miscellaneous register, handling any architectural
145 * side effects due to writing that register.
147 virtual void setMiscReg(int misc_reg, const MiscReg &val) = 0;
155 virtual PCState pcState() const = 0;
156 virtual void pcState(const PCState &val) = 0;
161 * @name Memory Interface
164 * Record the effective address of the instruction.
166 * @note Only valid for memory ops.
168 virtual void setEA(Addr EA) = 0;
170 * Get the effective address of the instruction.
172 * @note Only valid for memory ops.
174 virtual Addr getEA() const = 0;
176 virtual Fault readMem(Addr addr, uint8_t *data, unsigned int size,
177 unsigned int flags) = 0;
179 virtual Fault writeMem(uint8_t *data, unsigned int size, Addr addr,
180 unsigned int flags, uint64_t *res) = 0;
183 * Sets the number of consecutive store conditional failures.
185 virtual void setStCondFailures(unsigned int sc_failures) = 0;
188 * Returns the number of consecutive store conditional failures.
190 virtual unsigned int readStCondFailures() const = 0;
196 * @name SysCall Emulation Interfaces
200 * Executes a syscall specified by the callnum.
202 virtual void syscall(int64_t callnum) = 0;
206 /** Returns a pointer to the ThreadContext. */
207 virtual ThreadContext *tcBase() = 0;
211 * @name Alpha-Specific Interfaces
215 * Somewhat Alpha-specific function that handles returning from an
216 * error or interrupt.
218 virtual Fault hwrei() = 0;
221 * Check for special simulator handling of specific PAL calls. If
222 * return value is false, actual PAL call will be suppressed.
224 virtual bool simPalCheck(int palFunc) = 0;
230 * @name ARM-Specific Interfaces
233 virtual bool readPredicate() = 0;
234 virtual void setPredicate(bool val) = 0;
240 * @name X86-Specific Interfaces
244 * Invalidate a page in the DTLB <i>and</i> ITLB.
246 virtual void demapPage(Addr vaddr, uint64_t asn) = 0;
252 * @name MIPS-Specific Interfaces
255 #if THE_ISA == MIPS_ISA
256 virtual MiscReg readRegOtherThread(int regIdx,
257 ThreadID tid = InvalidThreadID) = 0;
258 virtual void setRegOtherThread(int regIdx, MiscReg val,
259 ThreadID tid = InvalidThreadID) = 0;
265 #endif // __CPU_EXEC_CONTEXT_HH__