2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Steve Reinhardt
36 #include "base/loader/symtab.hh"
37 #include "cpu/base.hh"
38 #include "cpu/exetrace.hh"
39 #include "cpu/static_inst.hh"
40 #include "cpu/thread_context.hh"
41 #include "config/the_isa.hh"
42 #include "enums/OpClass.hh"
45 using namespace TheISA
;
50 ExeTracerRecord::dumpTicks(ostream
&outs
)
52 ccprintf(outs
, "%7d: ", when
);
56 Trace::ExeTracerRecord::traceInst(StaticInstPtr inst
, bool ran
)
58 ostream
&outs
= Trace::output();
63 outs
<< thread
->getCpuPtr()->name() << " ";
65 if (IsOn(ExecSpeculative
))
66 outs
<< (misspeculating
? "-" : "+") << " ";
69 outs
<< "T" << thread
->threadId() << " : ";
76 && !inUserMode(thread
)
78 && debugSymbolTable
->findNearestSymbol(PC
, sym_str
, sym_addr
)) {
80 sym_str
+= csprintf("+%d", PC
- sym_addr
);
81 outs
<< "@" << sym_str
;
84 outs
<< "0x" << hex
<< PC
;
87 if (inst
->isMicroop()) {
88 outs
<< "." << setw(2) << dec
<< upc
;
96 // Print decoded instruction
99 outs
<< setw(26) << left
;
100 outs
<< inst
->disassemble(PC
, debugSymbolTable
);
105 if (IsOn(ExecOpClass
)) {
106 outs
<< Enums::OpClassStrings
[inst
->opClass()] << " : ";
109 if (IsOn(ExecResult
) && data_status
!= DataInvalid
) {
110 ccprintf(outs
, " D=%#018x", data
.as_int
);
113 if (IsOn(ExecEffAddr
) && addr_valid
)
114 outs
<< " A=0x" << hex
<< addr
;
116 if (IsOn(ExecFetchSeq
) && fetch_seq_valid
)
117 outs
<< " FetchSeq=" << dec
<< fetch_seq
;
119 if (IsOn(ExecCPSeq
) && cp_seq_valid
)
120 outs
<< " CPSeq=" << dec
<< cp_seq
;
130 Trace::ExeTracerRecord::dump()
133 * The behavior this check tries to achieve is that if ExecMacro is on,
134 * the macroop will be printed. If it's on and microops are also on, it's
135 * printed before the microops start printing to give context. If the
136 * microops aren't printed, then it's printed only when the final microop
137 * finishes. Macroops then behave like regular instructions and don't
138 * complete/print when they fault.
140 if (IsOn(ExecMacro
) && staticInst
->isMicroop() &&
142 macroStaticInst
&& staticInst
->isFirstMicroop()) ||
144 macroStaticInst
&& staticInst
->isLastMicroop()))) {
145 traceInst(macroStaticInst
, false);
147 if (IsOn(ExecMicro
) || !staticInst
->isMicroop()) {
148 traceInst(staticInst
, true);
152 /* namespace Trace */ }
154 ////////////////////////////////////////////////////////////////////////
156 // ExeTracer Simulation Object
159 ExeTracerParams::create()
161 return new Trace::ExeTracer(this);