src/cpu/exetrace.cc

   1 /*
   2  * Copyright (c) 2001-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Steve Reinhardt
  29  *          Lisa Hsu
  30  *          Nathan Binkert
  31  *          Steve Raasch
  32  */
  33
  34 #include "cpu/exetrace.hh"
  35
  36 #include <iomanip>
  37
  38 #include "arch/isa_traits.hh"
  39 #include "arch/utility.hh"
  40 #include "base/loader/symtab.hh"
  41 #include "config/the_isa.hh"
  42 #include "cpu/base.hh"
  43 #include "cpu/static_inst.hh"
  44 #include "cpu/thread_context.hh"
  45 #include "debug/ExecAll.hh"
  46 #include "enums/OpClass.hh"
  47
  48 using namespace std;
  49 using namespace TheISA;
  50
  51 namespace Trace {
  52
  53 void
  54 ExeTracerRecord::dumpTicks(ostream &outs)
  55 {
  56     ccprintf(outs, "%7d: ", when);
  57 }
  58
  59 void
  60 Trace::ExeTracerRecord::traceInst(const StaticInstPtr &inst, bool ran)
  61 {
  62     ostream &outs = Trace::output();
  63
  64     if (!Debug::ExecUser || !Debug::ExecKernel) {
  65         bool in_user_mode = TheISA::inUserMode(thread);
  66         if (in_user_mode && !Debug::ExecUser) return;
  67         if (!in_user_mode && !Debug::ExecKernel) return;
  68     }
  69
  70     if (Debug::ExecTicks)
  71         dumpTicks(outs);
  72
  73     outs << thread->getCpuPtr()->name() << " ";
  74
  75     if (Debug::ExecAsid)
  76         outs << "A" << dec << TheISA::getExecutingAsid(thread) << " ";
  77
  78     if (Debug::ExecThread)
  79         outs << "T" << thread->threadId() << " : ";
  80
  81     std::string sym_str;
  82     Addr sym_addr;
  83     Addr cur_pc = pc.instAddr();
  84     if (debugSymbolTable && Debug::ExecSymbol &&
  85             (!FullSystem || !inUserMode(thread)) &&
  86             debugSymbolTable->findNearestSymbol(cur_pc, sym_str, sym_addr)) {
  87         if (cur_pc != sym_addr)
  88             sym_str += csprintf("+%d",cur_pc - sym_addr);
  89         outs << "@" << sym_str;
  90     } else {
  91         outs << "0x" << hex << cur_pc;
  92     }
  93
  94     if (inst->isMicroop()) {
  95         outs << "." << setw(2) << dec << pc.microPC();
  96     } else {
  97         outs << "   ";
  98     }
  99
 100     outs << " : ";
 101
 102     //
 103     //  Print decoded instruction
 104     //
 105
 106     outs << setw(26) << left;
 107     outs << inst->disassemble(cur_pc, debugSymbolTable);
 108
 109     if (ran) {
 110         outs << " : ";
 111
 112         if (Debug::ExecOpClass) {
 113             outs << Enums::OpClassStrings[inst->opClass()] << " : ";
 114         }
 115
 116         if (Debug::ExecResult && !predicate) {
 117             outs << "Predicated False";
 118         }
 119
 120         if (Debug::ExecResult && data_status != DataInvalid) {
 121             ccprintf(outs, " D=%#018x", data.as_int);
 122         }
 123
 124         if (Debug::ExecEffAddr && getMemValid())
 125             outs << " A=0x" << hex << addr;
 126
 127         if (Debug::ExecFetchSeq && fetch_seq_valid)
 128             outs << "  FetchSeq=" << dec << fetch_seq;
 129
 130         if (Debug::ExecCPSeq && cp_seq_valid)
 131             outs << "  CPSeq=" << dec << cp_seq;
 132
 133         if (Debug::ExecFlags) {
 134             outs << "  flags=(";
 135             inst->printFlags(outs, "|");
 136             outs << ")";
 137         }
 138     }
 139
 140     //
 141     //  End of line...
 142     //
 143     outs << endl;
 144 }
 145
 146 void
 147 Trace::ExeTracerRecord::dump()
 148 {
 149     /*
 150      * The behavior this check tries to achieve is that if ExecMacro is on,
 151      * the macroop will be printed. If it's on and microops are also on, it's
 152      * printed before the microops start printing to give context. If the
 153      * microops aren't printed, then it's printed only when the final microop
 154      * finishes. Macroops then behave like regular instructions and don't
 155      * complete/print when they fault.
 156      */
 157     if (Debug::ExecMacro && staticInst->isMicroop() &&
 158         ((Debug::ExecMicro &&
 159             macroStaticInst && staticInst->isFirstMicroop()) ||
 160             (!Debug::ExecMicro &&
 161              macroStaticInst && staticInst->isLastMicroop()))) {
 162         traceInst(macroStaticInst, false);
 163     }
 164     if (Debug::ExecMicro || !staticInst->isMicroop()) {
 165         traceInst(staticInst, true);
 166     }
 167 }
 168
 169 } // namespace Trace
 170
 171 ////////////////////////////////////////////////////////////////////////
 172 //
 173 //  ExeTracer Simulation Object
 174 //
 175 Trace::ExeTracer *
 176 ExeTracerParams::create()
 177 {
 178     return new Trace::ExeTracer(this);
 179 }