src/cpu/exetrace.cc

   1 /*
   2  * Copyright (c) 2001-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Steve Reinhardt
  29  *          Lisa Hsu
  30  *          Nathan Binkert
  31  *          Steve Raasch
  32  */
  33
  34 #include <iomanip>
  35
  36 #include "arch/isa_traits.hh"
  37 #include "arch/utility.hh"
  38 #include "base/loader/symtab.hh"
  39 #include "config/the_isa.hh"
  40 #include "cpu/base.hh"
  41 #include "cpu/exetrace.hh"
  42 #include "cpu/static_inst.hh"
  43 #include "cpu/thread_context.hh"
  44 #include "debug/ExecAll.hh"
  45 #include "enums/OpClass.hh"
  46
  47 using namespace std;
  48 using namespace TheISA;
  49
  50 namespace Trace {
  51
  52 void
  53 ExeTracerRecord::dumpTicks(ostream &outs)
  54 {
  55     ccprintf(outs, "%7d: ", when);
  56 }
  57
  58 void
  59 Trace::ExeTracerRecord::traceInst(const StaticInstPtr &inst, bool ran)
  60 {
  61     ostream &outs = Trace::output();
  62
  63     if (!Debug::ExecUser || !Debug::ExecKernel) {
  64         bool in_user_mode = TheISA::inUserMode(thread);
  65         if (in_user_mode && !Debug::ExecUser) return;
  66         if (!in_user_mode && !Debug::ExecKernel) return;
  67     }
  68
  69     if (Debug::ExecTicks)
  70         dumpTicks(outs);
  71
  72     outs << thread->getCpuPtr()->name() << " ";
  73
  74     if (Debug::ExecAsid)
  75         outs << "A" << dec << TheISA::getExecutingAsid(thread) << " ";
  76
  77     if (Debug::ExecThread)
  78         outs << "T" << thread->threadId() << " : ";
  79
  80     std::string sym_str;
  81     Addr sym_addr;
  82     Addr cur_pc = pc.instAddr();
  83     if (debugSymbolTable && Debug::ExecSymbol &&
  84             (!FullSystem || !inUserMode(thread)) &&
  85             debugSymbolTable->findNearestSymbol(cur_pc, sym_str, sym_addr)) {
  86         if (cur_pc != sym_addr)
  87             sym_str += csprintf("+%d",cur_pc - sym_addr);
  88         outs << "@" << sym_str;
  89     } else {
  90         outs << "0x" << hex << cur_pc;
  91     }
  92
  93     if (inst->isMicroop()) {
  94         outs << "." << setw(2) << dec << pc.microPC();
  95     } else {
  96         outs << "   ";
  97     }
  98
  99     outs << " : ";
 100
 101     //
 102     //  Print decoded instruction
 103     //
 104
 105     outs << setw(26) << left;
 106     outs << inst->disassemble(cur_pc, debugSymbolTable);
 107
 108     if (ran) {
 109         outs << " : ";
 110
 111         if (Debug::ExecOpClass) {
 112             outs << Enums::OpClassStrings[inst->opClass()] << " : ";
 113         }
 114
 115         if (Debug::ExecResult && !predicate) {
 116             outs << "Predicated False";
 117         }
 118
 119         if (Debug::ExecResult && data_status != DataInvalid) {
 120             ccprintf(outs, " D=%#018x", data.as_int);
 121         }
 122
 123         if (Debug::ExecEffAddr && getMemValid())
 124             outs << " A=0x" << hex << addr;
 125
 126         if (Debug::ExecFetchSeq && fetch_seq_valid)
 127             outs << "  FetchSeq=" << dec << fetch_seq;
 128
 129         if (Debug::ExecCPSeq && cp_seq_valid)
 130             outs << "  CPSeq=" << dec << cp_seq;
 131
 132         if (Debug::ExecFlags) {
 133             outs << "  flags=(";
 134             inst->printFlags(outs, "|");
 135             outs << ")";
 136         }
 137     }
 138
 139     //
 140     //  End of line...
 141     //
 142     outs << endl;
 143 }
 144
 145 void
 146 Trace::ExeTracerRecord::dump()
 147 {
 148     /*
 149      * The behavior this check tries to achieve is that if ExecMacro is on,
 150      * the macroop will be printed. If it's on and microops are also on, it's
 151      * printed before the microops start printing to give context. If the
 152      * microops aren't printed, then it's printed only when the final microop
 153      * finishes. Macroops then behave like regular instructions and don't
 154      * complete/print when they fault.
 155      */
 156     if (Debug::ExecMacro && staticInst->isMicroop() &&
 157         ((Debug::ExecMicro &&
 158             macroStaticInst && staticInst->isFirstMicroop()) ||
 159             (!Debug::ExecMicro &&
 160              macroStaticInst && staticInst->isLastMicroop()))) {
 161         traceInst(macroStaticInst, false);
 162     }
 163     if (Debug::ExecMicro || !staticInst->isMicroop()) {
 164         traceInst(staticInst, true);
 165     }
 166 }
 167
 168 } // namespace Trace
 169
 170 ////////////////////////////////////////////////////////////////////////
 171 //
 172 //  ExeTracer Simulation Object
 173 //
 174 Trace::ExeTracer *
 175 ExeTracerParams::create()
 176 {
 177     return new Trace::ExeTracer(this);
 178 }