2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Steve Reinhardt
36 #include "arch/isa_traits.hh"
37 #include "arch/utility.hh"
38 #include "base/loader/symtab.hh"
39 #include "cpu/base.hh"
40 #include "cpu/exetrace.hh"
41 #include "cpu/static_inst.hh"
42 #include "cpu/thread_context.hh"
43 #include "config/the_isa.hh"
44 #include "enums/OpClass.hh"
47 using namespace TheISA
;
52 ExeTracerRecord::dumpTicks(ostream
&outs
)
54 ccprintf(outs
, "%7d: ", when
);
58 Trace::ExeTracerRecord::traceInst(StaticInstPtr inst
, bool ran
)
60 ostream
&outs
= Trace::output();
65 outs
<< thread
->getCpuPtr()->name() << " ";
67 if (IsOn(ExecSpeculative
))
68 outs
<< (misspeculating
? "-" : "+") << " ";
71 outs
<< "T" << thread
->threadId() << " : ";
76 #if THE_ISA == ARM_ISA
77 cur_pc
&= ~PcModeMask
;
82 && !inUserMode(thread
)
84 && debugSymbolTable
->findNearestSymbol(cur_pc
, sym_str
, sym_addr
)) {
85 if (cur_pc
!= sym_addr
)
86 sym_str
+= csprintf("+%d",cur_pc
- sym_addr
);
87 outs
<< "@" << sym_str
;
90 outs
<< "0x" << hex
<< cur_pc
;
93 if (inst
->isMicroop()) {
94 outs
<< "." << setw(2) << dec
<< upc
;
102 // Print decoded instruction
105 outs
<< setw(26) << left
;
106 outs
<< inst
->disassemble(cur_pc
, debugSymbolTable
);
111 if (IsOn(ExecOpClass
)) {
112 outs
<< Enums::OpClassStrings
[inst
->opClass()] << " : ";
115 if (IsOn(ExecResult
) && predicate
== false) {
116 outs
<< "Predicated False";
119 if (IsOn(ExecResult
) && data_status
!= DataInvalid
) {
120 ccprintf(outs
, " D=%#018x", data
.as_int
);
123 if (IsOn(ExecEffAddr
) && addr_valid
)
124 outs
<< " A=0x" << hex
<< addr
;
126 if (IsOn(ExecFetchSeq
) && fetch_seq_valid
)
127 outs
<< " FetchSeq=" << dec
<< fetch_seq
;
129 if (IsOn(ExecCPSeq
) && cp_seq_valid
)
130 outs
<< " CPSeq=" << dec
<< cp_seq
;
140 Trace::ExeTracerRecord::dump()
143 * The behavior this check tries to achieve is that if ExecMacro is on,
144 * the macroop will be printed. If it's on and microops are also on, it's
145 * printed before the microops start printing to give context. If the
146 * microops aren't printed, then it's printed only when the final microop
147 * finishes. Macroops then behave like regular instructions and don't
148 * complete/print when they fault.
150 if (IsOn(ExecMacro
) && staticInst
->isMicroop() &&
152 macroStaticInst
&& staticInst
->isFirstMicroop()) ||
154 macroStaticInst
&& staticInst
->isLastMicroop()))) {
155 traceInst(macroStaticInst
, false);
157 if (IsOn(ExecMicro
) || !staticInst
->isMicroop()) {
158 traceInst(staticInst
, true);
162 /* namespace Trace */ }
164 ////////////////////////////////////////////////////////////////////////
166 // ExeTracer Simulation Object
169 ExeTracerParams::create()
171 return new Trace::ExeTracer(this);