Merge iceaxe.:/Volumes/work/research/m5/head
[gem5.git] / src / cpu / exetrace.cc
1 /*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Lisa Hsu
30 * Nathan Binkert
31 * Steve Raasch
32 */
33
34 #include <fstream>
35 #include <iomanip>
36
37 #include "base/loader/symtab.hh"
38 #include "cpu/base.hh"
39 #include "cpu/exetrace.hh"
40 #include "cpu/static_inst.hh"
41 #include "sim/param.hh"
42 #include "sim/system.hh"
43
44 using namespace std;
45
46
47 ////////////////////////////////////////////////////////////////////////
48 //
49 // Methods for the InstRecord object
50 //
51
52
53 void
54 Trace::InstRecord::dump(ostream &outs)
55 {
56 if (flags[INTEL_FORMAT]) {
57 #if FULL_SYSTEM
58 bool is_trace_system = (cpu->system->name() == trace_system);
59 #else
60 bool is_trace_system = true;
61 #endif
62 if (is_trace_system) {
63 ccprintf(outs, "%7d ) ", cycle);
64 outs << "0x" << hex << PC << ":\t";
65 if (staticInst->isLoad()) {
66 outs << "<RD 0x" << hex << addr;
67 outs << ">";
68 } else if (staticInst->isStore()) {
69 outs << "<WR 0x" << hex << addr;
70 outs << ">";
71 }
72 outs << endl;
73 }
74 } else {
75 if (flags[PRINT_CYCLE])
76 ccprintf(outs, "%7d: ", cycle);
77
78 outs << cpu->name() << " ";
79
80 if (flags[TRACE_MISSPEC])
81 outs << (misspeculating ? "-" : "+") << " ";
82
83 if (flags[PRINT_THREAD_NUM])
84 outs << "T" << thread << " : ";
85
86
87 std::string sym_str;
88 Addr sym_addr;
89 if (debugSymbolTable
90 && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)
91 && flags[PC_SYMBOL]) {
92 if (PC != sym_addr)
93 sym_str += csprintf("+%d", PC - sym_addr);
94 outs << "@" << sym_str << " : ";
95 }
96 else {
97 outs << "0x" << hex << PC << " : ";
98 }
99
100 //
101 // Print decoded instruction
102 //
103
104 #if defined(__GNUC__) && (__GNUC__ < 3)
105 // There's a bug in gcc 2.x library that prevents setw()
106 // from working properly on strings
107 string mc(staticInst->disassemble(PC, debugSymbolTable));
108 while (mc.length() < 26)
109 mc += " ";
110 outs << mc;
111 #else
112 outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
113 #endif
114
115 outs << " : ";
116
117 if (flags[PRINT_OP_CLASS]) {
118 outs << opClassStrings[staticInst->opClass()] << " : ";
119 }
120
121 if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
122 outs << " D=";
123 #if 0
124 if (data_status == DataDouble)
125 ccprintf(outs, "%f", data.as_double);
126 else
127 ccprintf(outs, "%#018x", data.as_int);
128 #else
129 ccprintf(outs, "%#018x", data.as_int);
130 #endif
131 }
132
133 if (flags[PRINT_EFF_ADDR] && addr_valid)
134 outs << " A=0x" << hex << addr;
135
136 if (flags[PRINT_INT_REGS] && regs_valid) {
137 for (int i = 0; i < TheISA::NumIntRegs;)
138 for (int j = i + 1; i <= j; i++)
139 ccprintf(outs, "r%02d = %#018x%s", i,
140 iregs->regs.readReg(i),
141 ((i == j) ? "\n" : " "));
142 outs << "\n";
143 }
144
145 if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
146 outs << " FetchSeq=" << dec << fetch_seq;
147
148 if (flags[PRINT_CP_SEQ] && cp_seq_valid)
149 outs << " CPSeq=" << dec << cp_seq;
150
151 //
152 // End of line...
153 //
154 outs << endl;
155 }
156 }
157
158
159 vector<bool> Trace::InstRecord::flags(NUM_BITS);
160 string Trace::InstRecord::trace_system;
161
162 ////////////////////////////////////////////////////////////////////////
163 //
164 // Parameter space for per-cycle execution address tracing options.
165 // Derive from ParamContext so we can override checkParams() function.
166 //
167 class ExecutionTraceParamContext : public ParamContext
168 {
169 public:
170 ExecutionTraceParamContext(const string &_iniSection)
171 : ParamContext(_iniSection)
172 {
173 }
174
175 void checkParams(); // defined at bottom of file
176 };
177
178 ExecutionTraceParamContext exeTraceParams("exetrace");
179
180 Param<bool> exe_trace_spec(&exeTraceParams, "speculative",
181 "capture speculative instructions", true);
182
183 Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
184 "print cycle number", true);
185 Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass",
186 "print op class", true);
187 Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread",
188 "print thread number", true);
189 Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr",
190 "print effective address", true);
191 Param<bool> exe_trace_print_data(&exeTraceParams, "print_data",
192 "print result data", true);
193 Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs",
194 "print all integer regs", false);
195 Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
196 "print fetch sequence number", false);
197 Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
198 "print correct-path sequence number", false);
199 Param<bool> exe_trace_pc_symbol(&exeTraceParams, "pc_symbol",
200 "Use symbols for the PC if available", true);
201 Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
202 "print trace in intel compatible format", false);
203 Param<string> exe_trace_system(&exeTraceParams, "trace_system",
204 "print trace of which system (client or server)",
205 "client");
206
207
208 //
209 // Helper function for ExecutionTraceParamContext::checkParams() just
210 // to get us into the InstRecord namespace
211 //
212 void
213 Trace::InstRecord::setParams()
214 {
215 flags[TRACE_MISSPEC] = exe_trace_spec;
216
217 flags[PRINT_CYCLE] = exe_trace_print_cycle;
218 flags[PRINT_OP_CLASS] = exe_trace_print_opclass;
219 flags[PRINT_THREAD_NUM] = exe_trace_print_thread;
220 flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
221 flags[PRINT_EFF_ADDR] = exe_trace_print_data;
222 flags[PRINT_INT_REGS] = exe_trace_print_iregs;
223 flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq;
224 flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq;
225 flags[PC_SYMBOL] = exe_trace_pc_symbol;
226 flags[INTEL_FORMAT] = exe_trace_intel_format;
227 trace_system = exe_trace_system;
228 }
229
230 void
231 ExecutionTraceParamContext::checkParams()
232 {
233 Trace::InstRecord::setParams();
234 }
235