Started adding a system to output data after every instruction.
[gem5.git] / src / cpu / exetrace.cc
1 /*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Lisa Hsu
30 * Nathan Binkert
31 * Steve Raasch
32 */
33
34 #include <fstream>
35 #include <iomanip>
36
37 #include "arch/regfile.hh"
38 #include "base/loader/symtab.hh"
39 #include "cpu/base.hh"
40 #include "cpu/exetrace.hh"
41 #include "cpu/static_inst.hh"
42 #include "sim/param.hh"
43 #include "sim/system.hh"
44
45 using namespace std;
46 using namespace TheISA;
47
48 ////////////////////////////////////////////////////////////////////////
49 //
50 // Methods for the InstRecord object
51 //
52
53
54 void
55 Trace::InstRecord::dump(ostream &outs)
56 {
57 if (flags[PRINT_REG_DELTA])
58 {
59 outs << "PC = 0x" << setbase(16)
60 << setfill('0')
61 << setw(16) << PC << endl;
62 outs << setbase(10)
63 << setfill(' ')
64 << setw(0);
65 /*
66 int numSources = staticInst->numSrcRegs();
67 int numDests = staticInst->numDestRegs();
68 outs << "Sources:";
69 for(int x = 0; x < numSources; x++)
70 {
71 int sourceNum = staticInst->srcRegIdx(x);
72 if(sourceNum < FP_Base_DepTag)
73 outs << " " << getIntRegName(sourceNum);
74 else if(sourceNum < Ctrl_Base_DepTag)
75 outs << " " << getFloatRegName(sourceNum - FP_Base_DepTag);
76 else
77 outs << " " << getMiscRegName(sourceNum - Ctrl_Base_DepTag);
78 }
79 outs << endl;
80 outs << "Destinations:";
81 for(int x = 0; x < numDests; x++)
82 {
83 int destNum = staticInst->destRegIdx(x);
84 if(destNum < FP_Base_DepTag)
85 outs << " " << getIntRegName(destNum);
86 else if(destNum < Ctrl_Base_DepTag)
87 outs << " " << getFloatRegName(destNum - FP_Base_DepTag);
88 else
89 outs << " " << getMiscRegName(destNum - Ctrl_Base_DepTag);
90 }
91 outs << endl;*/
92 }
93 else if (flags[INTEL_FORMAT]) {
94 #if FULL_SYSTEM
95 bool is_trace_system = (cpu->system->name() == trace_system);
96 #else
97 bool is_trace_system = true;
98 #endif
99 if (is_trace_system) {
100 ccprintf(outs, "%7d ) ", cycle);
101 outs << "0x" << hex << PC << ":\t";
102 if (staticInst->isLoad()) {
103 outs << "<RD 0x" << hex << addr;
104 outs << ">";
105 } else if (staticInst->isStore()) {
106 outs << "<WR 0x" << hex << addr;
107 outs << ">";
108 }
109 outs << endl;
110 }
111 } else {
112 if (flags[PRINT_CYCLE])
113 ccprintf(outs, "%7d: ", cycle);
114
115 outs << cpu->name() << " ";
116
117 if (flags[TRACE_MISSPEC])
118 outs << (misspeculating ? "-" : "+") << " ";
119
120 if (flags[PRINT_THREAD_NUM])
121 outs << "T" << thread << " : ";
122
123
124 std::string sym_str;
125 Addr sym_addr;
126 if (debugSymbolTable
127 && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)
128 && flags[PC_SYMBOL]) {
129 if (PC != sym_addr)
130 sym_str += csprintf("+%d", PC - sym_addr);
131 outs << "@" << sym_str << " : ";
132 }
133 else {
134 outs << "0x" << hex << PC << " : ";
135 }
136
137 //
138 // Print decoded instruction
139 //
140
141 #if defined(__GNUC__) && (__GNUC__ < 3)
142 // There's a bug in gcc 2.x library that prevents setw()
143 // from working properly on strings
144 string mc(staticInst->disassemble(PC, debugSymbolTable));
145 while (mc.length() < 26)
146 mc += " ";
147 outs << mc;
148 #else
149 outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
150 #endif
151
152 outs << " : ";
153
154 if (flags[PRINT_OP_CLASS]) {
155 outs << opClassStrings[staticInst->opClass()] << " : ";
156 }
157
158 if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
159 outs << " D=";
160 #if 0
161 if (data_status == DataDouble)
162 ccprintf(outs, "%f", data.as_double);
163 else
164 ccprintf(outs, "%#018x", data.as_int);
165 #else
166 ccprintf(outs, "%#018x", data.as_int);
167 #endif
168 }
169
170 if (flags[PRINT_EFF_ADDR] && addr_valid)
171 outs << " A=0x" << hex << addr;
172
173 if (flags[PRINT_INT_REGS] && regs_valid) {
174 for (int i = 0; i < TheISA::NumIntRegs;)
175 for (int j = i + 1; i <= j; i++)
176 ccprintf(outs, "r%02d = %#018x%s", i,
177 iregs->regs.readReg(i),
178 ((i == j) ? "\n" : " "));
179 outs << "\n";
180 }
181
182 if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
183 outs << " FetchSeq=" << dec << fetch_seq;
184
185 if (flags[PRINT_CP_SEQ] && cp_seq_valid)
186 outs << " CPSeq=" << dec << cp_seq;
187
188 //
189 // End of line...
190 //
191 outs << endl;
192 }
193 }
194
195
196 vector<bool> Trace::InstRecord::flags(NUM_BITS);
197 string Trace::InstRecord::trace_system;
198
199 ////////////////////////////////////////////////////////////////////////
200 //
201 // Parameter space for per-cycle execution address tracing options.
202 // Derive from ParamContext so we can override checkParams() function.
203 //
204 class ExecutionTraceParamContext : public ParamContext
205 {
206 public:
207 ExecutionTraceParamContext(const string &_iniSection)
208 : ParamContext(_iniSection)
209 {
210 }
211
212 void checkParams(); // defined at bottom of file
213 };
214
215 ExecutionTraceParamContext exeTraceParams("exetrace");
216
217 Param<bool> exe_trace_spec(&exeTraceParams, "speculative",
218 "capture speculative instructions", true);
219
220 Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
221 "print cycle number", true);
222 Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass",
223 "print op class", true);
224 Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread",
225 "print thread number", true);
226 Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr",
227 "print effective address", true);
228 Param<bool> exe_trace_print_data(&exeTraceParams, "print_data",
229 "print result data", true);
230 Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs",
231 "print all integer regs", false);
232 Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
233 "print fetch sequence number", false);
234 Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
235 "print correct-path sequence number", false);
236 Param<bool> exe_trace_print_reg_delta(&exeTraceParams, "print_reg_delta",
237 "print which registers changed to what", false);
238 Param<bool> exe_trace_pc_symbol(&exeTraceParams, "pc_symbol",
239 "Use symbols for the PC if available", true);
240 Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
241 "print trace in intel compatible format", false);
242 Param<string> exe_trace_system(&exeTraceParams, "trace_system",
243 "print trace of which system (client or server)",
244 "client");
245
246
247 //
248 // Helper function for ExecutionTraceParamContext::checkParams() just
249 // to get us into the InstRecord namespace
250 //
251 void
252 Trace::InstRecord::setParams()
253 {
254 flags[TRACE_MISSPEC] = exe_trace_spec;
255
256 flags[PRINT_CYCLE] = exe_trace_print_cycle;
257 flags[PRINT_OP_CLASS] = exe_trace_print_opclass;
258 flags[PRINT_THREAD_NUM] = exe_trace_print_thread;
259 flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
260 flags[PRINT_EFF_ADDR] = exe_trace_print_data;
261 flags[PRINT_INT_REGS] = exe_trace_print_iregs;
262 flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq;
263 flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq;
264 flags[PRINT_REG_DELTA] = exe_trace_print_reg_delta;
265 flags[PC_SYMBOL] = exe_trace_pc_symbol;
266 flags[INTEL_FORMAT] = exe_trace_intel_format;
267 trace_system = exe_trace_system;
268 }
269
270 void
271 ExecutionTraceParamContext::checkParams()
272 {
273 Trace::InstRecord::setParams();
274 }
275